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C/C++ Source or Header  |  1995-04-14  |  172KB  |  4,551 lines
  1. /*DDK*************************************************************************/
  2. /*                                                                           */
  3. /* COPYRIGHT    Copyright (C) 1995 IBM Corporation                           */
  4. /*                                                                           */
  5. /*    The following IBM OS/2 WARP source code is provided to you solely for  */
  6. /*    the purpose of assisting you in your development of OS/2 WARP device   */
  7. /*    drivers. You may use this code in accordance with the IBM License      */
  8. /*    Agreement provided in the IBM Device Driver Source Kit for OS/2. This  */
  9. /*    Copyright statement may not be removed.                                */
  10. /*                                                                           */
  11. /*****************************************************************************/
  12. /**************************************************************************
  13.  *
  14.  * SOURCE FILE NAME = ipmimain.c
  15.  *
  16.  * DESCRIPTIVE NAME = Chip specific PMI functions
  17.  *
  18.  *
  19.  * VERSION = V2.1
  20.  *
  21.  * DATE
  22.  *
  23.  * DESCRIPTION PMI-file handler - Exported entry points
  24.  *
  25.  * FUNCTIONS
  26.  *
  27.  * DEPENDENCIES:
  28.  *
  29.  * NOTES
  30.  *
  31.  * Organization of the imported PMI binary objects:
  32.  * PMI binary objects are a shared libary (DLL) which contains worker routines
  33.  * for all of the imported PMI functions, as specified in the complementing PMI
  34.  * file. The PMI file contains the #includecode "Y" with the name of the
  35.  * imported binary object and call pfnFunction references for all of the imported
  36.  * PMI functions. The pair (X.PMI and Y.DLL) are treated as the adapters
  37.  * SetMode (and other base video functions) handler. The suggested delegation of
  38.  * services between the two is:
  39.  * X.PMI file  sections
  40.  * Hardware (may be generic and corrected by the IdentifyAdapter)
  41.  * SetBank
  42.  * GetBank
  43.  * UnLock
  44.  * Lock
  45.  * Cleanup
  46.  * ModeInfo
  47.  * MonitorModeInfo
  48.  * SetMode (optionally in Y.DLL)
  49.  * SetMonitorTimings (optionally in Y.DLL)
  50.  * Declarations
  51.  * IdentifyAdapter (optionally in Y.DLL)
  52.  *
  53.  * IBMGPMI is the imported PMI library which handles the following chips/adapters:
  54.  * ATI Mach32 and Mach64, S3 805/928 planar implementations, S3 864 planar implementations,
  55.  * Cirrus 543x planar implementations and Diamond Speedstar 24(x) and Stealth W32
  56.  * as well as Number 9 s3 9GXE and STB S3 and Cirrus implementations.
  57.  * The library exports three functions:
  58.  * IdentifyAdapter, SetMonitorTimings and SetMode.
  59.  * IdentifyAdapter is the function which ensures that the hardware is
  60.  * recognized. Release level of IBMGPMI internally delegates the identification of the
  61.  * hardware to screendd.sys physical driver for the already supported adapters.
  62.  * This driver is shipped only
  63.  * as part of a release and therefore, any device support asynchrounous to the
  64.  * release should include device identification in the IdentifyAdapter
  65.  * function (this includes drivers released by both IBM and OEM) rather than
  66.  * delegating it to the screendd.
  67.  ********************************************************************************
  68.  * NOTE to OEM developers:
  69.  *
  70.  * DO NOT MODIFY AND SHIP IBMGPMI.DLL!
  71.  *
  72.  * Create a DLL of your own with a unique name which
  73.  * exports all of the required functions. Format your PMI files to include your
  74.  * own DLL rather than IBMGPMI. Use this code as an example only!
  75.  ********************************************************************************
  76.  * NOTE:        Diamond Stealth Pro code was too difficult to convert to 32 bit,
  77.  *              so I temporarely disabled it. The clock function is still built into
  78.  *              the BVHSVGA.                    @senja
  79.  * STRUCTURES
  80.  *
  81.  * EXTERNAL REFERENCES
  82.  *
  83.  * EXTERNAL FUNCTIONS
  84.  *
  85. */
  86.  
  87. #pragma langlvl(extended)
  88. #include "ipmitype.h"
  89. #include <string.h>
  90. #include <conio.h>
  91.  
  92. /*           
  93.  * IOPL segment cannot exceed 64 K.
  94.  * We need to divide code into several segments, which is less than 64KB.
  95.  */
  96. #pragma alloc_text (CODE_TIMING, pfnPMISetMonitorTimings)
  97.  
  98. /*****************************************************************************
  99.  *
  100.  *  FUNCTION NAME:      _DLL_InitTerm()
  101.  *
  102.  *  DESCRIPTIVE NAME: Initialize the DLL
  103.  *
  104.  *  FUNCTION:         Perform the adapter identification and initialize all of
  105.  *                    global data for the adapter
  106.  *
  107.  *
  108.  *  EXIT:             APIRET - return code 0 if identified, ERROR_ADAPTER_NOT_SUPPORTED otherwise.
  109.  *
  110.  *  INTERNAL REFERENCES:
  111.  *    ROUTINES:
  112.  *
  113.  *  EXTERNAL REFERENCES:
  114.  *    ROUTINES:
  115.  *
  116.  ****************************************************************************/
  117. APIRET _System _DLL_InitTerm(ULONG hModule, ULONG ulFlags)
  118. {
  119.   switch(ulFlags)
  120.   {
  121.      case 0:            //initialization
  122.        if (_CRT_init() == -1)
  123.          return 0UL;      //failed to initialize
  124.        /* fail if hardware not supported or initialization failed */
  125.        if (!Identify(&SVGAHardware,&OEMHardware))
  126.          return 1;      //success
  127.        else
  128.          return 0;      //failed to initialize
  129.      case 1:            //termination
  130.        _CRT_term();     //terminate C run-time
  131.        return 1;      //success
  132.      default:
  133.        return 0;      //failed to initialize
  134.   }
  135. }
  136. /*****************************************************************************
  137.  *
  138.  *  FUNCTION NAME:      pfnIdentifyAdapter()
  139.  *
  140.  *  DESCRIPTIVE NAME: Identify the adapter and confirm that the OEMString
  141.  *                    DACString passed conform to the hardware.
  142.  *
  143.  *  FUNCTION:
  144.  *
  145.  *  INPUT:            PVIDEO_ADAPTER - Pointer to current state of the adapter/mode
  146.  *                    PREGS- Pointer to current register state
  147.  *
  148.  *  EXIT:             APIRET - return code
  149.  *
  150.  *  NOTES:            PMI files contains  [Hardware] header which is
  151.  *                    formatted at the time the PMI file is created.
  152.  *                    The header is as specific as the source providing it
  153.  *                    wished to make it. The headers description can be
  154.  *                    updated by the IdentifyAdapter, if the OEM wishes to
  155.  *                    provide a provisional header and use the IdentifyAdapter
  156.  *                    as a vehicle to setup the device specific support at the
  157.  *                    time the PMI file is being loaded rather than at the time
  158.  *                    the PMI file is created. The update is made thru the VIDEO_ADAPTER
  159.  *                    which does not cause changes to the PMI file itself, but
  160.  *                    lets all of the PMI clients have the exact description.
  161.  *                    An adapter is described using
  162.  *                    OEMString = "CHIPNAME ADAPTERNAME, MANUFACTURER NAME",
  163.  *                    Version string and DACString.
  164.  *                    GENERIC can be used for the ADAPTERNAME and
  165.  *                    DACString. When used, the IdentifyAdapter should only confirm that
  166.  *                    chip identified matches the CHIPNAME. If they are not set to
  167.  *                    GENERIC, confirmation of the identity has to include ADAPTERNAME
  168.  *                    and/or DACString.
  169.  *
  170.  *                    In IBM case, this function ensures both that the hardware
  171.  *                    is identified and that a correct PMI file has made a reference
  172.  *                    into this DLL.
  173.  *  INTERNAL REFERENCES:
  174.  *    ROUTINES:
  175.  *
  176.  *  EXTERNAL REFERENCES:
  177.  *    ROUTINES:
  178.  *
  179.  ****************************************************************************/
  180. APIRET EXPENTRY pfnPMIIdentifyAdapter(PVIDEO_ADAPTER pAdapter,PREGS pRegs)
  181. {
  182.   APIRET rc = NO_ERROR;                       /* default no error                  */
  183.   UCHAR szOEMString[256];
  184.   PCHAR pszChipName, pszAdapterName,pChip;
  185.   UCHAR szDACString[256];                                         //@V3.0ET001
  186.   PCHAR pszDACName;                                               //@V3.0ET001
  187.   ULONG i,j;
  188.  
  189.   /*
  190.   ** Tokenize the DACString to get DAC name                       //@V3.0ET001
  191.   */                                                              //@V3.0ET001
  192.   strcpy(szDACString,pAdapter->Adapter.szDACString);              //@V3.0ET001
  193. //            for(i=0;i<256 && szDACString[i] != '_';i++);                    //@V3.0ET001
  194.   for(i=0;i<256 && szDACString[i] != ' ';i++);                    //          
  195.   szDACString[i] = 0;                                             //@V3.0ET001
  196.   pszDACName = &szDACString[0];                                   //@V3.0ET001
  197.  
  198.   pChip = ChipsetName[SVGAHardware.AdapterType][SVGAHardware.ChipType-1];
  199.   /*
  200.   ** Tokenize the OEMString and verify that we have matched OEMString
  201.   ** chip name. Set the level of support for this adapter
  202.   */
  203.   strcpy(szOEMString,pAdapter->Adapter.szOEMString);
  204.   for(i=0;i<256 && szOEMString[i] != ' ';i++);
  205.   szOEMString[i] = 0;
  206.   pszChipName = &szOEMString[0];
  207.   while(szOEMString[++i] == ' ');    //skip all the blanks
  208.   for(j=i;i<256 && (szOEMString[i] != ' ') && (szOEMString[i] != ',');i++);
  209.   szOEMString[i] = 0;
  210.   pszAdapterName = &szOEMString[j];
  211.   /*
  212.   ** Verify that the chipname corresponds to the identified chip.
  213.   */
  214.   if (strcmp(pszChipName,pChip))
  215.      rc = ERROR_ADAPTER_NOT_SUPPORTED;          //fail the pfnPMIIdentifyAdapter
  216.   else
  217.   {
  218.     /*
  219.     ** Verify that the adapter string corresponds to the identified
  220.     ** hardware and or what we can handle. 
  221.     ** This function should examine the chiptype, the dac type and the
  222.     ** revision string (manufacturer ID) from the PMI file/screendd and
  223.     ** determine the internal key to be used in the clock support function.
  224.     ** The clock support is keyed off the Manufacturer ID and additional
  225.     ** Manufacturer Data. If there is no Manuf. ID for the chip/adapter in
  226.     ** question, establish a ManufacturerData key off the manufacturer ID
  227.     ** for the chip. For example, 864 has two implementations depending on the
  228.     ** DAC, so use common S3_MANUFACTURER and ICD2061_CLOCK or SDAC_CLOCK manuf.
  229.     ** data.                                                        
  230.     */
  231.     switch(SVGAHardware.AdapterType)
  232.     {
  233.       case TSENG_ADAPTER      :
  234.         if ((SVGAHardware.ChipType == TSENG_ET4000_CHIP) &&
  235.              (OEMHardware.Manufacturer == DIAMOND_MANUFACTURER))
  236.              flAdapterSupport = strcmp(pszAdapterName, "SPEEDSTAR") ?
  237.                  ADAPTER_NOT_SUPPORTED : ADAPTER_CLOCK_SUPPORTED;
  238.         else if ((SVGAHardware.ChipType > TSENG_ET4000_CHIP) && /*            */
  239.                   !strcmp(pszAdapterName, "STEALTH"))
  240.              {
  241.                 OEMHardware.Manufacturer = DIAMOND_MANUFACTURER;
  242.                 StealthOldScheme = TRUE;        /*            */
  243.                 if (!strcmp(pszDACName,SGS1702_NAME) &&
  244.                   (pAdapter->Adapter.ulTotalMemory >= 0x200000))     //JWK22
  245.                   StealthOldScheme = FALSE;        /*            */
  246.  
  247.                 flAdapterSupport = ADAPTER_CLOCK_SUPPORTED;
  248.              }
  249.              else                                               /*            */
  250.                flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  251.         break;
  252.       case WESTERNDIG_ADAPTER :
  253.         if (((SVGAHardware.ChipType == WESTERNDIG_WD9030_CHIP) ||
  254.              (SVGAHardware.ChipType == WESTERNDIG_WD9031_CHIP)) &&
  255.              (OEMHardware.Manufacturer == DIAMOND_MANUFACTURER))
  256.              flAdapterSupport = strcmp(pszAdapterName, "SPEEDSTAR") ?
  257.                  ADAPTER_NOT_SUPPORTED : ADAPTER_CLOCK_SUPPORTED;
  258.         else
  259.              flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  260.         break;
  261.       case S3_ADAPTER :
  262.         switch(SVGAHardware.ChipType)
  263.         {
  264.            case S3_86C805_CHIP:
  265.            case S3_86C928_CHIP:
  266.               if (!strcmp(pszAdapterName,"STB_CARD"))
  267.               {
  268.                 OEMHardware.Manufacturer = STB_MANUFACTURER; //late addition
  269.                 flAdapterSupport = ADAPTER_CLOCK_SUPPORTED;
  270.                 break;
  271.               }
  272.               switch(OEMHardware.Manufacturer)
  273.               {
  274.                 case DIAMOND_MANUFACTURER:
  275. //@senja                    flAdapterSupport = strcmp(pszAdapterName, "STEALTH") ?
  276. //@senja                       ADAPTER_NOT_SUPPORTED : ADAPTER_CLOCK_SUPPORTED;
  277.                     flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  278.                     break;
  279.                 case NUMBER9_MANUFACTURER:
  280.                     flAdapterSupport = strcmp(pszAdapterName, "9GXE") ?
  281.                        ADAPTER_NOT_SUPPORTED : ADAPTER_CLOCK_SUPPORTED;
  282.                     break;
  283.                 case LACUNA_MANUFACTURER:                        /*@V3.0YEE04*/
  284.                     flAdapterSupport = ADAPTER_CLOCK_SUPPORTED;  /*@V3.0YEE04*/
  285.                     break;                                       /*@V3.0YEE04*/
  286.                 default:
  287.                    flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  288.                    if (!strcmp(pszAdapterName, "GENERIC") )
  289.                    {
  290.                      OEMHardware.Manufacturer = S3_MANUFACTURER;
  291.                      flAdapterSupport =ADAPTER_CLOCK_SUPPORTED;
  292.                      OEMHardware.ManufacturerData = GENERIC_S3_CLOCK;     /*          */
  293.                    }
  294.               }
  295.               break;
  296.            case S3_86C864_CHIP:
  297.               if ((!strcmp(pszAdapterName,"ICD2061")) ||         /*@V3.0YEE01*/
  298.                   (!strcmp(pszDACName,S3SDAC_NAME)))                /*          */
  299.               {                                                  /*@V3.0YEE01*/
  300.                 OEMHardware.Manufacturer = S3_MANUFACTURER;      /*@V3.0YEE01*/
  301.                 flAdapterSupport = ADAPTER_CLOCK_SUPPORTED;      /*@V3.0YEE01*/
  302.                 if (!strcmp(pszAdapterName,"ICD2061"))           /*@V3.0ET001*/
  303.                   OEMHardware.ManufacturerData = ICD2061_CLOCK;  /*@V3.0YEE01*/
  304.                 else                                             /*@V3.0ET001*/
  305.                   OEMHardware.ManufacturerData = SDAC_CLOCK;     /*@V3.0ET001*/
  306.               }
  307.               else
  308.                 flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  309.               break;
  310.            default:
  311.               flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  312.         }
  313.         break;
  314.       case ATI_ADAPTER:
  315.         OEMHardware.Manufacturer = ATI_MANUFACTURER;      /*          */
  316.         switch(SVGAHardware.ChipType)
  317.         {
  318.            case ATI_68800_CHIP:
  319.               flAdapterSupport = strcmp(pszAdapterName, "GENERIC") ?
  320.                  ADAPTER_NOT_SUPPORTED : ADAPTER_CLOCK_SUPPORTED;
  321.               break;
  322.            case ATI_88800_CHIP:
  323.               flAdapterSupport = strcmp(pszAdapterName, "GENERIC") ?
  324.                  ADAPTER_NOT_SUPPORTED : ADAPTER_MODE_SUPPORTED;
  325.               break;
  326.            default:
  327.               flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  328.         }
  329.         break;
  330.       case CIRRUS_ADAPTER:                      /* @V3.0JAO01 start */
  331.         switch(SVGAHardware.ChipType)
  332.         {
  333.            case CIRRUS_543X_CHIP:
  334.            case CIRRUS_5434_CHIP:
  335.               if (!strcmp(pszAdapterName,"STB_CARD"))
  336.               {
  337.                 OEMHardware.Manufacturer = STB_MANUFACTURER;
  338.                 flAdapterSupport = ADAPTER_CLOCK_SUPPORTED;
  339.                 break;
  340.               }
  341.               else if (!strcmp(pszAdapterName,"GENERIC"))
  342.               {
  343.                 OEMHardware.Manufacturer = CIRRUS_MANUFACTURER; //late addition
  344.                 flAdapterSupport = ADAPTER_CLOCK_SUPPORTED;
  345.                 break;
  346.               }
  347.               else
  348.                 flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  349.            default:
  350.            case CIRRUS_5426_CHIP:
  351.            case CIRRUS_5428_CHIP:
  352.            case CIRRUS_5429_CHIP:
  353.               flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  354.         }
  355.         break;                                  /* @V3.0JAO01 end   */
  356.       case WEITEK_ADAPTER:
  357.         if(OEMHardware.Manufacturer == DIAMOND_MANUFACTURER)
  358.              flAdapterSupport = strcmp(pszAdapterName, "VIPER") ?
  359.                  ADAPTER_NOT_SUPPORTED : ADAPTER_CLOCK_SUPPORTED;
  360.         break;
  361.       default:
  362.         flAdapterSupport = ADAPTER_NOT_SUPPORTED;
  363.     }
  364.   }
  365.  
  366.   return rc;
  367.  
  368. }
  369. /*****************************************************************************
  370.  *
  371.  *  FUNCTION NAME:      pfnSetMode()
  372.  *
  373.  *  DESCRIPTIVE NAME:   Set the mode according to the input parameter.
  374.  *
  375.  *  FUNCTION:           This is the worker routine for the [SetMode] PMI
  376.  *                      sections which elect to delegate the set mode functionality
  377.  *                      to the imported PMI binary object. Such PMI section would
  378.  *                      contain just " call pfnPMISetMode" reference. It is also possible
  379.  *                      to mix PMI sequence and call the pfnSetMode within a SetMode
  380.  *                      section (the assumption is that both PMI file and this
  381.  *                      code are written by the same person who knows what is responsability
  382.  *                      of the pfnSetMode and what is left to the PMI file). Note that the name
  383.  *                      chosen is arbitrary, there is no limitation on the number or names
  384.  *                      of the exported PMI workers.
  385.  *
  386.  *  INPUT:              PVIDEO_ADAPTER - Pointer to current state of the adapter/mode
  387.  *                      PREGS- Pointer to current register state
  388.  *
  389.  *  EXIT:               APIRET - return code
  390.  *
  391.  *  NOTES:              If called, it has to internally call pfnSetMonitorTimings
  392.  *
  393.  *  INTERNAL REFERENCES:
  394.  *    ROUTINES:
  395.  *
  396.  *  EXTERNAL REFERENCES:
  397.  *    ROUTINES:
  398.  *
  399.  ****************************************************************************/
  400. APIRET EXPENTRY pfnPMISetMode(PVIDEO_ADAPTER pAdapter,PREGS pRegs)
  401. {
  402.   if (flAdapterSupport & ADAPTER_MODE_SUPPORTED)//proceed
  403.                                                 // S3 864 and ATI64 to be added
  404.     return NO_ERROR;
  405.   else
  406.     return ERROR_ADAPTER_NOT_SUPPORTED;
  407. }
  408. /*****************************************************************************
  409.  *
  410.  *  FUNCTION NAME:      pfnSetMonitorTimings()
  411.  *
  412.  *  DESCRIPTIVE NAME:   Program the clock related registers based on the input data.
  413.  *
  414.  *  FUNCTION:
  415.  *
  416.  *  INPUT:              PVIDEO_ADAPTER - Pointer to current state of the adapter/mode
  417.  *                      PREGS- Pointer to current register state
  418.  *
  419.  *  EXIT:               APIRET - return code
  420.  *
  421.  *  NOTES:              It is not necessary to verify the manufacturer if this
  422.  *                      code handles only one manufacturer per chip. In that case,
  423.  *                      the identify adapter would fail to identify manufacturers which
  424.  *                      are not handled thru the ibmgpmi.dll so no futher calls into this
  425.  *                      dll for services would be expected. However, if there are
  426.  *                      multiple manufacturers (adapter) handled, then this function has
  427.  *                      to specifically identify which one is being handled.
  428.  *
  429.  *  INTERNAL REFERENCES:
  430.  *    ROUTINES:
  431.  *
  432.  *  EXTERNAL REFERENCES:
  433.  *    ROUTINES:
  434.  * Tables obtained from various BIOS' source code.
  435.  * Diamond Speedstar 24:
  436.  *ET4000         Bios < 6   Bios > = 6
  437.  * 640 60         a23d15     823d15
  438.  * 640 72         b2c422     d2c422
  439.  * 800 56         f2842a     b2842a
  440.  * 800 60         8a040e     8a040e
  441.  * 800 72         a2bc35     82dc35
  442.  * 1024 60        b2c422     d2c422
  443.  * 1024 70        f21435     f21435
  444.  * 1024 72        f23427     8a441e
  445.  * 1024 int       c25410     cc2910
  446.  * 40,80          923506     a23506
  447.  * 132            8a040e     8a040e                     Tested bvhsvga
  448.  *WD             Bios < 2   Bios >= 2        Bios < 2   Bios >= 2
  449.  * 640 60         a23d15     86ac1e                      86ac1e
  450.  * 640 72         d2ad33     92ad33                      ?
  451.  * 800 56         f2852a     b2852a                      b2852a
  452.  * 800 60         a2bc2a     ee153d                      ee153d
  453.  * 800 72         a2bc35     82bc35                      ?
  454.  * 1024 int       c25410     aa2910                      aa2910
  455.  * 1024 60        b2c422     d2c422  ?
  456.  * 1024 70        f21435     f21435  ?
  457.  * 1024 72        f29423     8a9423  ?
  458.  * 40,80          923506     86ac1e                      86ac1e
  459.  * 132            c25410     aa2910                      aa2910
  460.  *
  461.  *Number 9 GXE:
  462.  *
  463.  *  640 @ 70Hz:  08FA170h
  464.  *  640 @ 76Hz:  093B16Ah
  465.  *  640 @ 60Hz:  08AC158h
  466.  *  640 @ 72Hz:  08F896Ah
  467.  *  800 @ 70Hz:  0AB5942h
  468.  *  800 @ 76Hz:  0AF8940h
  469.  *  800 @ 56Hz:  09AA942h
  470.  *  800 @ 72Hz:  0AEF138h
  471.  * 1024 @ 70Hz:  0A2F846h
  472.  * 1024 @ 76Hz:  0A7804Ch
  473.  * 1024 @ 60Hz:  0968846h
  474.  * 1024 @ 72Hz:  0A26036h
  475.  * 1280 @ 70Hz:  093D86Eh
  476.  * 1280 @ 76Hz:  09B785Ah
  477.  * 1280 @ 60Hz:  08B486Eh
  478.  * 1280 @ 72Hz:  0937862h
  479.  * 1600 @ 60Hz:  0AAE03Ch
  480.  * 1600 @ 60Hz:  0AAE03Ch
  481.  * 1600 @ 60Hz:  0AAE03Ch
  482.  * 1600 @ 60Hz:  0AAE03Ch
  483.  * 132 columns:  0A2E140h
  484.  *  80 columns:  0835178h
  485.  *
  486.  *Viper VLB:
  487.  * 640 @ 60:    0x045a8bc
  488.  * 640 @ 72:    0x04bd8b5;
  489.  * 800 @ 56:    0x04f54a1;
  490.  * 800 @ 72:    0x045ac3d;
  491.  * 1024 @ 60:   0x04d4423;
  492.  * 1024 @ 70:   0x04FAC28;
  493.  * 1024 @ 72:   0x04F7821;
  494.  * 1024 @ 76:   0x04F8021;
  495.  * 1280 @ 60:   0x05BF81E;
  496.  * 1280 @ 74:   0x05B8013;
  497.  *
  498.  * STB values for IDC2061a              V2.2SENJA fixing few entries
  499.  * Res        Serial    MHz
  500.  * 640 @ 60   0x01A8BC  25.1723
  501.  * 640 @ 76   0x4B44A3  32.5061
  502.  * 720 @ 60   0x2560AC  28.3251
  503.  * 800 @ 56   0x4FACA8  37.5000  ?
  504.  * 800 @ 60   0x51A8A5  40.0174 640 x 480 @ 90            
  505.  * 800 @ 70   0x55C4A3  44.999  1024 @ 60                 
  506.  * 800 @ 72   0x56D88F  48.0080                           
  507.  * 800 @ 75   0x41AC3D  50.0000 640x480x16bpp @ 60            
  508.  * 1024 @ 44i 0x55C4A3  44.8892
  509.  * 1024 @ 60  0x4B4423  65.0123            
  510.  * 1024 @ 70  0x4FAC28  75.0000 640x480x16bpp @ 75, 800x600x16bpp @ 56            
  511.  * 1024 @ 75  0x538021  81.0000 1280 @ 46i, 800x600x16bpp @ 60                    
  512.  *  0x55F829  85.9091  1024x768x16bpp @ 43i, 1280x1024 @ 46i
  513.  *  0x571814  95.0206  640x480x16bpp at 72                                        
  514.  *  0x57F823  99.8403  800x600x16bpp at 70
  515.  *  0x591C13 100.9091  800x600x16bpp @ 72
  516.  *  0x594014 108.0372
  517.  *  0x59BC1C 108.8182
  518.  *  0x59CC1D 109.0029
  519.  * 1280 @ 60  0x59F81F 111.9421
  520.  *  0x5BD81C 115.5000
  521.  *  0x5B5413 120.0000
  522.  *
  523.  *S3864 with ICD2061:
  524.  *  640 @ 75Hz:  049D8B5h   8bpp;16bpp
  525.  *  640 @ 72Hz:  049D8B5h
  526.  *  640 @ 60Hz:  041A8BCh
  527.  *
  528.  *  640 @ 75Hz:  04B4423h   32bpp
  529.  *  640 @ 72Hz:  04B4423h
  530.  *  640 @ 60Hz:  041AC3Dh
  531.  *
  532.  *  800 @ 75Hz:  041AC3Dh   4bpp;8bpp;16bpp
  533.  *  800 @ 72Hz:  041AC3Dh
  534.  *  800 @ 60Hz:  05170A0h
  535.  *  800 @ 56Hz:  05170A0h
  536.  *
  537.  *  800 @ 75Hz:  057801Ch   32bpp
  538.  *  800 @ 72Hz:  057801Ch
  539.  *  800 @ 60Hz:  051D82Bh
  540.  *  800 @ 56Hz:  051D82Bh
  541.  *
  542.  * 1024 @ 75Hz:  05170A0h   8bpp
  543.  * 1024 @ 70Hz:  04FACA8h
  544.  * 1024 @ 60Hz:  04B44A3h
  545.  * 1024 @ 43Hz:  0550894h
  546.  *
  547.  * 1024 @ 75Hz:  0517020h   4bpp;16bpp
  548.  * 1024 @ 70Hz:  04FAC28h
  549.  * 1024 @ 60Hz:  04B4423h
  550.  * 1024 @ 43Hz:  0550894h
  551.  *
  552.  * 1280 @ 75Hz:  04D8028h
  553.  * 1280 @ 72Hz:  04B4423h
  554.  * 1280 @ 60Hz:  045D83Dh
  555.  * 1152 @ 60Hz:  0517020h
  556.  * 1600 @ 60Hz:  04FAC28h
  557.  * 132 columns:  05170A0h
  558.  * Diamond Stealth : see DIA_ClockTable in ipmidata.c
  559.  *
  560.  * This is the strategy for Stealth 16bpp and 24 bpp
  561.  * 16bpp require ICD to program 8bpp pixel clock and DAC to use command value=3
  562.  * which will double the pixel rate. (ATC 16[5:4]=10)
  563.  * 24bpp on 1700 (1 & 2MB), 1702 (1MB), requires ICD to setup 3*8bpp pixel clock
  564.  * DAC command register value = 4F and ATC 16[5:4]=00.  (this is called
  565.  * StealthOldScheme). In this scheme, pixel clocks are limited to 85Mz, so that
  566.  * only 60Hz refresh is supported for 16/24 bpp.
  567.  * 24bpp on 1702 (2MB), requires ICD to setup 1.5*8bpp pixel clock and DAC
  568.  * command register value = 9 and  ATC 16[5:4]=10.
  569.  * pfnPMIFixupClock should be called from the PMI before ProgramDAC
  570.  * with the register values already set for the DAC mode and the function will fix it up
  571.  * and will reprogram ATC 16. ProgramDAC can then propagate changed r0 into the command
  572.  * register.
  573.  * Due to the fact that old scheme allows only upto 60Hz refresh for 24bpp,
  574.  * we are going to limit our support to the same even with the 1702/2MB as to
  575.  * make this piece of code more maintainable.
  576.  *   hres yres refr bpp index into DIA_ClockTable
  577.  *   640, 480, 60, 4,0x00
  578.  *   640, 480, 60, 8,0x00
  579.  *   640, 480, 60,16,0x00
  580.  *   640, 480, 60,24,0x07       if StealthOldScheme
  581.  *   640, 480, 60,24,0x17
  582.  *   640, 480, 72, 4,0x02
  583.  *   640, 480, 72, 8,0x02
  584.  *   640, 480, 72,16,0x02
  585.  *   640, 480, 72,24,0x13       not supported
  586.  *   640, 480, 75, 4,0x02
  587.  *   640, 480, 75, 8,0x02
  588.  *   640, 480, 75,16,0x02
  589.  *   640, 480, 75,24,0x18       not supported
  590.  *   640, 480, 75,24,0x18
  591.  *   640, 480, 90, 4,0x04
  592.  *   640, 480, 90, 8,0x04
  593.  *   640, 480, 90,16,0x04
  594.  *   640, 480, 90,24,0x14        not supported
  595.  *   800, 600, 56, 4,0x03
  596.  *   800, 600, 56, 8,0x03
  597.  *   800, 600, 56,16,0x03
  598.  *   800, 600, 56,24,0x16       not supported if StealthOldScheme
  599.  *   800, 600, 60, 4,0x04
  600.  *   800, 600, 60, 8,0x04
  601.  *   800, 600, 60,16,0x04
  602.  *   800, 600, 60,24,0x14       not supported if StealthOldScheme
  603.  *   800, 600, 72, 4,0x10
  604.  *   800, 600, 72, 8,0x10
  605.  *   800, 600, 72,16,0x10
  606.  *   800, 600, 72,24,0x07       not supported if StealthOldScheme
  607.  *   800, 600, 75, 4,0x0d
  608.  *   800, 600, 75, 8,0x0d
  609.  *   800, 600, 75,16,0x0d
  610.  *   800, 600, 75,24,0x15       not supported if StealthOldScheme
  611.  *   800, 600, 90, 4,0x09
  612.  *   800, 600, 90, 8,0x09
  613.  *   800, 600, 90,16,0x09
  614.  *  1024, 768, 43, 4,0x05
  615.  *  1024, 768, 43, 8,0x05
  616.  *  1024, 768, 43,16,0x05
  617.  *  1024, 768, 60, 4,0x08
  618.  *  1024, 768, 60, 8,0x08
  619.  *  1024, 768, 60,16,0x08
  620.  *  1024, 768, 70, 4,0x07
  621.  *  1024, 768, 70, 8,0x07
  622.  *  1024, 768, 70,16,0x07
  623.  *  1024, 768, 72, 4,0x0b
  624.  *  1024, 768, 72, 8,0x0b
  625.  *  1024, 768, 72,16,0x0b
  626.  *  1024, 768, 75, 4,0x0e
  627.  *  1024, 768, 75, 8,0x0e
  628.  *  1024, 768, 75,16,0x0e
  629.  *  1280,1024, 43, 4,0x12
  630.  *  1280,1024, 43, 8,0x12
  631.  *  1280,1024, 60, 8,0x12
  632.  *  1280,1024, 72, 8,0x12
  633.  *  1280,1024, 75, 8,0x12
  634.  ****************************************************************************/
  635. APIRET EXPENTRY  pfnPMISetMonitorTimings(PVIDEO_ADAPTER pAdapter,PREGS pRegs)
  636. {
  637.    ULONG ClockSerialData;
  638.    ULONG rc = NO_ERROR;
  639.    USHORT BiosMajorRev;
  640.    USHORT crtcport = (_inp(0x3cc) & 0x01) ? 0x3D4 : 0x3B4;       /*@V3.0YEE01*/
  641.    BYTE r0, r1, r2, r3, r4;                                      /*@V3.0ET001*/
  642.    USHORT i, j;                                                  /*@V3.0YEE01*/
  643.  
  644.    if (!(flAdapterSupport & ADAPTER_CLOCK_SUPPORTED))                //proceed
  645.       return ERROR_ADAPTER_NOT_SUPPORTED;
  646.  
  647.    if (OEMHardware.Manufacturer == CIRRUS_MANUFACTURER)          /*@V3.0JAO01*/
  648.    {                                                             /*@V3.0JAO01*/
  649.      rc = SetCirrusClock((PVIDEO_ADAPTER) pAdapter);             /*@V3.0JAO01*/
  650.      return rc;                                                  /*@V3.0JAO01*/
  651.    }                                                             /*@V3.0JAO01*/
  652.  
  653.    /*
  654.    ** STB ICD2061A based cards:
  655.    ** Cirrus and S3 928
  656.    */
  657.    if(OEMHardware.Manufacturer == STB_MANUFACTURER)
  658.    {
  659.       if (!(pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS))
  660.           ClockSerialData =0x2560AC;
  661.       else
  662.       {
  663.         switch(pAdapter->ModeInfo.usXResolution)
  664.         {
  665.           case 640:
  666.              switch(pAdapter->ModeInfo.bVrtRefresh)
  667.              {
  668.                 case 90:                        /*            */
  669.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  670.                   {
  671.                     ClockSerialData =0x051a8a5;
  672.                     break;
  673.                   }
  674.                 case 76:                        /*            */
  675.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  676.                     ClockSerialData =0x04B44A3;
  677.                   else
  678.                     ClockSerialData =0x04FAC28;
  679.                   break;
  680.                 default:
  681.                 case 60:                        /*            */
  682.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  683.                     ClockSerialData =0x01A8BC;
  684.                   else
  685.                     ClockSerialData =0x41AC3D;
  686.                   break;
  687.              }
  688.              break;
  689.           case 800:
  690.              switch(pAdapter->ModeInfo.bVrtRefresh)
  691.              {
  692.                 case 76:
  693.                 case 75:
  694.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  695.                   {
  696.                     ClockSerialData =0x041AC3D; /*            */
  697.                     break;
  698.                   }
  699.                 case 72:
  700.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  701.                     ClockSerialData =0x56D88F;  /*            */
  702.                   else
  703.                     ClockSerialData =0x0591c13;
  704.                   break;
  705.                 case 70:
  706.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  707.                     ClockSerialData =0x055C4A3;
  708.                   else
  709.                     ClockSerialData =0x057F823;
  710.                   break;
  711.                 case 60:
  712.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  713.                     ClockSerialData =0x051A8A5;
  714.                   else
  715.                     ClockSerialData =0x0538021;
  716.                   break;
  717.                 default:
  718.                 case 56:
  719.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  720.                     ClockSerialData =0x04FACA8;
  721.                   else
  722.                     ClockSerialData =0x04FAC28;
  723.                   break;
  724.              }
  725.              break;
  726.           case 1024:
  727.              switch(pAdapter->ModeInfo.bVrtRefresh)
  728.              {
  729.                 case 75:
  730.                 case 74:
  731.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  732.                   {
  733.                     ClockSerialData =0x538021;
  734.                     break;
  735.                   }
  736.                 case 70:
  737.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  738.                   {
  739.                     ClockSerialData =0x4FAC28;
  740.                     break;
  741.                   }
  742.                 case 60:
  743.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  744.                   {
  745.                     ClockSerialData =0x04B4423;
  746.                     break;
  747.                   }
  748.                 default:
  749.                 case 43:                /*            */
  750.                   if (pAdapter->ModeInfo.bBitsPerPixel <= 8)
  751.                     ClockSerialData =0x055C4A3;
  752.                   else
  753.                     ClockSerialData =0x055F829;
  754.                   break;
  755.              }
  756.              break;
  757.           case 1280:
  758.              if (pAdapter->ModeInfo.bVrtRefresh == 60)
  759.                 ClockSerialData =0x059F81F;     //60
  760.              else if (pAdapter->ModeInfo.bVrtRefresh <= 46)
  761.                 ClockSerialData =0x055F829;     //46i
  762.              else
  763.                 rc = ERROR_REFRESH_NOT_SUPPORTED;
  764.              break;
  765.           default:
  766.              ClockSerialData =0x01A8BC;
  767.         }
  768.       }
  769.       if (!rc)
  770.         SetSTBClock(ClockSerialData);
  771.       return(rc);
  772.    }
  773.  
  774.    if (SVGAHardware.AdapterType == S3_ADAPTER)
  775.    {
  776.       if  (SVGAHardware.ChipType <= S3_86C928_CHIP)
  777.       {
  778.         if (OEMHardware.ManufacturerData == GENERIC_S3_CLOCK)
  779.         {
  780.           /*
  781.           ** Generic on-chip clock for S3
  782.           */
  783.           if (pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS)
  784.           {
  785.             SetS3Clock((ULONG) pAdapter->ModeInfo.usXResolution,
  786.                      (ULONG) pAdapter->ModeInfo.bBitsPerPixel,
  787.                      (ULONG) pAdapter->ModeInfo.bVrtRefresh);
  788.             return rc;
  789.           }
  790.           else
  791.             return(ERROR_MODE_NOT_SUPPORTED);
  792.         }
  793.         /*
  794.         ** Number 9 GXE VLB/ISA
  795.         ** All Number 9 clock values shifted right 1 due to        @V3.0YEE01
  796.         ** change in SETNUMBER9CLK                                 @V3.0YEE01
  797.         */
  798.         if  (OEMHardware.Manufacturer == NUMBER9_MANUFACTURER)
  799.         {
  800.           if (!(pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS))
  801.           {
  802.             if (pAdapter->ModeInfo.usBytesPerScanLine == 132)
  803. /*            ClockSerialData = 0x0A2E140;                         @V3.0YEE01*/
  804.               ClockSerialData = 0x05170A0;                       /*@V3.0YEE01*/
  805.             else
  806. /*            ClockSerialData =0x0835178;                          @V3.0YEE01*/
  807.               ClockSerialData =0x041A8BC;                        /*@V3.0YEE01*/
  808.           }
  809.           else if (pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS)
  810.           {
  811.             switch(pAdapter->ModeInfo.usXResolution)
  812.             {
  813.               case 640:
  814.                  switch(pAdapter->ModeInfo.bVrtRefresh)
  815.                  {
  816.                     case 70:
  817. /*                    ClockSerialData =0x08FA170;              @V3.0YEE01*/
  818.                       ClockSerialData =0x047D0B8;            /*@V3.0YEE01*/
  819.                       break;
  820.                     case 76:
  821. /*                    ClockSerialData =0x093B16A;              @V3.0YEE01*/
  822.                       ClockSerialData =0x049D8B5;            /*@V3.0YEE01*/
  823.                       break;
  824.                     case 60:
  825. /*                    ClockSerialData =0x08AC158;              @V3.0YEE01*/
  826.                       ClockSerialData =0x04560AC;            /*@V3.0YEE01*/
  827.                       break;
  828.                     case 72:
  829. /*                    ClockSerialData =0x08F896A;              @V3.0YEE01*/
  830.                       ClockSerialData =0x047C4B5;            /*@V3.0YEE01*/
  831.                       break;
  832.                     default:
  833. /*                    ClockSerialData =0x08AC158;              @V3.0YEE01*/
  834.                       ClockSerialData =0x04560AC;            /*@V3.0YEE01*/
  835.                       break;
  836.                  }
  837.                  break;
  838.               case 800:
  839.                  switch(pAdapter->ModeInfo.bVrtRefresh)
  840.                  {
  841.                     case 70:
  842. /*                    ClockSerialData =0x0AB5942;                  @V3.0YEE01*/
  843.                       ClockSerialData =0x055ACA1;                /*@V3.0YEE01*/
  844.                       break;
  845.                     case 76:
  846. /*                    ClockSerialData =0x0AF8940;                  @V3.0YEE01*/
  847.                       ClockSerialData =0x057C4A0;                /*@V3.0YEE01*/
  848.                       break;
  849.                     case 56:
  850. /*                    ClockSerialData =0x09AA942;                  @V3.0YEE01*/
  851.                       ClockSerialData =0x04D54A1;                /*@V3.0YEE01*/
  852.                       break;
  853.                     case 72:
  854. /*                    ClockSerialData =0x0AEF138;                  @V3.0YEE01*/
  855.                       ClockSerialData =0x057789C;                /*@V3.0YEE01*/
  856.                       break;
  857.                     default:
  858. /*                    ClockSerialData =0x09AA942;                  @V3.0YEE01*/
  859.                       ClockSerialData =0x04D54A1;                /*@V3.0YEE01*/
  860.                       break;
  861.                  }
  862.                  break;
  863.               case 1024:
  864.                  switch(pAdapter->ModeInfo.bVrtRefresh)
  865.                  {
  866.                     case 70:
  867. /*                    ClockSerialData =0x0A2F846;                  @V3.0YEE01*/
  868.                       ClockSerialData =0x0517C23;                /*@V3.0YEE01*/
  869.                       break;
  870.                     case 76:
  871. /*                    ClockSerialData =0x0A7804C;                  @V3.0YEE01*/
  872.                       ClockSerialData =0x053C026;                /*@V3.0YEE01*/
  873.                       break;
  874.                     case 60:
  875. /*                    ClockSerialData =0x0968846;                  @V3.0YEE01*/
  876.                       ClockSerialData =0x04B4423;                /*@V3.0YEE01*/
  877.                       break;
  878.                     case 72:
  879. /*                    ClockSerialData =0x0A26036;                  @V3.0YEE01*/
  880.                       ClockSerialData =0x051301B;                /*@V3.0YEE01*/
  881.                       break;
  882.                     default:
  883. /*                    ClockSerialData =0x0968846;                  @V3.0YEE01*/
  884.                       ClockSerialData =0x04B4423;                /*@V3.0YEE01*/
  885.                       break;
  886.                  }
  887.                  break;
  888.               case 1280:
  889.                  switch(pAdapter->ModeInfo.bVrtRefresh)
  890.                  {
  891.                     case 70:
  892. /*                    ClockSerialData =0x093D86E;                  @V3.0YEE01*/
  893.                       ClockSerialData =0x049EC37;                /*@V3.0YEE01*/
  894.                       break;
  895.                     case 76:
  896. /*                    ClockSerialData =0x09B785A;                  @V3.0YEE01*/
  897.                       ClockSerialData =0x04DBC2D;                /*@V3.0YEE01*/
  898.                       break;
  899.                     case 60:
  900. /*                    ClockSerialData =0x08B486E;                  @V3.0YEE01*/
  901.                       ClockSerialData =0x045A437;                /*@V3.0YEE01*/
  902.                       break;
  903.                     case 72:
  904. /*                    ClockSerialData =0x0937862;                  @V3.0YEE01*/
  905.                       ClockSerialData =0x049BC31;                /*@V3.0YEE01*/
  906.                       break;
  907.                     default:
  908. /*                    ClockSerialData =0x08B486E;                  @V3.0YEE01*/
  909.                       ClockSerialData =0x045A437;                /*@V3.0YEE01*/
  910.                       break;
  911.                  }
  912.                  break;
  913.               case 1600:
  914.                  if (pAdapter->ModeInfo.bVrtRefresh == 60)
  915. /*                  ClockSerialData = 0x0AAE03C;                   @V3.0YEE01*/
  916.                     ClockSerialData = 0x055701E;                 /*@V3.0YEE01*/
  917.                  else
  918.                     rc = ERROR_REFRESH_NOT_SUPPORTED;
  919.                  break;
  920.               default:
  921. /*               ClockSerialData =0x0835178;                       @V3.0YEE01*/
  922.                  ClockSerialData =0x041A8BC;                     /*@V3.0YEE01*/
  923.             }
  924.           }             /* end MODE_FLAG_GRAPHICS test   */
  925.           if (!rc)
  926.                SETNUMBER9CLK(ClockSerialData);
  927.           return rc;
  928.         }               /* end NUMBER9_MANUFACTURER test */
  929.  
  930.         if (OEMHardware.Manufacturer == LACUNA_MANUFACTURER) /*@V3.0YEE04*/
  931.         {                                                         /*@V3.0YEE04*/
  932.             pfnSetS3Lacuna(pAdapter,pRegs);                       /*@V3.0YEE04*/
  933.             return rc;                                            /*@V3.0YEE04*/
  934.          }              /* end LACUNA_MANUFACTURER test */        /*@V3.0YEE04*/
  935.  
  936.         /*
  937.         ** Diamond Stealth 24 and Pro (VRAM not supported)
  938.         ** Monitor selection and configuration possible only thru a DOS utility.
  939.         */
  940.         if (OEMHardware.Manufacturer == DIAMOND_MANUFACTURER)
  941.         {
  942. //@senja    SETDIAMONDCLK_S3((ULONG) pAdapter->ModeInfo.usXResolution,
  943. //                       (ULONG) pAdapter->ModeInfo.bBitsPerPixel);
  944.             return rc;
  945.         }              /* end DIAMOND_MANUFACTURER test */
  946.         return rc;
  947.       }                 /* end <= S3_86C928_CHIP test    */
  948.  
  949.       /*
  950.       ** S3 864 with ICD 2061 external clock chip             start @V3.0YEE01
  951.       */
  952.       if ((OEMHardware.Manufacturer == S3_MANUFACTURER) &&
  953.           (OEMHardware.ManufacturerData == ICD2061_CLOCK))
  954.       {
  955.         r0 = _inp(0x3cc);
  956.         if ((r0 & 0x0c) != 0x0c)
  957.           return (ERROR_REFRESH_NOT_SUPPORTED);
  958.  
  959.         pfnSetS3864ICD(pAdapter,pRegs);                       /*@V3.0YEE03*/
  960.         return rc;
  961.       }                 /* end S3_86C864_CHIP & ICD2061     end @V3.0YEE01*/
  962.  
  963.       /*
  964.       ** S3 864 with S3DAC                                      @V3.0ET001
  965.       */
  966.  
  967.       if ((OEMHardware.Manufacturer == S3_MANUFACTURER) &&
  968.           (OEMHardware.ManufacturerData == SDAC_CLOCK))
  969.       {
  970.         if (!(pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS))
  971.         {
  972.           if (pAdapter->ModeInfo.usBytesPerScanLine == 132)
  973.           {
  974.             r0 = 0x5d;
  975.             r1 = 0x2f;     /* 132 cols*/
  976.             r2 = 0x55;
  977.             r3 = 0x29;
  978.             r4 = 0x00;
  979.           }
  980.           else
  981.           {
  982.             r0 = 0x6b;
  983.             r1 = 0x24;     /* 40 and 80 cols*/
  984.             r2 = 0x51;
  985.             r3 = 0x29;
  986.             r4 = 0x00;
  987.           }
  988.         }
  989.         else              /* graphics mode */
  990.         {
  991.           switch(pAdapter->ModeInfo.usXResolution)
  992.           {
  993.             case 640:
  994.               switch(pAdapter->ModeInfo.bBitsPerPixel)
  995.               {
  996.                 case 4:
  997.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  998.                   {
  999.                     case 85:        /*do 75*/
  1000.                     case 75:
  1001.                     case 72:
  1002.  
  1003.                       _outpw(crtcport, 0x0e11);
  1004.                       _outpw(crtcport, 0x6400);
  1005.                       _outpw(crtcport, 0x4f02);
  1006.                       _outpw(crtcport, 0x8003);
  1007.                       _outpw(crtcport, 0x5204);
  1008.                       _outpw(crtcport, 0x1a05);
  1009.                       _outpw(crtcport, 0xf206);
  1010.                       _outpw(crtcport, 0x1f07);
  1011.                       _outpw(crtcport, 0xff0e);
  1012.  
  1013.                       _outpw(crtcport, 0xe010);
  1014.                       _outpw(crtcport, 0x8311);
  1015.                       _outpw(crtcport, 0xdf15);
  1016.                       _outpw(crtcport, 0x0016);
  1017.  
  1018.                       _outpw(crtcport, 0xa052);
  1019.                       _outpw(crtcport, 0xf55b);
  1020.                       _outpw(crtcport, 0x025c);
  1021.  
  1022.                       _outpw(crtcport, 0x0242);
  1023.  
  1024.                       r0 = 0x5f;
  1025.                       r1 = 0x49;
  1026.                       r2 = 0x51;
  1027.                       r3 = 0x29;
  1028.                       r4 = 0x00;
  1029.                       break;
  1030.  
  1031.                     default: /*60*/
  1032.  
  1033.                       _outpw(crtcport, 0x0e11);
  1034.                       _outpw(crtcport, 0x5f00);
  1035.                       _outpw(crtcport, 0x5002);
  1036.                       _outpw(crtcport, 0x8203);
  1037.                       _outpw(crtcport, 0x5404);
  1038.                       _outpw(crtcport, 0x8005);
  1039.                       _outpw(crtcport, 0x0b06);
  1040.                       _outpw(crtcport, 0x3e07);
  1041.                       _outpw(crtcport, 0x000e);
  1042.  
  1043.                       _outpw(crtcport, 0xea10);
  1044.                       _outpw(crtcport, 0x8c11);
  1045.                       _outpw(crtcport, 0xe715);
  1046.                       _outpw(crtcport, 0x0416);
  1047.  
  1048.                       _outpw(crtcport, 0x8052);
  1049.                       _outpw(crtcport, 0xa85b);
  1050.                       _outpw(crtcport, 0x005c);
  1051.  
  1052.                       _outpw(crtcport, 0x0042);
  1053.  
  1054.                       r0 = 0x60;
  1055.                       r1 = 0x4c;
  1056.                       r2 = 0x51;
  1057.                       r3 = 0x29;
  1058.                       r4 = 0x00;
  1059.                       break;           /*from vrtrefresh*/
  1060.                   }                    /*end vrtrefresh*/
  1061.                   break;               /*from bpp*/
  1062.  
  1063.                 case 8:
  1064.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1065.                   {
  1066.                     case 85:
  1067.  
  1068.                       _outpw(crtcport, 0x0e11);
  1069.                       _outpw(crtcport, 0x5f00);
  1070.                       _outpw(crtcport, 0x4f02);
  1071.                       _outpw(crtcport, 0x8003);
  1072.                       _outpw(crtcport, 0x5204);
  1073.                       _outpw(crtcport, 0x1e05);
  1074.                       _outpw(crtcport, 0x0d06);
  1075.                       _outpw(crtcport, 0x3e07);
  1076.  
  1077.                       _outpw(crtcport, 0xeb10);
  1078.                       _outpw(crtcport, 0x9d11);
  1079.                       _outpw(crtcport, 0xe015);
  1080.                       _outpw(crtcport, 0x0d16);
  1081.  
  1082.                       _outpw(crtcport, 0x4052);
  1083.                       _outpw(crtcport, 0xf65b);
  1084.  
  1085.                       _outpw(crtcport, 0x583b);
  1086.                       _outpw(crtcport, 0x2f3c);
  1087.  
  1088.                       r0 = 0x77;
  1089.                       r1 = 0x4a;
  1090.                       r2 = 0x55;
  1091.                       r3 = 0x29;
  1092.                       r4 = 0x00;
  1093.                       break;
  1094.  
  1095.                     case 75:           /*do 75*/
  1096.                     case 72:
  1097.  
  1098.                       _outpw(crtcport, 0x0e11);
  1099.                       _outpw(crtcport, 0x6400);
  1100.                       _outpw(crtcport, 0x4f02);
  1101.                       _outpw(crtcport, 0x8003);
  1102.                       _outpw(crtcport, 0x5204);
  1103.                       _outpw(crtcport, 0x1a05);
  1104.                       _outpw(crtcport, 0xf206);
  1105.                       _outpw(crtcport, 0x1f07);
  1106.  
  1107.                       _outpw(crtcport, 0xe010);
  1108.                       _outpw(crtcport, 0x8311);
  1109.                       _outpw(crtcport, 0xdf15);
  1110.                       _outpw(crtcport, 0x0016);
  1111.  
  1112.                       _outpw(crtcport, 0xa052);
  1113.                       _outpw(crtcport, 0xf55b);
  1114.  
  1115.                       _outpw(crtcport, 0x5d3b);
  1116.                       _outpw(crtcport, 0x323c);
  1117.  
  1118.                       r0 = 0x5f;
  1119.                       r1 = 0x49;
  1120.                       r2 = 0x55;
  1121.                       r3 = 0x29;
  1122.                       r4 = 0x00;
  1123.                       break;
  1124.  
  1125.                     default: /*60*/
  1126.  
  1127.                       _outpw(crtcport, 0x0e11);
  1128.                       _outpw(crtcport, 0x5f00);
  1129.                       _outpw(crtcport, 0x5002);
  1130.                       _outpw(crtcport, 0x8203);
  1131.                       _outpw(crtcport, 0x5204);
  1132.                       _outpw(crtcport, 0x9e05);
  1133.                       _outpw(crtcport, 0x0b06);
  1134.                       _outpw(crtcport, 0x3e07);
  1135.  
  1136.                       _outpw(crtcport, 0xe910);
  1137.                       _outpw(crtcport, 0x8b11);
  1138.                       _outpw(crtcport, 0xe715);
  1139.                       _outpw(crtcport, 0x0416);
  1140.  
  1141.                       _outpw(crtcport, 0x8052);
  1142.                       _outpw(crtcport, 0xa85b);
  1143.  
  1144.                       _outpw(crtcport, 0x583b);
  1145.                       _outpw(crtcport, 0x2f3c);
  1146.  
  1147.                       r0 = 0x60;
  1148.                       r1 = 0x4c;
  1149.                       r2 = 0x55;
  1150.                       r3 = 0x29;
  1151.                       r4 = 0x00;
  1152.                       break;           /*from vrtrefresh*/
  1153.                   }                    /*end vrtrefresh*/
  1154.                   break;               /*from bpp*/
  1155.  
  1156.                 case 16:
  1157.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1158.                   {
  1159.                     case 85:           /*do 75*/
  1160.                     case 75:
  1161.                     case 72:
  1162.  
  1163.                       _outpw(crtcport, 0x0e11);
  1164.  
  1165.                       _outpw(crtcport, 0xcf00);
  1166.                       _outpw(crtcport, 0x9203);
  1167.                       _outpw(crtcport, 0xa504);
  1168.                       _outpw(crtcport, 0x1505);
  1169.                       _outpw(crtcport, 0xf106);
  1170.                       _outpw(crtcport, 0x1f07);
  1171.  
  1172.                       _outpw(crtcport, 0xe010);
  1173.                       _outpw(crtcport, 0x8311);
  1174.                       _outpw(crtcport, 0xdf15);
  1175.                       _outpw(crtcport, 0x0016);
  1176.  
  1177.                       _outpw(crtcport, 0xa052);
  1178.                       _outpw(crtcport, 0xf55b);
  1179.                       _outpw(crtcport, 0x5067);
  1180.  
  1181.                       _outpw(crtcport, 0xc83b);
  1182.                       _outpw(crtcport, 0x673c);
  1183.  
  1184.                       r0 = 0x5f;
  1185.                       r1 = 0x49;
  1186.                       r2 = 0x55;
  1187.                       r3 = 0x29;
  1188.                       r4 = 0x50;
  1189.                       break;
  1190.  
  1191.                     default: /*60*/
  1192.  
  1193.                       _outpw(crtcport, 0x0e11);
  1194.  
  1195.                       _outpw(crtcport, 0xc200);
  1196.                       _outpw(crtcport, 0x8403);
  1197.                       _outpw(crtcport, 0xa304);
  1198.                       _outpw(crtcport, 0x1b05);
  1199.                       _outpw(crtcport, 0x0c06);
  1200.                       _outpw(crtcport, 0x3e07);
  1201.  
  1202.                       _outpw(crtcport, 0xe910);
  1203.                       _outpw(crtcport, 0x8b11);
  1204.                       _outpw(crtcport, 0xe715);
  1205.                       _outpw(crtcport, 0x0416);
  1206.  
  1207.                       _outpw(crtcport, 0x8052);
  1208.                       _outpw(crtcport, 0xa85b);
  1209.                       _outpw(crtcport, 0x5067);
  1210.  
  1211.                       _outpw(crtcport, 0xbb3b);
  1212.                       _outpw(crtcport, 0x613c);
  1213.  
  1214.                       r0 = 0x60;
  1215.                       r1 = 0x4c;
  1216.                       r2 = 0x55;
  1217.                       r3 = 0x29;
  1218.                       r4 = 0x50;
  1219.                       break;           /*from vrtrefresh*/
  1220.                   }                    /*end vrtrefresh*/
  1221.                   break;               /*from bpp*/
  1222.  
  1223.                 case 24:
  1224.                 case 32:
  1225.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1226.                   {
  1227.                     case 85:
  1228.                     case 75:
  1229.                     case 72:
  1230.  
  1231.                       _outpw(crtcport, 0x0e11);
  1232.                       _outpw(crtcport, 0xad00);
  1233.                       _outpw(crtcport, 0x8703);
  1234.                       _outpw(crtcport, 0x4904);
  1235.                       _outpw(crtcport, 0x8a05);
  1236.                       _outpw(crtcport, 0xf306);
  1237.                       _outpw(crtcport, 0x1f07);
  1238.  
  1239.                       _outpw(crtcport, 0xe110);
  1240.                       _outpw(crtcport, 0x8411);
  1241.                       _outpw(crtcport, 0xe015);
  1242.                       _outpw(crtcport, 0x0016);
  1243.  
  1244.                       _outpw(crtcport, 0xa052);
  1245.                       _outpw(crtcport, 0xf55b);
  1246.                       _outpw(crtcport, 0x7f5d);
  1247.  
  1248.                       _outpw(crtcport, 0xa63b);
  1249.                       _outpw(crtcport, 0xd63c);
  1250.  
  1251.                       r0 = 0x6b;
  1252.                       r1 = 0x44;
  1253.                       r2 = 0x55;
  1254.                       r3 = 0x29;
  1255.                       r4 = 0x70;
  1256.                       break;
  1257.  
  1258.                     default: /*60*/
  1259.  
  1260.                       _outpw(crtcport, 0x0e11);
  1261.                       _outpw(crtcport, 0x8a00);
  1262.                       _outpw(crtcport, 0x8803);
  1263.                       _outpw(crtcport, 0x4504);
  1264.                       _outpw(crtcport, 0x1505);
  1265.                       _outpw(crtcport, 0x0a06);
  1266.                       _outpw(crtcport, 0x3e07);
  1267.  
  1268.                       _outpw(crtcport, 0xe910);
  1269.                       _outpw(crtcport, 0x8b11);
  1270.                       _outpw(crtcport, 0xe715);
  1271.                       _outpw(crtcport, 0x0416);
  1272.  
  1273.                       _outpw(crtcport, 0x8052);
  1274.                       _outpw(crtcport, 0xa85b);
  1275.                       _outpw(crtcport, 0x7f5d);
  1276.  
  1277.                       _outpw(crtcport, 0x833b);
  1278.                       _outpw(crtcport, 0xc53c);
  1279.  
  1280.                       r0 = 0x60;
  1281.                       r1 = 0x2c;
  1282.                       r2 = 0x55;
  1283.                       r3 = 0x29;
  1284.                       r4 = 0x70;
  1285.                       break;           /*from vrtrefresh*/
  1286.                   }                    /*end vrtrefresh*/
  1287.                   break;               /*from bpp*/
  1288.  
  1289.               }                        /*end bpp switch*/
  1290.               break;                   /*from xresolution*/
  1291.  
  1292.             case 800:
  1293.               switch(pAdapter->ModeInfo.bBitsPerPixel)
  1294.               {
  1295.                 case 4:
  1296.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1297.                   {
  1298.                     case 85:
  1299.                     case 75:
  1300.  
  1301.                       _outpw(crtcport, 0x0e11);
  1302.                       _outpw(crtcport, 0x7f00);
  1303.                       _outpw(crtcport, 0x6302);
  1304.                       _outpw(crtcport, 0x6804);
  1305.                       _outpw(crtcport, 0x1205);
  1306.                       _outpw(crtcport, 0x6f06);
  1307.                       _outpw(crtcport, 0xe007);
  1308.  
  1309.                       _outpw(crtcport, 0x5810);
  1310.                       _outpw(crtcport, 0x8b11);
  1311.                       _outpw(crtcport, 0x0016);
  1312.  
  1313.                       _outpw(crtcport, 0xa052);
  1314.                       _outpw(crtcport, 0xf55b);
  1315.                       _outpw(crtcport, 0x085d);
  1316.  
  1317.                       _outpw(crtcport, 0x783b);
  1318.                       _outpw(crtcport, 0x3f3c);
  1319.  
  1320.                       r0 = 0x51;
  1321.                       r1 = 0x2a;
  1322.                       r2 = 0x55;
  1323.                       r3 = 0x29;
  1324.                       r4 = 0x00;
  1325.                       break;
  1326.  
  1327.                     case 72:
  1328.  
  1329.                       _outpw(crtcport, 0x0e11);
  1330.  
  1331.                       _outpw(crtcport, 0x7d00);
  1332.                       _outpw(crtcport, 0x6302);
  1333.                       _outpw(crtcport, 0x6d04);
  1334.                       _outpw(crtcport, 0x1c05);
  1335.                       _outpw(crtcport, 0x9906);
  1336.                       _outpw(crtcport, 0xf007);
  1337.  
  1338.                       _outpw(crtcport, 0x7c10);
  1339.                       _outpw(crtcport, 0xa211);
  1340.                       _outpw(crtcport, 0x9916);
  1341.  
  1342.                       _outpw(crtcport, 0x1052);
  1343.                       _outpw(crtcport, 0xd15b);
  1344.                       _outpw(crtcport, 0x085d);
  1345.  
  1346.                       _outpw(crtcport, 0x763b);
  1347.                       _outpw(crtcport, 0x3e3c);
  1348.  
  1349.                       r0 = 0x60;
  1350.                       r1 = 0x2c;
  1351.                       r2 = 0x55;
  1352.                       r3 = 0x29;
  1353.                       r4 = 0x00;
  1354.                       break;
  1355.  
  1356.                     case 56:
  1357.  
  1358.                       _outpw(crtcport, 0x0e11);
  1359.  
  1360.                       _outpw(crtcport, 0x7b00);
  1361.                       _outpw(crtcport, 0x6402);
  1362.                       _outpw(crtcport, 0x6a04);
  1363.                       _outpw(crtcport, 0x1305);
  1364.                       _outpw(crtcport, 0x7006);
  1365.                       _outpw(crtcport, 0xf007);
  1366.  
  1367.                       _outpw(crtcport, 0x5810);
  1368.                       _outpw(crtcport, 0x8a11);
  1369.                       _outpw(crtcport, 0x0016);
  1370.  
  1371.                       _outpw(crtcport, 0x0052);
  1372.                       _outpw(crtcport, 0xa85b);
  1373.                       _outpw(crtcport, 0x005d);
  1374.  
  1375.                       _outpw(crtcport, 0x743b);
  1376.                       _outpw(crtcport, 0x3d3c);
  1377.  
  1378.                       r0 = 0x77;
  1379.                       r1 = 0x4a;
  1380.                       r2 = 0x55;
  1381.                       r3 = 0x29;
  1382.                       r4 = 0x00;
  1383.                       break;
  1384.  
  1385.                     default: /*60*/
  1386.  
  1387.                       _outpw(crtcport, 0x0e11);
  1388.  
  1389.                       _outpw(crtcport, 0x7f00);
  1390.                       _outpw(crtcport, 0x6302);
  1391.                       _outpw(crtcport, 0x6b04);
  1392.                       _outpw(crtcport, 0x1b05);
  1393.                       _outpw(crtcport, 0x7206);
  1394.                       _outpw(crtcport, 0xf007);
  1395.  
  1396.                       _outpw(crtcport, 0x5810);
  1397.                       _outpw(crtcport, 0x8c11);
  1398.                       _outpw(crtcport, 0x0016);
  1399.  
  1400.                       _outpw(crtcport, 0x8052);
  1401.                       _outpw(crtcport, 0xa85b);
  1402.                       _outpw(crtcport, 0x085d);
  1403.  
  1404.                       _outpw(crtcport, 0x783b);
  1405.                       _outpw(crtcport, 0x3f3c);
  1406.  
  1407.                       r0 = 0x5d;
  1408.                       r1 = 0x2f;
  1409.                       r2 = 0x55;
  1410.                       r3 = 0x29;
  1411.                       r4 = 0x00;
  1412.                       break;           /*from vrtrefresh*/
  1413.                   }                    /*end vrtrefresh*/
  1414.                   break;               /*from bpp*/
  1415.  
  1416.                 case 8:
  1417.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1418.                   {
  1419.                     case 85:
  1420.                       _outpw(crtcport, 0x0e11);
  1421.  
  1422.                       _outpw(crtcport, 0x7f00);
  1423.                       _outpw(crtcport, 0x6302);
  1424.                       _outpw(crtcport, 0x6904);
  1425.                       _outpw(crtcport, 0x0f05);
  1426.                       _outpw(crtcport, 0x7506);
  1427.                       _outpw(crtcport, 0xe007);
  1428.  
  1429.                       _outpw(crtcport, 0x5710);
  1430.                       _outpw(crtcport, 0x8a11);
  1431.                       _outpw(crtcport, 0x7416);
  1432.  
  1433.                       _outpw(crtcport, 0x4052);
  1434.                       _outpw(crtcport, 0xf65b);
  1435.                       _outpw(crtcport, 0x085d);
  1436.  
  1437.                       _outpw(crtcport, 0x783b);
  1438.                       _outpw(crtcport, 0x3f3c);
  1439.  
  1440.                       r0 = 0x55;
  1441.                       r1 = 0x29;
  1442.                       r2 = 0x55;
  1443.                       r3 = 0x29;
  1444.                       r4 = 0x00;
  1445.                       break;
  1446.  
  1447.                     case 75:
  1448.                       _outpw(crtcport, 0x0e11);
  1449.  
  1450.                       _outpw(crtcport, 0x7f00);
  1451.                       _outpw(crtcport, 0x6302);
  1452.                       _outpw(crtcport, 0x6604);
  1453.                       _outpw(crtcport, 0x1005);
  1454.                       _outpw(crtcport, 0x6f06);
  1455.                       _outpw(crtcport, 0xe007);
  1456.  
  1457.                       _outpw(crtcport, 0x5810);
  1458.                       _outpw(crtcport, 0x8b11);
  1459.                       _outpw(crtcport, 0x0016);
  1460.  
  1461.                       _outpw(crtcport, 0xa052);
  1462.                       _outpw(crtcport, 0xf55b);
  1463.                       _outpw(crtcport, 0x085d);
  1464.  
  1465.                       _outpw(crtcport, 0x783b);
  1466.                       _outpw(crtcport, 0x3f3c);
  1467.  
  1468.                       r0 = 0x51;
  1469.                       r1 = 0x2a;
  1470.                       r2 = 0x55;
  1471.                       r3 = 0x29;
  1472.                       r4 = 0x00;
  1473.                       break;
  1474.  
  1475.                     case 72:
  1476.                       _outpw(crtcport, 0x0e11);
  1477.  
  1478.                       _outpw(crtcport, 0x7d00);
  1479.                       _outpw(crtcport, 0x6302);
  1480.                       _outpw(crtcport, 0x6b04);
  1481.                       _outpw(crtcport, 0x1a05);
  1482.                       _outpw(crtcport, 0x9906);
  1483.                       _outpw(crtcport, 0xf007);
  1484.  
  1485.                       _outpw(crtcport, 0x7c10);
  1486.                       _outpw(crtcport, 0xa211);
  1487.                       _outpw(crtcport, 0x9916);
  1488.  
  1489.                       _outpw(crtcport, 0x1052);
  1490.                       _outpw(crtcport, 0xd15b);
  1491.                       _outpw(crtcport, 0x085d);
  1492.  
  1493.                       _outpw(crtcport, 0x763b);
  1494.                       _outpw(crtcport, 0x3e3c);
  1495.  
  1496.                       r0 = 0x60;
  1497.                       r1 = 0x2c;
  1498.                       r2 = 0x55;
  1499.                       r3 = 0x29;
  1500.                       r4 = 0x00;
  1501.                       break;
  1502.  
  1503.                     case 56:
  1504.                       _outpw(crtcport, 0x0e11);
  1505.  
  1506.                       _outpw(crtcport, 0x7b00);
  1507.                       _outpw(crtcport, 0x6402);
  1508.                       _outpw(crtcport, 0x6804);
  1509.                       _outpw(crtcport, 0x1105);
  1510.                       _outpw(crtcport, 0x7006);
  1511.                       _outpw(crtcport, 0xf007);
  1512.  
  1513.                       _outpw(crtcport, 0x5810);
  1514.                       _outpw(crtcport, 0x8a11);
  1515.                       _outpw(crtcport, 0x0016);
  1516.  
  1517.                       _outpw(crtcport, 0x0052);
  1518.                       _outpw(crtcport, 0xa85b);
  1519.                       _outpw(crtcport, 0x005d);
  1520.  
  1521.                       _outpw(crtcport, 0x743b);
  1522.                       _outpw(crtcport, 0x3d3c);
  1523.  
  1524.                       r0 = 0x77;
  1525.                       r1 = 0x4a;
  1526.                       r2 = 0x55;
  1527.                       r3 = 0x29;
  1528.                       r4 = 0x00;
  1529.                       break;
  1530.  
  1531.  
  1532.                     default: /*60*/
  1533.                       _outpw(crtcport, 0x0e11);
  1534.  
  1535.                       _outpw(crtcport, 0x7f00);
  1536.                       _outpw(crtcport, 0x6302);
  1537.                       _outpw(crtcport, 0x6904);
  1538.                       _outpw(crtcport, 0x1905);
  1539.                       _outpw(crtcport, 0x7206);
  1540.                       _outpw(crtcport, 0xf007);
  1541.  
  1542.                       _outpw(crtcport, 0x5810);
  1543.                       _outpw(crtcport, 0x8c11);
  1544.                       _outpw(crtcport, 0x0016);
  1545.  
  1546.                       _outpw(crtcport, 0x8052);
  1547.                       _outpw(crtcport, 0xa85b);
  1548.                       _outpw(crtcport, 0x085d);
  1549.  
  1550.                       _outpw(crtcport, 0x783b);
  1551.                       _outpw(crtcport, 0x3f3c);
  1552.  
  1553.                       r0 = 0x5d;
  1554.                       r1 = 0x2f;
  1555.                       r2 = 0x55;
  1556.                       r3 = 0x29;
  1557.                       r4 = 0x00;
  1558.                       break;           /*from vrtrefresh*/
  1559.                   }                    /*end vrtrefresh*/
  1560.                   break;               /*from bpp*/
  1561.  
  1562.                 case 16:
  1563.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1564.                   {
  1565.                     case 85:
  1566.                     case 75:
  1567.                       _outpw(crtcport, 0x0e11);
  1568.  
  1569.                       _outpw(crtcport, 0x0400);
  1570.                       _outpw(crtcport, 0x8703);
  1571.                       _outpw(crtcport, 0xcd04);
  1572.                       _outpw(crtcport, 0x0105);
  1573.                       _outpw(crtcport, 0x6f06);
  1574.  
  1575.                       _outpw(crtcport, 0x5810);
  1576.                       _outpw(crtcport, 0x8b11);
  1577.                       _outpw(crtcport, 0x0016);
  1578.  
  1579.                       _outpw(crtcport, 0xa052);
  1580.                       _outpw(crtcport, 0x9054);
  1581.                       _outpw(crtcport, 0xf55b);
  1582.  
  1583.                       _outpw(crtcport, 0xfd3b);
  1584.                       _outpw(crtcport, 0x823c);
  1585.  
  1586.                       r0 = 0x51;
  1587.                       r1 = 0x2a;
  1588.                       r2 = 0x55;
  1589.                       r3 = 0x29;
  1590.                       r4 = 0x50;
  1591.                       break;
  1592.  
  1593.                     case 72:
  1594.                       _outpw(crtcport, 0x0e11);
  1595.  
  1596.                       _outpw(crtcport, 0x0000);
  1597.                       _outpw(crtcport, 0x8303);
  1598.                       _outpw(crtcport, 0xd704);
  1599.                       _outpw(crtcport, 0x1505);
  1600.                       _outpw(crtcport, 0x9906);
  1601.  
  1602.                       _outpw(crtcport, 0x7c10);
  1603.                       _outpw(crtcport, 0x8211);
  1604.                       _outpw(crtcport, 0x9916);
  1605.  
  1606.                       _outpw(crtcport, 0x1052);
  1607.                       _outpw(crtcport, 0x9054);
  1608.                       _outpw(crtcport, 0xd15b);
  1609.  
  1610.                       _outpw(crtcport, 0xf93b);
  1611.                       _outpw(crtcport, 0x803c);
  1612.  
  1613.                       r0 = 0x60;
  1614.                       r1 = 0x2c;
  1615.                       r2 = 0x55;
  1616.                       r3 = 0x29;
  1617.                       r4 = 0x50;
  1618.                       break;
  1619.  
  1620.                     default:           /*56,60*/
  1621.                       _outpw(crtcport, 0x0e11);
  1622.  
  1623.                       _outpw(crtcport, 0x0300);
  1624.                       _outpw(crtcport, 0x8603);
  1625.                       _outpw(crtcport, 0xd304);
  1626.                       _outpw(crtcport, 0x1305);
  1627.                       _outpw(crtcport, 0x7206);
  1628.  
  1629.                       _outpw(crtcport, 0x5810);
  1630.                       _outpw(crtcport, 0x8c11);
  1631.                       _outpw(crtcport, 0x0016);
  1632.  
  1633.                       _outpw(crtcport, 0x8052);
  1634.                       _outpw(crtcport, 0xb854);
  1635.                       _outpw(crtcport, 0xa85b);
  1636.  
  1637.                       _outpw(crtcport, 0xfc3b);
  1638.                       _outpw(crtcport, 0x813c);
  1639.  
  1640.                       r0 = 0x5d;
  1641.                       r1 = 0x2f;
  1642.                       r2 = 0x55;
  1643.                       r3 = 0x29;
  1644.                       r4 = 0x50;
  1645.                       break;           /*from vrtrefresh*/
  1646.                   }                    /*end vrtrefresh*/
  1647.                   break;               /*from bpp*/
  1648.  
  1649.               }                        /*end bpp switch*/
  1650.               break;                   /*from xresolution*/
  1651.  
  1652.             case 1024:
  1653.               switch(pAdapter->ModeInfo.bBitsPerPixel)
  1654.               {
  1655.                 case 4:
  1656.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1657.                   {
  1658.                     case 75:
  1659.                     case 72:
  1660.                       _outpw(crtcport, 0x0e11);
  1661.  
  1662.                       _outpw(crtcport, 0xa200);
  1663.                       _outpw(crtcport, 0x8303);
  1664.                       _outpw(crtcport, 0x8404);
  1665.                       _outpw(crtcport, 0x9005);
  1666.                       _outpw(crtcport, 0x1f06);
  1667.                       _outpw(crtcport, 0xfd07);
  1668.                       _outpw(crtcport, 0x6009);
  1669.  
  1670.                       _outpw(crtcport, 0x0110);
  1671.                       _outpw(crtcport, 0x8411);
  1672.                       _outpw(crtcport, 0xff12);
  1673.                       _outpw(crtcport, 0x0015);
  1674.                       _outpw(crtcport, 0x0016);
  1675.                       _outpw(crtcport, 0xeb17);
  1676.  
  1677.  
  1678.                       _outpw(crtcport, 0x0634);
  1679.                       _outpw(crtcport, 0x9b3b);
  1680.                       _outpw(crtcport, 0x513c);
  1681.  
  1682.                       _outpw(crtcport, 0x0242);
  1683.  
  1684.                       r0 = 0x41;
  1685.                       r1 = 0x0a;
  1686.                       r2 = 0x55;
  1687.                       r3 = 0x29;
  1688.                       r4 = 0x00;
  1689.                       break;
  1690.  
  1691.                     case 70:
  1692.                       _outpw(crtcport, 0x0e11);
  1693.  
  1694.                       _outpw(crtcport, 0xa200);
  1695.                       _outpw(crtcport, 0x8503);
  1696.                       _outpw(crtcport, 0x8504);
  1697.                       _outpw(crtcport, 0x9605);
  1698.                       _outpw(crtcport, 0x1f06);
  1699.                       _outpw(crtcport, 0xf507);
  1700.                       _outpw(crtcport, 0x6009);
  1701.  
  1702.                       _outpw(crtcport, 0x0210);
  1703.                       _outpw(crtcport, 0x8811);
  1704.                       _outpw(crtcport, 0xff12);
  1705.                       _outpw(crtcport, 0xff15);
  1706.                       _outpw(crtcport, 0x1f16);
  1707.                       _outpw(crtcport, 0xe317);
  1708.  
  1709.                       _outpw(crtcport, 0x8052);
  1710.                       _outpw(crtcport, 0xac5b);
  1711.                       _outpw(crtcport, 0x005d);
  1712.                       _outpw(crtcport, 0x0167);
  1713.  
  1714.                       _outpw(crtcport, 0x0234);
  1715.                       _outpw(crtcport, 0x9b3b);
  1716.                       _outpw(crtcport, 0x513c);
  1717.  
  1718.                       _outpw(crtcport, 0x0242);
  1719.  
  1720.                       r0 = 0x28;
  1721.                       r1 = 0x22;
  1722.                       r2 = 0x55;
  1723.                       r3 = 0x29;
  1724.                       r4 = 0x00;
  1725.                       break;
  1726.  
  1727.                     case 43:
  1728.                       _outpw(crtcport, 0x0e11);
  1729.  
  1730.                       _outpw(crtcport, 0x9a00);
  1731.                       _outpw(crtcport, 0x9d03);
  1732.                       _outpw(crtcport, 0x8304);
  1733.                       _outpw(crtcport, 0x1905);
  1734.                       _outpw(crtcport, 0x9706);
  1735.                       _outpw(crtcport, 0x1f07);
  1736.                       _outpw(crtcport, 0x4009);
  1737.  
  1738.                       _outpw(crtcport, 0x8010);
  1739.                       _outpw(crtcport, 0x8411);
  1740.                       _outpw(crtcport, 0x7f12);
  1741.                       _outpw(crtcport, 0x8015);
  1742.                       _outpw(crtcport, 0x0016);
  1743.                       _outpw(crtcport, 0xe317);
  1744.  
  1745.                       _outpw(crtcport, 0x8052);
  1746.                       _outpw(crtcport, 0xa05b);
  1747.                       _outpw(crtcport, 0x005d);
  1748.                       _outpw(crtcport, 0x0067);
  1749.  
  1750.                       _outpw(crtcport, 0x0634);
  1751.                       _outpw(crtcport, 0x933b);
  1752.                       _outpw(crtcport, 0x4d3c);
  1753.  
  1754.                       _outpw(crtcport, 0x2242);
  1755.  
  1756.                       r0 = 0x56;
  1757.                       r1 = 0x45;
  1758.                       r2 = 0x55;
  1759.                       r3 = 0x29;
  1760.                       r4 = 0x00;
  1761.                       break;
  1762.  
  1763.                     default:           /*60*/
  1764.                       _outpw(crtcport, 0x0e11);
  1765.  
  1766.                       _outpw(crtcport, 0xa400);
  1767.                       _outpw(crtcport, 0x8703);
  1768.                       _outpw(crtcport, 0x8504);
  1769.                       _outpw(crtcport, 0x9605);
  1770.                       _outpw(crtcport, 0x2006);
  1771.                       _outpw(crtcport, 0xf507);
  1772.                       _outpw(crtcport, 0x6009);
  1773.  
  1774.                       _outpw(crtcport, 0x0210);
  1775.                       _outpw(crtcport, 0x8811);
  1776.                       _outpw(crtcport, 0xff12);
  1777.                       _outpw(crtcport, 0xff15);
  1778.                       _outpw(crtcport, 0x2016);
  1779.                       _outpw(crtcport, 0xe317);
  1780.  
  1781.                       _outpw(crtcport, 0x8052);
  1782.                       _outpw(crtcport, 0xa85b);
  1783.                       _outpw(crtcport, 0x005d);
  1784.                       _outpw(crtcport, 0x0067);
  1785.  
  1786.                       _outpw(crtcport, 0x0234);
  1787.                       _outpw(crtcport, 0x9d3b);
  1788.                       _outpw(crtcport, 0x523c);
  1789.  
  1790.                       _outpw(crtcport, 0x0242);
  1791.  
  1792.                       r0 = 0x6b;
  1793.                       r1 = 0x44;
  1794.                       r2 = 0x55;
  1795.                       r3 = 0x29;
  1796.                       r4 = 0x00;
  1797.                       break;           /*from vrtrefresh*/
  1798.                   }                    /*end vrtrefresh*/
  1799.                   break;               /*from bpp*/
  1800.  
  1801.                 case 8:
  1802.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1803.                   {
  1804.                     case 75:
  1805.                     case 72:
  1806.                       _outpw(crtcport, 0x0e11);
  1807.  
  1808.                       _outpw(crtcport, 0xa200);
  1809.                       _outpw(crtcport, 0x8303);
  1810.                       _outpw(crtcport, 0x8204);
  1811.                       _outpw(crtcport, 0x8e05);
  1812.                       _outpw(crtcport, 0x1f06);
  1813.                       _outpw(crtcport, 0xfd07);
  1814.                       _outpw(crtcport, 0x6009);
  1815.  
  1816.                       _outpw(crtcport, 0x0110);
  1817.                       _outpw(crtcport, 0x8411);
  1818.                       _outpw(crtcport, 0xff12);
  1819.                       _outpw(crtcport, 0x0015);
  1820.                       _outpw(crtcport, 0x0016);
  1821.                       _outpw(crtcport, 0xeb17);
  1822.  
  1823.                       _outpw(crtcport, 0xa052);
  1824.                       _outpw(crtcport, 0xf55b);
  1825.                       _outpw(crtcport, 0x005d);
  1826.                       _outpw(crtcport, 0x0167);
  1827.  
  1828.                       _outpw(crtcport, 0x1434);
  1829.                       _outpw(crtcport, 0x9b3b);
  1830.                       _outpw(crtcport, 0x513c);
  1831.  
  1832.                       _outpw(crtcport, 0x0242);
  1833.  
  1834.                       r0 = 0x41;
  1835.                       r1 = 0x0a;
  1836.                       r2 = 0x55;
  1837.                       r3 = 0x29;
  1838.                       r4 = 0x00;
  1839.                       break;
  1840.  
  1841.                     case 70:
  1842.                       _outpw(crtcport, 0x0e11);
  1843.  
  1844.                       _outpw(crtcport, 0xa200);
  1845.                       _outpw(crtcport, 0x8503);
  1846.                       _outpw(crtcport, 0x8304);
  1847.                       _outpw(crtcport, 0x9405);
  1848.                       _outpw(crtcport, 0x1f06);
  1849.                       _outpw(crtcport, 0xf507);
  1850.                       _outpw(crtcport, 0x6009);
  1851.  
  1852.                       _outpw(crtcport, 0x0210);
  1853.                       _outpw(crtcport, 0x8811);
  1854.                       _outpw(crtcport, 0xff12);
  1855.                       _outpw(crtcport, 0xff15);
  1856.                       _outpw(crtcport, 0x1f16);
  1857.                       _outpw(crtcport, 0xe317);
  1858.  
  1859.                       _outpw(crtcport, 0x8052);
  1860.                       _outpw(crtcport, 0xac5b);
  1861.                       _outpw(crtcport, 0x005d);
  1862.                       _outpw(crtcport, 0x0167);
  1863.  
  1864.                       _outpw(crtcport, 0x1034);
  1865.                       _outpw(crtcport, 0x9b3b);
  1866.                       _outpw(crtcport, 0x513c);
  1867.  
  1868.                       _outpw(crtcport, 0x0242);
  1869.  
  1870.                       r0 = 0x28;
  1871.                       r1 = 0x22;
  1872.                       r2 = 0x55;
  1873.                       r3 = 0x29;
  1874.                       r4 = 0x00;
  1875.                       break;
  1876.  
  1877.                     case 43:
  1878.                       _outpw(crtcport, 0x0e11);
  1879.  
  1880.                       _outpw(crtcport, 0x9a00);
  1881.                       _outpw(crtcport, 0x9d03);
  1882.                       _outpw(crtcport, 0x8104);
  1883.                       _outpw(crtcport, 0x1705);
  1884.                       _outpw(crtcport, 0x9706);
  1885.                       _outpw(crtcport, 0x1f07);
  1886.                       _outpw(crtcport, 0x4009);
  1887.  
  1888.                       _outpw(crtcport, 0x8010);
  1889.                       _outpw(crtcport, 0x8411);
  1890.                       _outpw(crtcport, 0x7f12);
  1891.                       _outpw(crtcport, 0x8015);
  1892.                       _outpw(crtcport, 0x0016);
  1893.                       _outpw(crtcport, 0xe317);
  1894.  
  1895.                       _outpw(crtcport, 0x8052);
  1896.                       _outpw(crtcport, 0xa05b);
  1897.                       _outpw(crtcport, 0x005d);
  1898.                       _outpw(crtcport, 0x0067);
  1899.  
  1900.                       _outpw(crtcport, 0x1434);
  1901.                       _outpw(crtcport, 0x933b);
  1902.                       _outpw(crtcport, 0x4d3c);
  1903.  
  1904.                       _outpw(crtcport, 0x2242);
  1905.  
  1906.                       r0 = 0x56;
  1907.                       r1 = 0x45;
  1908.                       r2 = 0x55;
  1909.                       r3 = 0x29;
  1910.                       r4 = 0x00;
  1911.                       break;
  1912.  
  1913.                     default:           /*60*/
  1914.                       _outpw(crtcport, 0x0e11);
  1915.  
  1916.                       _outpw(crtcport, 0xa400);
  1917.                       _outpw(crtcport, 0x8703);
  1918.                       _outpw(crtcport, 0x8304);
  1919.                       _outpw(crtcport, 0x9405);
  1920.                       _outpw(crtcport, 0x2006);
  1921.                       _outpw(crtcport, 0xf507);
  1922.                       _outpw(crtcport, 0x6009);
  1923.  
  1924.                       _outpw(crtcport, 0x0210);
  1925.                       _outpw(crtcport, 0x8811);
  1926.                       _outpw(crtcport, 0xff12);
  1927.                       _outpw(crtcport, 0xff15);
  1928.                       _outpw(crtcport, 0x2016);
  1929.                       _outpw(crtcport, 0xe317);
  1930.  
  1931.                       _outpw(crtcport, 0x8052);
  1932.                       _outpw(crtcport, 0xa85b);
  1933.                       _outpw(crtcport, 0x005d);
  1934.                       _outpw(crtcport, 0x0067);
  1935.  
  1936.                       _outpw(crtcport, 0x1034);
  1937.                       _outpw(crtcport, 0x9d3b);
  1938.                       _outpw(crtcport, 0x523c);
  1939.  
  1940.                       _outpw(crtcport, 0x0242);
  1941.  
  1942.                       r0 = 0x6b;
  1943.                       r1 = 0x44;
  1944.                       r2 = 0x55;
  1945.                       r3 = 0x29;
  1946.                       r4 = 0x00;
  1947.                       break;           /*from vrtrefresh*/
  1948.                   }                    /*end vrtrefresh*/
  1949.                   break;               /*from bpp*/
  1950.  
  1951.                 case 16:
  1952.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  1953.                   {
  1954.                     case 75:
  1955.                     case 72:
  1956.                       _outpw(crtcport, 0x0e11);
  1957.  
  1958.                       _outpw(crtcport, 0x4800);
  1959.                       _outpw(crtcport, 0x8803);
  1960.                       _outpw(crtcport, 0x0504);
  1961.                       _outpw(crtcport, 0x1d05);
  1962.                       _outpw(crtcport, 0x1f06);
  1963.                       _outpw(crtcport, 0xfd07);
  1964.                       _outpw(crtcport, 0x6009);
  1965.  
  1966.                       _outpw(crtcport, 0x0110);
  1967.                       _outpw(crtcport, 0x8411);
  1968.                       _outpw(crtcport, 0xff12);
  1969.                       _outpw(crtcport, 0x0015);
  1970.                       _outpw(crtcport, 0x0016);
  1971.                       _outpw(crtcport, 0xeb17);
  1972.  
  1973.                       _outpw(crtcport, 0xa052);
  1974.                       _outpw(crtcport, 0x2854);
  1975.                       _outpw(crtcport, 0xf55b);
  1976.                       _outpw(crtcport, 0x5d5d);
  1977.                       _outpw(crtcport, 0x5167);
  1978.  
  1979.                       _outpw(crtcport, 0x1434);
  1980.                       _outpw(crtcport, 0x413b);
  1981.                       _outpw(crtcport, 0xa43c);
  1982.  
  1983.                       _outpw(crtcport, 0x0242);
  1984.                       r0 = 0x41;
  1985.                       r1 = 0x0a;
  1986.                       r2 = 0x55;
  1987.                       r3 = 0x29;
  1988.                       r4 = 0x50;
  1989.                       break;
  1990.  
  1991.                     case 70:
  1992.                       _outpw(crtcport, 0x0e11);
  1993.  
  1994.                       _outpw(crtcport, 0x4900);
  1995.                       _outpw(crtcport, 0x8903);
  1996.                       _outpw(crtcport, 0x0704);
  1997.                       _outpw(crtcport, 0x0905);
  1998.                       _outpw(crtcport, 0x1f06);
  1999.                       _outpw(crtcport, 0xf507);
  2000.                       _outpw(crtcport, 0x6009);
  2001.  
  2002.                       _outpw(crtcport, 0x0210);
  2003.                       _outpw(crtcport, 0x8811);
  2004.                       _outpw(crtcport, 0xff12);
  2005.                       _outpw(crtcport, 0xff15);
  2006.                       _outpw(crtcport, 0x1f16);
  2007.                       _outpw(crtcport, 0xe317);
  2008.  
  2009.                       _outpw(crtcport, 0x8052);
  2010.                       _outpw(crtcport, 0x2854);
  2011.                       _outpw(crtcport, 0xac5b);
  2012.                       _outpw(crtcport, 0x7d5d);
  2013.                       _outpw(crtcport, 0x5167);
  2014.  
  2015.                       _outpw(crtcport, 0x1034);
  2016.                       _outpw(crtcport, 0x423b);
  2017.                       _outpw(crtcport, 0xa43c);
  2018.  
  2019.                       _outpw(crtcport, 0x0242);
  2020.  
  2021.                       r0 = 0x28;
  2022.                       r1 = 0x22;
  2023.                       r2 = 0x55;
  2024.                       r3 = 0x29;
  2025.                       r4 = 0x50;
  2026.                       break;
  2027.  
  2028.                     case 43:
  2029.                       _outpw(crtcport, 0x0e11);
  2030.  
  2031.                       _outpw(crtcport, 0x3800);
  2032.                       _outpw(crtcport, 0x8003);
  2033.                       _outpw(crtcport, 0x0304);
  2034.                       _outpw(crtcport, 0x0f05);
  2035.                       _outpw(crtcport, 0x9706);
  2036.                       _outpw(crtcport, 0x1f07);
  2037.                       _outpw(crtcport, 0x4009);
  2038.  
  2039.                       _outpw(crtcport, 0x8010);
  2040.                       _outpw(crtcport, 0x8411);
  2041.                       _outpw(crtcport, 0x7f12);
  2042.                       _outpw(crtcport, 0x8015);
  2043.                       _outpw(crtcport, 0x0016);
  2044.                       _outpw(crtcport, 0xa317);
  2045.  
  2046.                       _outpw(crtcport, 0x8052);
  2047.                       _outpw(crtcport, 0x7854);
  2048.                       _outpw(crtcport, 0xa05b);
  2049.                       _outpw(crtcport, 0x755d);
  2050.                       _outpw(crtcport, 0x5067);
  2051.  
  2052.                       _outpw(crtcport, 0x1434);
  2053.                       _outpw(crtcport, 0x313b);
  2054.                       _outpw(crtcport, 0x9c3c);
  2055.  
  2056.                       _outpw(crtcport, 0x2242);
  2057.  
  2058.                       r0 = 0x56;
  2059.                       r1 = 0x45;
  2060.                       r2 = 0x55;
  2061.                       r3 = 0x29;
  2062.                       r4 = 0x50;
  2063.                       break;
  2064.  
  2065.                     default:           /*60*/
  2066.                       _outpw(crtcport, 0x0e11);
  2067.  
  2068.                       _outpw(crtcport, 0x4d00);
  2069.                       _outpw(crtcport, 0x8d03);
  2070.                       _outpw(crtcport, 0x0704);
  2071.                       _outpw(crtcport, 0x0905);
  2072.                       _outpw(crtcport, 0x2506);
  2073.                       _outpw(crtcport, 0xf507);
  2074.                       _outpw(crtcport, 0x6009);
  2075.  
  2076.                       _outpw(crtcport, 0x0210);
  2077.                       _outpw(crtcport, 0x8811);
  2078.                       _outpw(crtcport, 0xff12);
  2079.                       _outpw(crtcport, 0xff15);
  2080.                       _outpw(crtcport, 0x2516);
  2081.                       _outpw(crtcport, 0xe317);
  2082.  
  2083.                       _outpw(crtcport, 0x8052);
  2084.                       _outpw(crtcport, 0x4854);
  2085.                       _outpw(crtcport, 0xa85b);
  2086.                       _outpw(crtcport, 0x7d5d);
  2087.                       _outpw(crtcport, 0x5067);
  2088.  
  2089.                       _outpw(crtcport, 0x1034);
  2090.                       _outpw(crtcport, 0x463b);
  2091.                       _outpw(crtcport, 0xa63c);
  2092.  
  2093.                       _outpw(crtcport, 0x0242);
  2094.  
  2095.                       r0 = 0x6b;
  2096.                       r1 = 0x44;
  2097.                       r2 = 0x55;
  2098.                       r3 = 0x29;
  2099.                       r4 = 0x50;
  2100.                       break;           /*from vrtrefresh*/
  2101.                   }                    /*end vrtrefresh*/
  2102.                   break;               /*from bpp*/
  2103.  
  2104.               }                        /*end bpp switch*/
  2105.               break;                   /*from xresolution*/
  2106.  
  2107.             case 1280:
  2108.               switch(pAdapter->ModeInfo.bBitsPerPixel)
  2109.               {
  2110.                 case 8:
  2111.                   switch(pAdapter->ModeInfo.bVrtRefresh)
  2112.                   {
  2113.                     case 75:       /*just do 60*/
  2114.                     case 72:
  2115.                     case 60:
  2116.                       _outpw(crtcport, 0x0e11);
  2117.  
  2118.                       _outpw(crtcport, 0xd900);
  2119.                       _outpw(crtcport, 0xa002);
  2120.                       _outpw(crtcport, 0x9c03);
  2121.                       _outpw(crtcport, 0xa504);
  2122.                       _outpw(crtcport, 0x1d05);
  2123.                       _outpw(crtcport, 0x1e06);
  2124.                       _outpw(crtcport, 0x5207);
  2125.                       _outpw(crtcport, 0x4009);
  2126.  
  2127.                       _outpw(crtcport, 0x0310);
  2128.                       _outpw(crtcport, 0x8611);
  2129.                       _outpw(crtcport, 0x0016);
  2130.  
  2131.                       _outpw(crtcport, 0x8052);
  2132.                       _outpw(crtcport, 0x5054);
  2133.                       _outpw(crtcport, 0xa85b);
  2134.                       _outpw(crtcport, 0x555e);
  2135.                       _outpw(crtcport, 0x1067);
  2136.  
  2137.                       _outpw(crtcport, 0x1434);
  2138.                       _outpw(crtcport, 0xd23b);
  2139.                       _outpw(crtcport, 0x6c3c);
  2140.  
  2141.                       _outpw(crtcport, 0x0242);
  2142.  
  2143.                       r0 = 0x7b;
  2144.                       r1 = 0x26;
  2145.                       r2 = 0x55;
  2146.                       r3 = 0x29;
  2147.                       r4 = 0x10;
  2148.                       break;           /*from vrtrefresh*/
  2149.  
  2150.                     default:                     /*45 int*/
  2151.                       _outpw(crtcport, 0x0e11);
  2152.  
  2153.                       _outpw(crtcport, 0xc000);
  2154.                       _outpw(crtcport, 0x9f02);
  2155.                       _outpw(crtcport, 0x8303);
  2156.                       _outpw(crtcport, 0xa404);
  2157.                       _outpw(crtcport, 0x1f05);
  2158.                       _outpw(crtcport, 0x1806);
  2159.                       _outpw(crtcport, 0xb207);
  2160.                       _outpw(crtcport, 0x6009);
  2161.  
  2162.                       _outpw(crtcport, 0x0110);
  2163.                       _outpw(crtcport, 0x8511);
  2164.                       _outpw(crtcport, 0x1816);
  2165.  
  2166.                       _outpw(crtcport, 0x4052);
  2167.                       _outpw(crtcport, 0xa854);
  2168.                       _outpw(crtcport, 0x165b);
  2169.                       _outpw(crtcport, 0x005e);
  2170.                       _outpw(crtcport, 0x0167);
  2171.  
  2172.                       _outpw(crtcport, 0x1034);
  2173.                       _outpw(crtcport, 0xb93b);
  2174.                       _outpw(crtcport, 0x603c);
  2175.  
  2176.                       _outpw(crtcport, 0x2242);
  2177.  
  2178.                       r0 = 0x28;
  2179.                       r1 = 0x22;
  2180.                       r2 = 0x55;
  2181.                       r3 = 0x29;
  2182.                       r4 = 0x00;
  2183.                       break;
  2184.  
  2185.                   }                    /*end vrtrefresh*/
  2186.                   break;               /*from bpp*/
  2187.  
  2188.               }                        /*end bpp switch*/
  2189.               break;                   /*from xresolution*/
  2190.           }                     /*end xres switches*/
  2191.  
  2192.         }                       /*end graphics register setup for s3sdac*/
  2193.  
  2194.         SetS3SDACClock(r0, r1, r2, r3, r4);
  2195.         return rc;
  2196.       }      /*end endif for s3 & s3sdac                          @V3.0ET001*/
  2197.    }                    /* end S3_ADAPTER test           */
  2198.  
  2199.    if (OEMHardware.Manufacturer == DIAMOND_MANUFACTURER)
  2200.    {
  2201.      /*
  2202.      ** Diamond Stealth W32 adapter
  2203.      */
  2204.      if ((SVGAHardware.AdapterType == TSENG_ADAPTER) &&
  2205.         (SVGAHardware.ChipType > TSENG_ET4000_CHIP))
  2206.      {
  2207.         switch(pAdapter->ModeInfo.usXResolution)
  2208.         {
  2209.           case 640:
  2210.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2211.              {
  2212.                 case 90:
  2213.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2214.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2215.                   {
  2216.                     ClockSerialData = DIA_ClockTable[0x14];
  2217.                     break;
  2218.                   }     /* don't allow this refresh for >8 bpp */
  2219.                 case 75:
  2220.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2221.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2222.                   {
  2223.                     ClockSerialData = DIA_ClockTable[0x02];
  2224.                     break;
  2225.                   }     /* don't allow this refresh for >8 bpp */
  2226.                 case 72:
  2227.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2228.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2229.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2230.                   {
  2231.                     ClockSerialData = DIA_ClockTable[0x2];
  2232.                     break;
  2233.                   }
  2234.                 default:
  2235.                 case 60:
  2236.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2237.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2238.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2239.                   {
  2240.                     ClockSerialData = DIA_ClockTable[0x0];
  2241.                   }
  2242.                   else
  2243.                   {
  2244.                     if (StealthOldScheme)
  2245.                       ClockSerialData = DIA_ClockTable[0x07];   //3*8bpp
  2246.                     else
  2247.                       ClockSerialData = DIA_ClockTable[0x17];   //1.5*8bpp
  2248.                   }                                                                 break;
  2249.              }
  2250.              break;
  2251.           case 800:
  2252.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2253.              {
  2254.                 case 90:
  2255.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2256.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2257.                   {
  2258.                     ClockSerialData = DIA_ClockTable[0x9];
  2259.                     break;
  2260.                   }     /* don't allow this refresh for >8 bpp */
  2261.                 case 75:
  2262.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2263.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2264.                   {
  2265.                     ClockSerialData = DIA_ClockTable[0x0d];
  2266.                     break;
  2267.                   }     /* don't allow this refresh for >8 bpp */
  2268.                 case 72:
  2269.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2270.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2271.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2272.                   {
  2273.                     ClockSerialData = DIA_ClockTable[0x10];
  2274.                     break;
  2275.                   }
  2276.                 case 60:
  2277.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2278.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2279.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2280.                   {
  2281.                     ClockSerialData = DIA_ClockTable[0x04];
  2282.                     break;
  2283.                   }
  2284.                   else
  2285.                   {
  2286.                     /*
  2287.                     ** 800x600x64K is not supported unless 1072 w 2MB
  2288.                     */
  2289.                     if (!StealthOldScheme)
  2290.                       ClockSerialData = DIA_ClockTable[0x14];
  2291.                     else
  2292.                       rc = ERROR_REFRESH_NOT_SUPPORTED;
  2293.                   }
  2294.                   break;
  2295.                 default:
  2296.                 case 56:
  2297.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2298.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2299.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2300.                   {
  2301.                     ClockSerialData = DIA_ClockTable[0x03];
  2302.                     break;
  2303.                   }
  2304.                   else          /* 244 bpp */
  2305.                   {
  2306.                     /*
  2307.                     ** 800x600x64K is not supported unless 1072 w 2MB
  2308.                     */
  2309.                     if (!StealthOldScheme)
  2310.                       ClockSerialData = DIA_ClockTable[0x16];
  2311.                     else
  2312.                       rc = ERROR_REFRESH_NOT_SUPPORTED;
  2313.                   }
  2314.                   break;
  2315.              }
  2316.              break;
  2317.           case 1024:
  2318.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2319.              {
  2320.                 case 75:
  2321.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2322.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2323.                   {
  2324.                     ClockSerialData = DIA_ClockTable[0x0e];
  2325.                     break;
  2326.                   }     /* don't allow this refresh for >8 bpp */
  2327.                 case 72:
  2328.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2329.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2330.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2331.                   {
  2332.                     ClockSerialData = DIA_ClockTable[0x0b];
  2333.                     break;
  2334.                   }
  2335.                   else          /* 24 bpp */
  2336.                   {
  2337.                     /*
  2338.                     ** 1024x768x16M is not supported unless 1072 w 2MB
  2339.                     */
  2340.                     if (!StealthOldScheme)
  2341.                       ClockSerialData = DIA_ClockTable[0x15];
  2342.                     else
  2343.                       rc = ERROR_REFRESH_NOT_SUPPORTED;
  2344.                     break;
  2345.                   }
  2346.                 case 70:
  2347.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2348.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2349.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2350.                   {
  2351.                     ClockSerialData = DIA_ClockTable[0x07];
  2352.                     break;
  2353.                   }
  2354.                   else  /* 24 bpp */
  2355.                   {
  2356.                     /*
  2357.                     ** 1024x768x16M is not supported unless 1072 w 2MB
  2358.                     */
  2359.                     if (!StealthOldScheme)
  2360.                       ClockSerialData = DIA_ClockTable[0x15];
  2361.                     else
  2362.                       rc = ERROR_REFRESH_NOT_SUPPORTED;
  2363.                     break;
  2364.                   }
  2365.                 case 60:
  2366.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2367.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2368.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2369.                   {
  2370.                     ClockSerialData = DIA_ClockTable[0x08];
  2371.                     break;
  2372.                   }
  2373.                   else  /* 24 bpp */
  2374.                   {
  2375.                     /*
  2376.                     ** 1024x768x16M is not supported unless 1072 w 2MB
  2377.                     */
  2378.                     if (!StealthOldScheme)
  2379.                       ClockSerialData = DIA_ClockTable[0x15];
  2380.                     else
  2381.                       rc = ERROR_REFRESH_NOT_SUPPORTED;
  2382.                     break;
  2383.                   }
  2384.                 default:
  2385.                 case 43:
  2386.                   if (pAdapter->ModeInfo.bBitsPerPixel == 8 ||
  2387.                       pAdapter->ModeInfo.bBitsPerPixel == 16 ||
  2388.                       pAdapter->ModeInfo.bBitsPerPixel == 4)
  2389.                   {
  2390.                     ClockSerialData = DIA_ClockTable[0x05];
  2391.                     break;
  2392.                   }
  2393.                   else  /* 24 bpp */
  2394.                   {
  2395.                     /*
  2396.                     ** 1024x768x16M is not supported unless 1072 w 2MB
  2397.                     */
  2398.                     if (!StealthOldScheme)
  2399.                       ClockSerialData = DIA_ClockTable[0x15];
  2400.                     else
  2401.                       rc = ERROR_REFRESH_NOT_SUPPORTED;
  2402.                     break;
  2403.                   }
  2404.              }
  2405.              break;
  2406.           case 1280:
  2407.              if (pAdapter->ModeInfo.bBitsPerPixel == 8)
  2408.                 ClockSerialData = DIA_ClockTable[0x12];  /* 46i supported only */
  2409.              else
  2410.                 rc = ERROR_REFRESH_NOT_SUPPORTED;
  2411.              break;
  2412.           default:
  2413.            if (!(pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS) &&     /*            */
  2414.                 (pAdapter->ModeInfo.usBytesPerScanLine == 132))
  2415.                 ClockSerialData = DIA_ClockTable[0x4];  
  2416.            else
  2417.              rc = ERROR_REFRESH_NOT_SUPPORTED;
  2418.         }
  2419.         if (!rc)
  2420.            SetDiaIDCClk(ClockSerialData);
  2421.         return (rc);                    /*            end */
  2422.      }
  2423.      /*
  2424.      ** Diamond Speedstar 24 BIOS revs 5, 6 up
  2425.      */
  2426.      BiosMajorRev = (USHORT) (OEMHardware.ManufacturerData & 0x000F);   /*            */
  2427.      if (SVGAHardware.AdapterType == TSENG_ADAPTER)
  2428.      {
  2429.        if (!(pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS))
  2430.        {
  2431.          if (pAdapter->ModeInfo.usBytesPerScanLine == 132)
  2432.              ClockSerialData = 0x8a040e;
  2433.          else if (BiosMajorRev < 6)
  2434.              ClockSerialData = 0x923506;
  2435.          else ClockSerialData = 0xa23506;
  2436.        }
  2437.        else
  2438.        {
  2439.          switch(pAdapter->ModeInfo.usXResolution)
  2440.          {
  2441.              case 640:
  2442.                switch(pAdapter->ModeInfo.bVrtRefresh)
  2443.                {
  2444.                   default:
  2445.                   case 60:
  2446.                      if (BiosMajorRev < 6)
  2447.                        ClockSerialData = 0xa23d15;
  2448.                      else ClockSerialData = 0x823d15;
  2449.                         break;
  2450.                   case 72:
  2451.                      if (BiosMajorRev < 6)
  2452.                         ClockSerialData = 0xb2c422;
  2453.                      else ClockSerialData = 0xd2c422;
  2454.                         break;
  2455.                 }
  2456.                 break;
  2457.              case 800:
  2458.                 switch(pAdapter->ModeInfo.bVrtRefresh)
  2459.                 {
  2460.                   default:
  2461.                   case 56:
  2462.                      if (BiosMajorRev < 6)
  2463.                           ClockSerialData = 0xf2842a;
  2464.                      else ClockSerialData = 0xb2842a;
  2465.                      break;
  2466.                   case 60:
  2467.                      ClockSerialData = 0x8a040e;
  2468.                      break;
  2469.                   case 72:
  2470.                      if (BiosMajorRev < 6)
  2471.                           ClockSerialData = 0xa2bc35;
  2472.                      else ClockSerialData = 0x82dc35;
  2473.                      break;
  2474.                 }
  2475.                 break;
  2476.              case 1024:
  2477.                 switch(pAdapter->ModeInfo.bVrtRefresh)
  2478.                 {
  2479.                    default:
  2480.                    case 44:             //interlaced
  2481.                       if (BiosMajorRev < 6)
  2482.                            ClockSerialData = 0xc25410;
  2483.                       else ClockSerialData = 0xcc2910;
  2484.                       break;
  2485.                    case 60:
  2486.                       if (BiosMajorRev < 6)
  2487.                            ClockSerialData = 0xb2c422;
  2488.                       else ClockSerialData = 0xd2c422;
  2489.                       break;
  2490.                    case 70:
  2491.                        ClockSerialData =0x0f21435;
  2492.                        break;
  2493.                    case 72:
  2494.                        if (BiosMajorRev < 6)
  2495.                            ClockSerialData = 0xf23427;
  2496.                        else ClockSerialData = 0x8a441e;
  2497.                        break;
  2498.                 }
  2499.                 break;
  2500.              default:
  2501.                 rc = ERROR_REFRESH_NOT_SUPPORTED;
  2502.            }
  2503.        }
  2504.        if (!rc)
  2505.           SETDIAMONDCLK(ClockSerialData);
  2506.        return rc;
  2507.      }
  2508.      /*
  2509.      ** Diamond Speedstar24X, BIOS revision 1, 2 up
  2510.      */
  2511.      else if (SVGAHardware.AdapterType == WESTERNDIG_ADAPTER)
  2512.      {
  2513.         if (!(pAdapter->ModeInfo.usType & MODE_FLAG_GRAPHICS))
  2514.         {
  2515.            if (pAdapter->ModeInfo.usBytesPerScanLine == 132)
  2516.              if (BiosMajorRev < 2)
  2517.                ClockSerialData = 0xc25410;
  2518.              else ClockSerialData = 0xaa2910;
  2519.            else if (BiosMajorRev < 2)
  2520.                ClockSerialData = 0x923506;
  2521.            else ClockSerialData = 0x86ac1e;
  2522.         }
  2523.         else
  2524.         {
  2525.           switch(pAdapter->ModeInfo.usXResolution)
  2526.           {
  2527.              case 640:
  2528.                 switch(pAdapter->ModeInfo.bVrtRefresh)
  2529.                 {
  2530.                     default:
  2531.                     case 60:
  2532.                         if (BiosMajorRev < 2)
  2533.                            ClockSerialData = 0xa23d15;
  2534.                         else ClockSerialData = 0x86ac1e;
  2535.                         break;
  2536.                     case 72:
  2537.                         if (BiosMajorRev < 2)
  2538.                            ClockSerialData = 0xd2ad33;
  2539.                         else ClockSerialData = 0x92ad33;
  2540.                         break;
  2541.                 }
  2542.                 break;
  2543.              case 800:
  2544.                 switch(pAdapter->ModeInfo.bVrtRefresh)
  2545.                 {
  2546.                     default:
  2547.                     case 56:
  2548.                         if (BiosMajorRev < 2)
  2549.                            ClockSerialData = 0xf2852a;
  2550.                         else ClockSerialData = 0xb2852a;
  2551.                         break;
  2552.                     case 60:
  2553.                         if (BiosMajorRev < 2)
  2554.                            ClockSerialData = 0xa2bc2a;
  2555.                         else ClockSerialData = 0xee153d;
  2556.                         break;
  2557.                     case 72:
  2558.                         if (BiosMajorRev < 2)
  2559.                            ClockSerialData = 0xa2bc35;
  2560.                         else ClockSerialData = 0x82dc35;
  2561.                         break;
  2562.                 }
  2563.                 break;
  2564.              case 1024:
  2565.                 switch(pAdapter->ModeInfo.bVrtRefresh)
  2566.                 {
  2567.                     default:
  2568.                     case 44:             //interlaced
  2569.                         if (BiosMajorRev < 2)
  2570.                            ClockSerialData = 0xc25410;
  2571.                         else ClockSerialData = 0xaa2910;
  2572.                         break;
  2573.                     case 60:
  2574.                         if (BiosMajorRev < 2)
  2575.                            ClockSerialData =0xb2c422;
  2576.                         else ClockSerialData = 0xd2c422;
  2577.                         break;
  2578.                     case 70:
  2579.                         ClockSerialData =0x0f21435;
  2580.                         break;
  2581.                     case 72:
  2582.                         if (BiosMajorRev < 2)
  2583.                            ClockSerialData = 0xf29423;
  2584.                         else ClockSerialData = 0x8a9423;
  2585.                         break;
  2586.                 }
  2587.                 break;
  2588.              default:
  2589.                 rc = ERROR_REFRESH_NOT_SUPPORTED;
  2590.           }
  2591.         }
  2592.         if (!rc)
  2593.         {
  2594.              SETDIAMONDCLK(ClockSerialData);
  2595.              //2nd pass for 256 color graphics modes on Bios 2
  2596.              if ((BiosMajorRev == 2) && (pAdapter->ModeInfo.bBitsPerPixel == 8))
  2597.                 SETDIAMONDCLK(0x0e6f409);
  2598.         }
  2599.         return rc;
  2600.      }
  2601.      /*
  2602.      ** Diamond Viper VLB. Viper function will also set registers to
  2603.      ** contain the r31 = hrzt, r32 = hrzs, r32 = vrtt, r33 = vrtsr.
  2604.      ** It does not program them, since we don't want to muck with
  2605.      ** getting the virtual address for it. I leave that to the calling
  2606.      ** PMI file. The PMI file also provides active display tuning function
  2607.      ** and takes care of clock doubling thru the DAC if needed.
  2608.      */
  2609.      else if (SVGAHardware.AdapterType == WEITEK_ADAPTER)
  2610.      {
  2611.         // set mem speed
  2612.         SetDiaIDCClk(0x00679c35);
  2613.         switch(pAdapter->ModeInfo.usXResolution)
  2614.         {
  2615.           case 640:
  2616.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2617.              {
  2618.                 default:
  2619.                 case 60:
  2620.                   ClockSerialData =0x045a8bc;
  2621.                   pRegs[31] = 0xC7;             //set hrzt
  2622.                   pRegs[32] = 0x17;             //set hrzsr
  2623.                   pRegs[33] = 0x20d;            //set vrtt
  2624.                   pRegs[34] = 0x01;             //set vrtsr
  2625.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2626.                   pRegs[35] = 0x21;             //set hrzbr:Screen left edge
  2627.                   pRegs[36] = 0xc1;             //set hrzbf:Screen right edge
  2628.                   pRegs[37] = 0x19;            //set vrtbr:Screen top edge
  2629.                   pRegs[38] = 0x1f9;             //set vrtbf: Screen bottom edge
  2630.                   break;
  2631.                 case 72:
  2632.                   ClockSerialData =0x04bd8b5;
  2633.                   pRegs[31] = 0xCF;             //set hrzt
  2634.                   pRegs[32] = 0x05;             //set hrzsr
  2635.                   pRegs[33] = 0x208;            //set vrtt
  2636.                   pRegs[34] = 0x03;             //set vrtsr
  2637.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2638.                   pRegs[35] = 0x25;             //set hrzbr:Screen left edge
  2639.                   pRegs[36] = 0xc5;             //set hrzbf:Screen right edge
  2640.                   pRegs[37] = 0x1f;            //set vrtbr:Screen top edge
  2641.                   pRegs[38] = 0x1ff;             //set vrtbf: Screen bottom edge
  2642.                   break;
  2643.              }
  2644.              break;
  2645.           case 800:
  2646.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2647.              {
  2648.                 default:
  2649.                 case 56:
  2650.                   ClockSerialData =0x04f54a1;
  2651.                   pRegs[31] = 0xFD;             //set hrzt
  2652.                   pRegs[32] = 0x1D;             //set hrzsr
  2653.                   pRegs[33] = 0x278;            //set vrtt
  2654.                   pRegs[34] = 0x04;             //set vrtsr
  2655.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2656.                   pRegs[35] = 0x33;             //set hrzbr:Screen left edge
  2657.                   pRegs[36] = 0xfb;             //set hrzbf:Screen right edge
  2658.                   pRegs[37] = 0x1b;            //set vrtbr:Screen top edge
  2659.                   pRegs[38] = 0x273;             //set vrtbf: Screen bottom edge
  2660.                   break;
  2661.                 case 72:
  2662.                   ClockSerialData =0x045ac3d;
  2663.                   pRegs[31] = 0x103;            //set hrzt
  2664.                   pRegs[32] = 0x1B;             //set hrzsr
  2665.                   pRegs[33] = 0x29A;            //set vrtt
  2666.                   pRegs[34] = 0x06;             //set vrtsr
  2667.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2668.                   pRegs[35] = 0x2b;             //set hrzbr:Screen left edge
  2669.                   pRegs[36] = 0xf3;             //set hrzbf:Screen right edge
  2670.                   pRegs[37] = 0x1d;             //set vrtbr:Screen top edge
  2671.                   pRegs[38] = 0x275;            //set vrtbf: Screen bottom edge
  2672.                   break;
  2673.              }
  2674.              break;
  2675.           case 1024:
  2676.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2677.              {
  2678.                 default:
  2679.                 case 60:
  2680.                   ClockSerialData =0x04d4423;
  2681.                   pRegs[31] = 0x14F;            //set hrzt
  2682.                   pRegs[32] = 0x1D;             //set hrzsr
  2683.                   pRegs[33] = 0x326;            //set vrtt
  2684.                   pRegs[34] = 0x06;             //set vrtsr
  2685.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2686.                   pRegs[35] = 0x45;             //set hrzbr:Screen left edge
  2687.                   pRegs[36] = 0x145;             //set hrzbf:Screen right edge
  2688.                   pRegs[37] = 0x23;             //set vrtbr:Screen top edge
  2689.                   pRegs[38] = 0x323;             //set vrtbf: Screen bottom edge
  2690.                   break;
  2691.                 case 70:
  2692.                   ClockSerialData =0x04FAC28;
  2693.                   pRegs[31] = 0x14B;            //set hrzt
  2694.                   pRegs[32] = 0x21;             //set hrzsr
  2695.                   pRegs[33] = 0x326;            //set vrtt
  2696.                   pRegs[34] = 0x06;             //set vrtsr
  2697.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2698.                   pRegs[35] = 0x45;             //set hrzbr:Screen left edge
  2699.                   pRegs[36] = 0x145;             //set hrzbf:Screen right edge
  2700.                   pRegs[37] = 0x23;             //set vrtbr:Screen top edge
  2701.                   pRegs[38] = 0x323;             //set vrtbf: Screen bottom edge
  2702.                   break;
  2703.                 case 72:
  2704.                   ClockSerialData =0x04F7821;
  2705.                   pRegs[31] = 0x14B;            //set hrzt
  2706.                   pRegs[32] = 0x21;             //set hrzsr
  2707.                   pRegs[33] = 0x326;            //set vrtt
  2708.                   pRegs[34] = 0x06;             //set vrtsr
  2709.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2710.                   pRegs[35] = 0x41;             //set hrzbr:Screen left edge
  2711.                   pRegs[36] = 0x141;             //set hrzbf:Screen right edge
  2712.                   pRegs[37] = 0x21;             //set vrtbr:Screen top edge
  2713.                   pRegs[38] = 0x321;             //set vrtbf: Screen bottom edge
  2714.                   break;
  2715.                 case 76:
  2716.                   ClockSerialData =0x04F8021;
  2717.                   pRegs[31] = 0x14A;            //set hrzt
  2718.                   pRegs[32] = 0x21;             //set hrzsr
  2719.                   pRegs[33] = 0x327;            //set vrtt
  2720.                   pRegs[34] = 0x06;             //set vrtsr
  2721.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2722.                   pRegs[35] = 0x3f;             //set hrzbr:Screen left edge
  2723.                   pRegs[36] = 0x13f;            //set hrzbf:Screen right edge
  2724.                   pRegs[37] = 0x1f;             //set vrtbr:Screen top edge
  2725.                   pRegs[38] = 0x31f;            //set vrtbf: Screen bottom edge
  2726.                   break;
  2727.              }
  2728.              break;
  2729.           case 1280:
  2730.              if (pAdapter->ModeInfo.bVrtRefresh >= 68)
  2731.                 pRegs[255] = 1;              /* clock doubling needed */
  2732.              switch(pAdapter->ModeInfo.bVrtRefresh)
  2733.              {
  2734.                 default:
  2735.                 case 60:
  2736.                   ClockSerialData =0x05BF81E;
  2737.                   pRegs[31] = 0x1BF;            //set hrzt
  2738.                   pRegs[32] = 0x37;             //set hrzsr
  2739.                   pRegs[33] = 0x42E;            //set vrtt
  2740.                   pRegs[34] = 0x03;             //set vrtsr
  2741.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2742.                   pRegs[35] = 0x77;             //set hrzbr:Screen left edge
  2743.                   pRegs[36] = 0x1b7;            //set hrzbf:Screen right edge
  2744.                   pRegs[37] = 0x2d;             //set vrtbr:Screen top edge
  2745.                   pRegs[38] = 0x42d;            //set vrtbf: Screen bottom edge
  2746.                   break;
  2747.                 case 74:
  2748.                   ClockSerialData =0x05B8013;
  2749.                   pRegs[31] = 0x1AB;            //set hrzt
  2750.                   pRegs[32] = 0x23;             //set hrzsr
  2751.                   pRegs[33] = 0x42A;            //set vrtt
  2752.                   pRegs[34] = 0x03;             //set vrtsr
  2753.                /* blanking signals: should evenutally be delegated to pfnPMITuneDisplay */
  2754.                   pRegs[35] = 0x63;             //set hrzbr:Screen left edge
  2755.                   pRegs[36] = 0x1a3;            //set hrzbf:Screen right edge
  2756.                   pRegs[37] = 0x29;             //set vrtbr:Screen top edge
  2757.                   pRegs[38] = 0x429;            //set vrtbf: Screen bottom edge
  2758.                   break;
  2759.              }
  2760.              break;
  2761.           default:
  2762.              ClockSerialData =0x045a8bc;
  2763.         }
  2764.         SetDiaIDCClk(ClockSerialData);
  2765.         /*
  2766.         ** Set Polarity. If it wasn't set, default to negative
  2767.         */
  2768.         if (pAdapter->ModeInfo.bVrtPolPos > 1)
  2769.            pAdapter->ModeInfo.bVrtPolPos = 0;
  2770.         if (pAdapter->ModeInfo.bHrtPolPos > 1)
  2771.            pAdapter->ModeInfo.bHrtPolPos = 0;
  2772.  
  2773.         _outp(0x3c4,0x12);
  2774.         r0 = _inp(0x3c5);
  2775.         r0 &= 0x3f;
  2776.         r0 |= ((BYTE) (pAdapter->ModeInfo.bHrtPolPos << 6) |
  2777.               (BYTE) (pAdapter->ModeInfo.bVrtPolPos << 7));
  2778.         _outp(0x3c5,r0);
  2779.         /*
  2780.         ** Set horizontal count for high/true color. The above values
  2781.         ** were in pixel count, so convert into dot count.
  2782.         */
  2783.         if (pAdapter->ModeInfo.bBitsPerPixel >= 16)
  2784.         {
  2785.            pRegs[31] <<= 1;
  2786.            pRegs[31]++;
  2787.            pRegs[32] <<= 1;
  2788.            pRegs[32]++;
  2789.            pRegs[35] <<= 1;
  2790.            pRegs[35]++;
  2791.            pRegs[36] <<= 1;
  2792.            pRegs[36]++;
  2793.         }
  2794.         if (pAdapter->ModeInfo.bBitsPerPixel == 24)
  2795.         {
  2796.            pRegs[31] <<= 1;
  2797.            pRegs[31]++;
  2798.            pRegs[32] <<= 1;
  2799.            pRegs[32]++;
  2800.            pRegs[35] <<= 1;
  2801.            pRegs[35]++;
  2802.            pRegs[36] <<= 1;
  2803.            pRegs[36]++;
  2804.         }
  2805.         return rc;
  2806.      }
  2807.      /*
  2808.      ** ATI Mach 32 is handled here.
  2809.      */
  2810.      if (SVGAHardware.AdapterType == ATI_ADAPTER)
  2811.      {
  2812.         pfnSetATI32(pAdapter,pRegs);
  2813.         return rc;
  2814.      }
  2815.    }
  2816.    return(ERROR_ADAPTER_NOT_SUPPORTED);
  2817.  
  2818. }
  2819. /*****************************************************************************
  2820.  *
  2821.  *  FUNCTION NAME:    OpenScreenDD()
  2822.  *
  2823.  *
  2824.  *  DESCRIPTIVE NAME: Open SCREEN$ dd.
  2825.  *
  2826.  *  FUNCTION:
  2827.  *
  2828.  *  ENTRY POINT:
  2829.  *
  2830.  *  INPUT: (Passed on stack)
  2831.  *
  2832.  *  EXIT-NORMAL: 0
  2833.  *
  2834.  *  EXIT-ERROR: return code
  2835.  *
  2836.  *  EFFECTS:
  2837.  *
  2838.  *  NOTES:
  2839.  *
  2840.  *  INTERNAL REFERENCES:
  2841.  *    ROUTINES:
  2842.  *
  2843.  *  EXTERNAL REFERENCES:
  2844.  *    ROUTINES:
  2845.  *
  2846.  ****************************************************************************/
  2847. APIRET _System OpenScreenDD(VOID)
  2848. {
  2849.   APIRET rc = FALSE;
  2850.   ULONG  ulOpenAction;
  2851.  
  2852.   rc = DosOpen(SCREENDD_NAME,
  2853.                &hScreenDD,
  2854.                &ulOpenAction,
  2855.                0L,
  2856.                FILE_NORMAL,
  2857.                OPEN_ACTION_OPEN_IF_EXISTS,
  2858.                OPEN_ACCESS_READWRITE |
  2859.                OPEN_FLAGS_NOINHERIT |
  2860.                OPEN_SHARE_DENYNONE,
  2861.                NULL);
  2862.   return rc;
  2863. }
  2864. /*****************************************************************************
  2865.  *
  2866.  *  FUNCTION NAME:    VIDEOIOCTL()
  2867.  *
  2868.  *
  2869.  *  DESCRIPTIVE NAME: Open SCREEN$ dd.
  2870.  *
  2871.  *  FUNCTION:
  2872.  *
  2873.  *  ENTRY POINT:
  2874.  *
  2875.  *  INPUT: (Passed on stack)
  2876.  *
  2877.  *  EXIT-NORMAL: 0
  2878.  *
  2879.  *  EXIT-ERROR: return code
  2880.  *
  2881.  *  EFFECTS:
  2882.  *
  2883.  *  NOTES:
  2884.  *
  2885.  *  INTERNAL REFERENCES:
  2886.  *    ROUTINES:
  2887.  *
  2888.  *  EXTERNAL REFERENCES:
  2889.  *    ROUTINES:
  2890.  *
  2891.  ****************************************************************************/
  2892. APIRET _System videoIoctl(ULONG ulFunction,
  2893.                          VOID *pParam,
  2894.                          ULONG ulParamLen)
  2895. {
  2896.   APIRET rc = FALSE;
  2897.   ULONG ulParmlenMax = ulParamLen;
  2898.   if (!hScreenDD)
  2899.     rc = OpenScreenDD();
  2900.   if (!rc)
  2901.   {             //screendd_svga_id & oem uses data packet, others use parameter packet
  2902.     if (ulFunction <= SCREENDD_SVGA_OEM)
  2903.       rc = DosDevIOCtl (hScreenDD,
  2904.                            SCREENDD_CATEGORY,
  2905.                            ulFunction,
  2906.                            NULL, 0L, NULL,
  2907.                            pParam,
  2908.                            ulParamLen,
  2909.                            &ulParmlenMax);
  2910.     else
  2911.       rc = DosDevIOCtl (hScreenDD,
  2912.                            SCREENDD_CATEGORY,
  2913.                            ulFunction,
  2914.                            pParam,
  2915.                            ulParamLen,
  2916.                            &ulParmlenMax,
  2917.                            NULL, 0L, NULL);
  2918.   }
  2919.  
  2920.   return rc;
  2921. }
  2922. /*****************************************************************************
  2923.  *
  2924.  *  FUNCTION NAME:      Identify()
  2925.  *
  2926.  *  DESCRIPTIVE NAME: Identify the chip and manufacturer.
  2927.  *
  2928.  *  FUNCTION:
  2929.  *
  2930.  *  OUTPUT:            SVGAINFO  AdapterTYpe, ChipType, TotalMemory
  2931.  *                    OEMINFO  Manufacturer name and data
  2932.  *
  2933.  *  EXIT:             APIRET - return code 0 if identified, ERROR_ADAPTER_NOT_SUPPORTED otherwise.
  2934.  *
  2935.  *  INTERNAL REFERENCES:
  2936.  *    ROUTINES:
  2937.  *
  2938.  *  EXTERNAL REFERENCES:
  2939.  *    ROUTINES:
  2940.  *
  2941.  * Some PCI ID's:
  2942.  *      S3 Vision864 8880h
  2943.  *      S3 Vision866 8890h
  2944.  *      S3 Vision964 88B0h
  2945.  ****************************************************************************/
  2946. APIRET _System Identify(OEMSVGAINFO *SVGAHardware,OEMINFO *OEMHardware)
  2947. {
  2948.   ULONG rc = ERROR_ADAPTER_NOT_SUPPORTED;
  2949.   /*
  2950.   **  Identify the new chips: S3 864, PCI and non-PCI, generic support
  2951.   **  ATI 88800 - generic support
  2952.   */
  2953.   if (rc || SVGAHardware->AdapterType == DEFAULT_ADAPTER)
  2954.   {
  2955.     /*
  2956.      * get adapter type from screenDD
  2957.      */
  2958.     videoIoctl(SCREENDD_SVGA_ID, (VOID *)SVGAHardware, sizeof(OEMSVGAINFO));
  2959.  
  2960.     if (SVGAHardware->AdapterType)      /* if we have SVGA installed         */
  2961.       rc = videoIoctl(SCREENDD_SVGA_OEM,(VOID *)OEMHardware,sizeof(OEMINFO));
  2962.   }
  2963.   /*
  2964.   ** Perform any adapter initialization
  2965.   */
  2966.  
  2967.   if (SVGAHardware->AdapterType)
  2968.     InitializeAdapterData(SVGAHardware,OEMHardware);
  2969.   return rc;
  2970. }
  2971. /*****************************************************************************
  2972.  *
  2973.  *  FUNCTION NAME:      InitializeAdapterData()
  2974.  *
  2975.  *  DESCRIPTIVE NAME:  Initialize all global data for this adapter
  2976.  *
  2977.  *  FUNCTION:
  2978.  *
  2979.  *  INPUT:            SVGAINFO  AdapterTYpe, ChipType, TotalMemory
  2980.  *                    OEMINFO  Manufacturer name and data
  2981.  *
  2982.  *  EXIT:             APIRET - return code 0 if identified, ERROR_ADAPTER_NOT_SUPPORTED otherwise.
  2983.  *
  2984.  *  INTERNAL REFERENCES:
  2985.  *    ROUTINES:
  2986.  *
  2987.  *  EXTERNAL REFERENCES:
  2988.  *    ROUTINES:
  2989.  *
  2990.  ****************************************************************************/
  2991. APIRET _System InitializeAdapterData(OEMSVGAINFO *SVGAHardware,OEMINFO *OEMHardware)
  2992. {
  2993.   /*
  2994.   **  Identify the new chips: S3 864, PCI and non-PCI, generic support
  2995.   **  ATI 88800 - generic support
  2996.   */
  2997.   return NO_ERROR;
  2998. }
  2999. /*****************************************************************************
  3000.  *
  3001.  *  FUNCTION NAME:      SetDiaIDCClk()
  3002.  *
  3003.  *  DESCRIPTIVE NAME:  Yet another version of the IDC2061.
  3004.  *
  3005.  *  FUNCTION:         This is a rough translation of the PMI function.
  3006.  *                    SETDIAMONDCLK function would hose the bus, so I've
  3007.  *                    included the PMI version of the IDC2061 for now.
  3008.  *
  3009.  *  INPUT:            ULONG serial clock
  3010.  *
  3011.  *  EXIT:             NONE
  3012.  *
  3013.  *  INTERNAL REFERENCES:
  3014.  *    ROUTINES:
  3015.  *
  3016.  *  EXTERNAL REFERENCES:
  3017.  *    ROUTINES:
  3018.  *
  3019.  ****************************************************************************/
  3020. VOID _System SetDiaIDCClk(ULONG ClockData)
  3021. {
  3022.   ULONG r1,r2,r3,r4,r5,r6,r16;
  3023.   r1 = _inp(0x3cc);
  3024.   r1   &= 0x000000f3;
  3025.   r2   = r1   |  0x00000008;
  3026.   _outp(0x3c2, r2);
  3027.   r3   = r1   |  0x0000000C;
  3028.   for(r16=0;r16 < 0x05;r16++)
  3029.   {
  3030.     _outp(0x3c2, r2);
  3031.     _outp(0x3c2, r3);
  3032.   }
  3033.   r3   = r1   |  0x00000004;
  3034.   _outp(0x3c2, r1);
  3035.   _outp(0x3c2, r3);
  3036.   _outp(0x3c2, r1);
  3037.   _outp(0x3c2, r3);
  3038.   for(r16= 0;r16 < 0x18;r16++)
  3039.   {
  3040.     r4   = ClockData   << 0x00000003;
  3041.     r5   =~r4   &  0x00000008;
  3042.     r6   = r5   |  0x00000004;
  3043.     r5   |= r1  ;
  3044.     r6   |= r1  ;
  3045.     _outp(0x3c2, r6);
  3046.     _outp(0x3c2, r5);
  3047.     r5   = r4   &  0x00000008;
  3048.     r6   = r5   |  0x00000004;
  3049.     r5   |= r1  ;
  3050.     r6   |= r1  ;
  3051.     _outp(0x3c2, r5);
  3052.     _outp(0x3c2, r6);
  3053.     ClockData   >>= 0x00000001;
  3054.   }
  3055.   r2   = r1   |  0x00000008;
  3056.   r3   = r1   |  0x0000000C;
  3057.   _outp(0x3c2, r3);
  3058.   _outp(0x3c2, r2);
  3059.   _outp(0x3c2, r3);
  3060.   _outp(0x3c2, r3);
  3061. }
  3062.  
  3063. /*****************************************************************************
  3064.  *
  3065.  *  FUNCTION NAME:      SetSTBClk()
  3066.  *
  3067.  *  DESCRIPTIVE NAME:  Yet another version of the IDC2061.
  3068.  *
  3069.  *  FUNCTION:         Program IDC for Cirrus and S3.
  3070.  *
  3071.  *  INPUT:            ULONG serial clock
  3072.  *
  3073.  *  EXIT:             NONE
  3074.  *
  3075.  *  INTERNAL REFERENCES:
  3076.  *    ROUTINES:
  3077.  *
  3078.  *  EXTERNAL REFERENCES:
  3079.  *    ROUTINES:
  3080.  *
  3081.  ****************************************************************************/
  3082. #define WrtClkBit(clk_bit_port,value)  \
  3083.         _outp(clk_bit_port,value);
  3084. VOID _System SetSTBClock(ULONG ClockData)
  3085. {
  3086.    UCHAR nclk[2], clk[2];
  3087.    USHORT restore42;
  3088.    USHORT oldclk;
  3089.    USHORT bitval;
  3090.    USHORT clk_bit_port;
  3091.    INT i;
  3092.    USHORT crtcport = (_inp(0x3cc) & 0x01) ? 0x3D4 : 0x3B4;
  3093.  
  3094.    if (SVGAHardware.AdapterType == CIRRUS_ADAPTER)
  3095.    {
  3096.       _outp(0x3C4, 0x08);
  3097.       oldclk = _inp(0x3C5);
  3098.       clk_bit_port = 0x3C5;
  3099.    }
  3100.    else
  3101.    {
  3102.       oldclk = _inp(0x3CC);
  3103.       clk_bit_port = 0x3C2;
  3104.       _outp(crtcport, 0x58);            //          
  3105.       i = (_inp(crtcport+1) & 0xfe) | 0x01;
  3106.       _outp(crtcport+1, i);
  3107.  
  3108.       _outp(crtcport, 0x42);
  3109.       restore42 = (_inp(crtcport+1) << 8) & 0x3F00;
  3110.       restore42 |= 0x42;
  3111.  
  3112.       _outpw(0x3C4, 0x0100);
  3113.  
  3114.       _outp(0x3C4, 1);
  3115.       _outp(0x3C5, 0x20 | _inp(0x3C5));
  3116.  
  3117.       _outp(crtcport, 0x42);
  3118. //                _outp(crtcport+1, 0x03);
  3119.       _outp(crtcport+1, 0x02);
  3120.  
  3121.       _outpw(0x3C4, 0x0300);
  3122.  
  3123.       _outp(crtcport, 0x42);
  3124.       i = _inpw(crtcport);
  3125.  
  3126.       _outpw(0x3C4, 0x0100);
  3127.    }
  3128.  
  3129.    nclk[0] = oldclk & 0xF3;
  3130.    nclk[1] = nclk[0] | 0x08;
  3131.    clk[0] = nclk[0] | 0x04;
  3132.    clk[1] = nclk[0] | 0x0C;
  3133.  
  3134.    WrtClkBit(clk_bit_port,oldclk | 0x08);
  3135.    WrtClkBit(clk_bit_port,oldclk | 0x0C);
  3136.    for (i=0; i<5; i++)
  3137.    {
  3138.       WrtClkBit(clk_bit_port,nclk[1]);
  3139.       WrtClkBit(clk_bit_port,clk[1]);
  3140.    }
  3141.    WrtClkBit(clk_bit_port,nclk[1]);
  3142.    WrtClkBit(clk_bit_port,nclk[0]);
  3143.    WrtClkBit(clk_bit_port,clk[0]);
  3144.    WrtClkBit(clk_bit_port,nclk[0]);
  3145.    WrtClkBit(clk_bit_port,clk[0]);
  3146.    for (i=0; i<24; i++)
  3147.    {
  3148.       bitval = ClockData & 0x01;
  3149.       ClockData >>= 1;
  3150.       WrtClkBit(clk_bit_port,clk[1-bitval]);
  3151.       WrtClkBit(clk_bit_port,nclk[1-bitval]);
  3152.       WrtClkBit(clk_bit_port,nclk[bitval]);
  3153.       WrtClkBit(clk_bit_port,clk[bitval]);
  3154.    }
  3155.    WrtClkBit(clk_bit_port,clk[1]);
  3156.    WrtClkBit(clk_bit_port,nclk[1]);
  3157.    WrtClkBit(clk_bit_port,clk[1]);
  3158.  
  3159.    if (SVGAHardware.AdapterType == CIRRUS_ADAPTER)
  3160.    {
  3161.       _outp(clk_bit_port, oldclk);
  3162.    }
  3163.    else
  3164.    {
  3165.       _outp(0x3C4, 1);
  3166.       _outp(0x3C5, 0xDF & _inp(0x3C5));
  3167.  
  3168.       _outpw(crtcport, restore42);
  3169.  
  3170.       _outp(clk_bit_port, oldclk);
  3171.  
  3172.       _outpw(0x3C4, 0x0300);
  3173.    }
  3174. }
  3175. /*****************************************************************************
  3176.  *
  3177.  *  FUNCTION NAME:    SetS3Clk()
  3178.  *
  3179.  *  DESCRIPTIVE NAME: Program on-chip clock for S3.
  3180.  *
  3181.  *  FUNCTION:         All "generic" S3 cards run this code. Note that due
  3182.  *                    to the fact that this is a generic support, chances are
  3183.  *                    that startup configuration is not known, therefore the
  3184.  *                    default values will be treated as invalid. It is better to
  3185.  *                    leave it to the PMI file to set the clock, until the
  3186.  *                    customer has selected a monitor from the list and we
  3187.  *                    are given values we expect.           
  3188.  *
  3189.  *  INPUT:            ULONG serial clock
  3190.  *
  3191.  *  EXIT:             NONE
  3192.  *
  3193.  *  INTERNAL REFERENCES:
  3194.  *    ROUTINES:
  3195.  *
  3196.  *  EXTERNAL REFERENCES:
  3197.  *    ROUTINES:
  3198.  *
  3199.  ****************************************************************************/
  3200. //#pragma optimize("',off)
  3201. VOID _System  SetS3Clock(ULONG usXResolution, ULONG bBitsPerPixel, ULONG bVrtRefresh)
  3202. {
  3203.    BYTE r1,r2;
  3204.    USHORT crtcport = (_inp(0x3cc) & 0x01) ? 0x3D4 : 0x3B4;
  3205.  
  3206.    r1 = _inp(0x3cc);                 //read misc output reg
  3207.    switch(usXResolution)
  3208.    {
  3209.      case 640:
  3210.         switch(bVrtRefresh)
  3211.         {
  3212.            case 72:
  3213.              if (bBitsPerPixel <= 8)            //          
  3214.              {
  3215.                 _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cr42
  3216.                 _outp(crtcport,0x42);
  3217.                 r2 = _inp(crtcport+1);
  3218.                 r2 &= 0xD0;
  3219.                 _outp(crtcport+1,r2 | 0x0B);
  3220.                 break;
  3221.              }           //for 16 and 24 bpp let it fall to 60Hz.
  3222.            case 60:
  3223.              _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cr42
  3224.              _outp(crtcport,0x42);
  3225.              r2 = _inp(crtcport+1);
  3226.              r2 &= 0xD0;
  3227.              if (bBitsPerPixel == 16)
  3228.                _outp(crtcport+1,r2 | 0x04);
  3229.              else if (bBitsPerPixel == 24)
  3230.                _outp(crtcport+1,r2 | 0x0e);
  3231.              else
  3232.                _outp(crtcport+1,r2);
  3233.              break;
  3234.         }
  3235.         break;
  3236.      case 800:
  3237.         switch(bVrtRefresh)
  3238.         {
  3239.            case 72:
  3240.              if (bBitsPerPixel <= 8)            //          
  3241.              {
  3242.                 _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cr42
  3243.                 _outp(crtcport,0x42);
  3244.                 r2 = _inp(crtcport+1);
  3245.                 r2 &= 0xD0;
  3246.                 _outp(crtcport+1,r2 | 0x04);
  3247.                 break;
  3248.              }                                  //           60 only for high color
  3249.            case 56:
  3250.              if (bBitsPerPixel <= 8)            //          
  3251.              {
  3252.                 _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cr42
  3253.                 _outp(crtcport,0x42);
  3254.                 r2 = _inp(crtcport+1);
  3255.                 r2 &= 0xD0;
  3256.                 _outp(crtcport+1,r2 | 0x06);
  3257.                 break;
  3258.              }
  3259.            case 60:
  3260.              _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cr42
  3261.              _outp(crtcport,0x42);
  3262.              r2 = _inp(crtcport+1);
  3263.              r2 &= 0xD0;
  3264.              if (bBitsPerPixel == 16)
  3265.               _outp(crtcport+1,r2 | 0x0a);              //          
  3266.              else
  3267.               _outp(crtcport+1,r2 | 0x02);
  3268.              break;
  3269.         }
  3270.         break;
  3271.      case 1024:
  3272.        {
  3273.         USHORT clock;
  3274.         _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cr42
  3275.         _outp(crtcport,0x42);
  3276.         r2 = _inp(crtcport+1);
  3277.         clock = r2 & 0xD0;
  3278.  
  3279.         switch(bVrtRefresh)
  3280.         {
  3281.            case 70:
  3282.              if (bBitsPerPixel <= 8)
  3283.              {
  3284.                 clock |= 0xe;
  3285.                 break;
  3286.              }          //let it fall thru to 43Hz for 16bpp
  3287.            case 72:
  3288.              if (bBitsPerPixel <= 8)            //          
  3289.              {
  3290.                 clock |= 0x05;
  3291.                 break;
  3292.              }
  3293.            case 60:
  3294.              if (bBitsPerPixel <= 8)            //          
  3295.              {
  3296.                 clock |= 0x0d;
  3297.                 break;
  3298.              }
  3299.            case 43:
  3300.              if (bBitsPerPixel == 8)
  3301.                 clock |= 0x27;    //set the clock.
  3302.              else
  3303.                clock |= 0x2f;     //empirical value: Actix
  3304.              break;
  3305.            default:     //make no guesses, return.
  3306.              return;
  3307.         }
  3308.         /*
  3309.         ** If changing from a non-interlaced into the interlaced and vice versa
  3310.         ** we have to adjust the vertical crts and the clock.
  3311.         */
  3312.         if ((bBitsPerPixel == 8) && (r2 & 0x20) && (bVrtRefresh > 44))
  3313.         {       //from interlaced into a non-interlaced
  3314.            ULONG vtotal, vrstart, vrend, vend, vbstart, vbend;
  3315.            ULONG ovflw, new_ovflw, ovflw_1, new_ovflw_1, rlock;
  3316.            /*
  3317.            ** Divide the clock
  3318.            ** Change all vertical crts (*2)
  3319.            */
  3320.            _outp(crtcport,0x11);   //lock register
  3321.            rlock = _inp(crtcport+1) & 0x7f;
  3322.            _outp(crtcport+1,rlock); //unlock crtc0-7
  3323.  
  3324.            _outp(crtcport,0x7);    //overflow register 1
  3325.            ovflw = _inp(crtcport+1);  //overflow bits
  3326.            new_ovflw = 0;         //overflow value to be set
  3327.  
  3328.            _outp(crtcport,0x9);    //overflow register 2
  3329.            ovflw_1 = _inp(crtcport+1);  //overflow bits
  3330.            new_ovflw_1 = ovflw_1 & 0xdf;
  3331.  
  3332.            _outp(crtcport,0x6);         //vertical total
  3333.            vtotal = _inp(crtcport+1);
  3334.            vtotal += ((ovflw & 0x1) << 8) + (((ovflw & 0x20) >> 5) << 9);
  3335.            vtotal <<= 1;   //multiply by 2
  3336.            _outp(crtcport+1,vtotal & 0xff);
  3337.            new_ovflw |= ((vtotal & 0x100) >> 8) | (((vtotal & 0x200) >> 9) << 5);
  3338.  
  3339.            _outp(crtcport,0x10);        //vertical retrace start
  3340.            vrstart = _inp(crtcport+1);
  3341.            vrstart += (((ovflw & 0x4) >> 2) << 8) + (((ovflw & 0x80) >> 7) << 9);
  3342.            vrstart <<= 1;   //multiply by 2
  3343.            _outp(crtcport+1,vrstart & 0xff);
  3344.            new_ovflw |= (((vrstart & 0x100) >> 8) << 2) | (((vrstart & 0x200) >> 9) << 7);
  3345.  
  3346.            _outp(crtcport,0x12);
  3347.            vend = _inp(crtcport+1);        //vertical display end
  3348.            vend += (((ovflw & 0x2) >> 1) << 8) + (((ovflw & 0x40) >> 6) << 9);
  3349.            vend <<= 1;   //multiply by 2
  3350.            _outp(crtcport+1,vend & 0xff);
  3351.            new_ovflw |= (((vend & 0x100) >> 8) << 1) | (((vend & 0x200) >> 9) << 6);
  3352.  
  3353.            _outp(crtcport,0x15);           //vertical blank start
  3354.            vbstart = _inp(crtcport+1);
  3355.            vbstart += (((ovflw & 0x8) >> 3) << 8) + (((ovflw_1 & 0x20) >> 5) << 9);
  3356.            vbstart <<= 1;   //multiply by 2
  3357.            _outp(crtcport+1,vbstart & 0xff);
  3358.  
  3359.            _outp(crtcport,0x16);           //vertical blank end
  3360.            vbend = _inp(crtcport+1);
  3361.            vbend += (((ovflw & 0x8) >> 3) << 8) + (((ovflw_1 & 0x20) >> 5) << 9);
  3362.            vbend <<= 1;   //multiply by 2
  3363.            _outp(crtcport+1,vbend & 0xff);
  3364.  
  3365.            new_ovflw |= ((vbstart & 0x100) >> 8) << 3;
  3366.            new_ovflw_1 |= ((vbstart & 0x200) >> 9) << 5;
  3367.            _outp(crtcport,0x9);            //set the new overflow
  3368.            _outp(crtcport+1,new_ovflw_1);
  3369.  
  3370.            _outp(crtcport,0x7);            //set the new overflow
  3371.            _outp(crtcport+1,new_ovflw);
  3372.  
  3373.            _outp(crtcport,0x11);           //vertical retrace end
  3374.            rlock = _inp(crtcport+1);
  3375.            vrend = rlock & 0xf;
  3376.            vrend <<= 1;   //multiply by 2
  3377.            rlock |= (vrend & 0xf) | 0x80;       //lock crt0-7
  3378.            _outp(crtcport+1,rlock & 0xff);
  3379.  
  3380.            _outp(crtcport,0x14);
  3381.            ovflw_1 = (_inp(crtcport+1) & 0x9f) | 0x60;
  3382.            _outp(crtcport+1,ovflw_1);           //turn the double word on
  3383.  
  3384.            _outp(crtcport,0x17);
  3385.            ovflw_1 = (_inp(crtcport+1) & 0xf7) | 0x8;
  3386.            _outp(crtcport+1,ovflw_1);           //turn the count by 2 off
  3387.  
  3388.            _outp(crtcport,0x42);
  3389.            //the clock will be set accordingly.
  3390.         }
  3391.         else if((bBitsPerPixel == 8) && !(r2 & 0x20) && (bVrtRefresh <= 44))
  3392.         {               //from non-interlaced into interlaced
  3393.            ULONG vtotal, vrstart, vrend, vend, vbstart, vbend;
  3394.            ULONG ovflw, new_ovflw, ovflw_1, new_ovflw_1, rlock;
  3395.            /*
  3396.            ** Make sure clock is not divided
  3397.            ** Change all vertical crts (/2)
  3398.            */
  3399.            _outp(crtcport,0x11);   //lock register
  3400.            rlock = _inp(crtcport+1) & 0x7f;
  3401.            _outp(crtcport+1,rlock); //unlock crtc0-7
  3402.  
  3403.            _outp(crtcport,0x7);    //overflow register 1
  3404.            ovflw = _inp(crtcport+1);  //overflow bits
  3405.            new_ovflw = 0;         //overflow value to be set
  3406.  
  3407.            _outp(crtcport,0x9);    //overflow register 2
  3408.            ovflw_1 = _inp(crtcport+1);  //overflow bits
  3409.            new_ovflw_1 = ovflw_1 & 0xdf;
  3410.  
  3411.            _outp(crtcport,0x6);         //vertical total
  3412.            vtotal = _inp(crtcport+1);
  3413.            vtotal += ((ovflw & 0x1) << 8) + (((ovflw & 0x20) >> 5) << 9);
  3414.            vtotal >>= 1;   //divide by 2
  3415.            _outp(crtcport+1,vtotal & 0xff);
  3416.            new_ovflw |= ((vtotal & 0x100) >> 8) | (((vtotal & 0x200) >> 9) << 5);
  3417.  
  3418.            _outp(crtcport,0x10);        //vertical retrace start
  3419.            vrstart = _inp(crtcport+1);
  3420.            vrstart += (((ovflw & 0x4) >> 2) << 8) + (((ovflw & 0x80) >> 7) << 9);
  3421.            vrstart >>= 1;   //divide by 2
  3422.            _outp(crtcport+1,vrstart & 0xff);
  3423.            new_ovflw |= (((vrstart & 0x100) >> 8) << 2) | (((vrstart & 0x200) >> 9) << 7);
  3424.  
  3425.            _outp(crtcport,0x12);
  3426.            vend = _inp(crtcport+1);        //vertical display end
  3427.            vend += (((ovflw & 0x2) >> 1) << 8) + (((ovflw & 0x40) >> 6) << 9);
  3428.            vend >>= 1;   //divide by 2
  3429.            _outp(crtcport+1,vend & 0xff);
  3430.            new_ovflw |= (((vend & 0x100) >> 8) << 1) | (((vend & 0x200) >> 9) << 6);
  3431.  
  3432.            _outp(crtcport,0x15);           //vertical blank start
  3433.            vbstart = _inp(crtcport+1);
  3434.            vbstart += (((ovflw & 0x8) >> 3) << 8) + (((ovflw_1 & 0x20) >> 5) << 9);
  3435.            vbstart >>= 1;   //divide by 2
  3436.            _outp(crtcport+1,vbstart & 0xff);
  3437.  
  3438.            _outp(crtcport,0x16);           //vertical blank end
  3439.            vbend = _inp(crtcport+1);
  3440.            vbend += (((ovflw & 0x8) >> 3) << 8) + (((ovflw_1 & 0x20) >> 5) << 9);
  3441.            vbend >>= 1;   //divide by 2
  3442.            _outp(crtcport+1,vbend & 0xff);
  3443.  
  3444.            new_ovflw |= ((vbstart & 0x100) >> 8) << 3;
  3445.            _outp(crtcport,0x7);            //set the new overflow
  3446.            _outp(crtcport+1,new_ovflw);
  3447.  
  3448.            new_ovflw_1 |= ((vbstart & 0x200) >> 9) << 5;
  3449.            _outp(crtcport,0x9);            //set the new overflow
  3450.            _outp(crtcport+1,new_ovflw_1);
  3451.  
  3452.            _outp(crtcport,0x11);           //vertical retrace end
  3453.            rlock = _inp(crtcport+1);
  3454.            vrend = rlock & 0xf;
  3455.            vrend >>= 1;   //divide by 2
  3456.            rlock |= (vrend & 0xf) | 0x80;       //lock crt0-7
  3457.            _outp(crtcport+1,rlock & 0xff);
  3458.  
  3459.            _outp(crtcport,0x14);
  3460.            ovflw_1 = _inp(crtcport+1) & 0x9f;
  3461.            _outp(crtcport+1,ovflw_1);           //turn the double word off
  3462.  
  3463.            _outp(crtcport,0x17);
  3464.            ovflw_1 = _inp(crtcport+1) & 0xf7;
  3465.            _outp(crtcport+1,ovflw_1);           //turn the count by 2
  3466.            _outp(crtcport,0x42);
  3467.            //the clock will be set accordingly.
  3468.         }
  3469.         _outp(crtcport+1,clock);                //set the clock
  3470.         break;
  3471.        }
  3472.      case 1280:
  3473.         /*
  3474.         ** Changing from a non-interlaced into interlaced (vc vs) may require adjusting
  3475.         ** the vertical crt. Will do so after testing.
  3476.         */
  3477.         switch(bVrtRefresh)
  3478.         {
  3479.            case 60:
  3480.              if (SVGAHardware.ChipType == S3_86C928_CHIP)
  3481.              {
  3482.                 _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cnew_ovflw2
  3483.                 _outp(crtcport,0x42);
  3484.                 r2 = _inp(crtcport+1);
  3485.                 r2 &= 0xD0;
  3486.                 _outp(crtcport+1,r2 | 0x0C);
  3487.                 break;
  3488.              }  //805 doesn't support 60Hz. default to 46.
  3489.            case 46:
  3490.              _outp(0x3c2,r1 | 0x0c);                   //enable clock sel bits in cnew_ovflw2
  3491.              _outp(crtcport,0x42);
  3492.              r2 = _inp(crtcport+1);
  3493.              r2 &= 0xD0;
  3494.              _outp(crtcport+1,r2 | 0x2A);
  3495.              break;
  3496.         }
  3497.         break;
  3498.    }
  3499. }
  3500. /*****************************************************************************
  3501.  *
  3502.  *  FUNCTION NAME:    SetS3SDACClock()
  3503.  *
  3504.  *  DESCRIPTIVE NAME: Program the SDAC clock for S3 864 chip.
  3505.  *
  3506.  *  FUNCTION:         This function programs the SDAC based of the information
  3507.  *                    extracted from the PMI.
  3508.  *
  3509.  *  INPUT:            r0 thru r4
  3510.  *
  3511.  *  EXIT:             NONE
  3512.  *
  3513.  *  INTERNAL REFERENCES:
  3514.  *    ROUTINES:
  3515.  *
  3516.  *  EXTERNAL REFERENCES:
  3517.  *    ROUTINES:
  3518.  *
  3519.  ****************************************************************************/
  3520. //#pragma optimize("',off)
  3521.  
  3522. VOID _System  SetS3SDACClock(BYTE r0, BYTE r1, BYTE r2, BYTE r3, BYTE r4)
  3523. {
  3524.    BYTE  r5, r6;
  3525.    USHORT crtcport = (_inp(0x3cc) & 0x01) ? 0x3D4 : 0x3B4;
  3526.  
  3527. //inb(r5, 0x3c8);
  3528.   r5 = _inp(0x3c8);
  3529.  
  3530. //inb(r5, 0x3d4);
  3531.   r5 = _inp(0x3d4);
  3532.  
  3533. //rmwbi(0x3d4, 0x3d5, 0x55, 0xfc, 0x01);
  3534.   _outp(crtcport, 0x55);
  3535.   r6  = _inp(crtcport+1);
  3536.   r6 &= 0xfc;
  3537.   r6 |= 0x01;
  3538.   _outp(crtcport+1, r6);
  3539.  
  3540. //outb(0x3c6, r4);
  3541.   _outp(0x3c6, r4);
  3542.  
  3543. //outb(0x3c8, 0x02);
  3544.   _outp(0x3c8, 0x02);
  3545.  
  3546. //outb(0x3c9, r0);
  3547.   _outp(0x3c9, r0);
  3548.  
  3549. //outb(0x3c9, r1);
  3550.   _outp(0x3c9, r1);
  3551.  
  3552. //outb(0x3c8, 0x0a);
  3553.   _outp(0x3c8, 0x0a);
  3554.  
  3555. //outb(0x3c9, r2);
  3556.   _outp(0x3c9, r2);
  3557.  
  3558. //outb(0x3c9, r3);
  3559.   _outp(0x3c9, r3);
  3560.  
  3561. //rmwbi(0x3d4, 0x3d5, 0x55, 0xfc, 0x00);
  3562.   _outp(crtcport, 0x55);
  3563.   r6 = _inp(crtcport+1);
  3564.   r6 &= 0xfc;
  3565.   r6 |= 0x00;
  3566.   _outp(crtcport+1, r6);
  3567.  
  3568. //outb(0x3c6, 0xff);
  3569.   _outp(0x3c6, 0xff);
  3570.  
  3571. //outb(0x3d4, r5);
  3572.   _outp(0x3d4, r5);
  3573.  
  3574. //inb(r5, 0x3c8);
  3575.   r5 = _inp(0x3c8);
  3576. }
  3577. /******************************************************************************
  3578. *  Fixups for going from interlaced into a non-interlaced mode.
  3579. ******************************************************************************/
  3580.  
  3581. VOID _System FixupS3CRTToNONInterlaced(VOID)
  3582. {
  3583.  
  3584.   USHORT crtcport = (_inp(0x3cc) & 0x01) ? 0x3D4 : 0x3B4;
  3585.  
  3586.   ULONG vtotal, vrstart, vrend, vend, vbstart, vbend;
  3587.   ULONG ovflw, new_ovflw, ovflw_1, new_ovflw_1, rlock;
  3588.  
  3589.   /*
  3590.   ** Divide the clock
  3591.   ** Change all vertical crts (*2)
  3592.   */
  3593.  
  3594.   _outp(crtcport,0x11);   //lock register
  3595.   rlock = _inp(crtcport+1) & 0x7f;
  3596.   _outp(crtcport+1,rlock); //unlock crtc0-7
  3597.  
  3598.  
  3599.   _outp(crtcport,0x7);    //overflow register 1
  3600.   ovflw = _inp(crtcport+1);  //overflow bits
  3601.   new_ovflw = 0;         //overflow value to be set
  3602.  
  3603.  
  3604.   _outp(crtcport,0x9);    //overflow register 2
  3605.   ovflw_1 = _inp(crtcport+1);  //overflow bits
  3606.   new_ovflw_1 = ovflw_1 & 0xdf;
  3607.  
  3608.  
  3609.   _outp(crtcport,0x6);         //vertical total
  3610.   vtotal = _inp(crtcport+1);
  3611.   vtotal += ((ovflw & 0x1) << 8) + (((ovflw & 0x20) >> 5) << 9);
  3612.   vtotal <<= 1;   //multiply by 2
  3613.   _outp(crtcport+1,vtotal & 0xff);
  3614.   new_ovflw |= ((vtotal & 0x100) >> 8) | (((vtotal & 0x200) >> 9) << 5);
  3615.  
  3616.  
  3617.   _outp(crtcport,0x10);        //vertical retrace start
  3618.   vrstart = _inp(crtcport+1);
  3619.   vrstart += (((ovflw & 0x4) >> 2) << 8) + (((ovflw & 0x80) >> 7) << 9);
  3620.   vrstart <<= 1;   //multiply by 2
  3621.   _outp(crtcport+1,vrstart & 0xff);
  3622.   new_ovflw |= (((vrstart & 0x100) >> 8) << 2) | (((vrstart & 0x200) >> 9) << 7);
  3623.  
  3624.  
  3625.   _outp(crtcport,0x12);
  3626.   vend = _inp(crtcport+1);        //vertical display end
  3627.   vend += (((ovflw & 0x2) >> 1) << 8) + (((ovflw & 0x40) >> 6) << 9);
  3628.   vend <<= 1;   //multiply by 2
  3629.   _outp(crtcport+1,vend & 0xff);
  3630.   new_ovflw |= (((vend & 0x100) >> 8) << 1) | (((vend & 0x200) >> 9) << 6);
  3631.  
  3632.  
  3633.   _outp(crtcport,0x15);           //vertical blank start
  3634.   vbstart = _inp(crtcport+1);
  3635.   vbstart += (((ovflw & 0x8) >> 3) << 8) + (((ovflw_1 & 0x20) >> 5) << 9);
  3636.   vbstart <<= 1;   //multiply by 2
  3637.   _outp(crtcport+1,vbstart & 0xff);
  3638.  
  3639.  
  3640.   _outp(crtcport,0x16);           //vertical blank end
  3641.   vbend = _inp(crtcport+1);
  3642.   vbend <<= 1;   //multiply by 2
  3643.   _outp(crtcport+1,vbend & 0xff);
  3644.  
  3645.  
  3646.   new_ovflw |= ((vbstart & 0x100) >> 8) << 3;
  3647.   new_ovflw_1 |= ((vbstart & 0x200) >> 9) << 5;
  3648.   _outp(crtcport,0x9);            //set the new overflow
  3649.   _outp(crtcport+1,new_ovflw_1);
  3650.  
  3651.  
  3652.   _outp(crtcport,0x7);            //set the new overflow
  3653.   _outp(crtcport+1,new_ovflw);
  3654.  
  3655.  
  3656.   _outp(crtcport,0x11);           //vertical retrace end
  3657.   rlock = _inp(crtcport+1);
  3658.   vrend = rlock & 0xf;
  3659.   vrend <<= 1;   //multiply by 2
  3660.   rlock |= (vrend & 0xf) | 0x80;       //lock crt0-7
  3661.   _outp(crtcport+1,rlock & 0xff);
  3662.  
  3663.  
  3664.   _outp(crtcport,0x14);
  3665.   ovflw_1 = (_inp(crtcport+1) & 0x9f) | 0x60;
  3666.   _outp(crtcport+1,ovflw_1);           //turn the double word on
  3667.  
  3668.  
  3669.   _outp(crtcport,0x17);
  3670.   ovflw_1 = (_inp(crtcport+1) & 0xf7) | 0x8;
  3671.   _outp(crtcport+1,ovflw_1);           //turn the count by 2 off
  3672.  
  3673. }
  3674. /***************************************************************************
  3675. *  Fixups for going from a non-interlaced mode into interlaced mode.
  3676. ****************************************************************************/
  3677.  
  3678. VOID _System FixupS3CRTToInterlaced(VOID)
  3679. {
  3680.  
  3681.   USHORT crtcport = (_inp(0x3cc) & 0x01) ? 0x3D4 : 0x3B4;
  3682.  
  3683.   ULONG vtotal, vrstart, vrend, vend, vbstart, vbend;
  3684.   ULONG ovflw, new_ovflw, ovflw_1, new_ovflw_1, rlock, ovflw_2, new_ovflw_2;
  3685.  
  3686.   /*
  3687.   ** Make sure clock is not divided
  3688.   ** Change all vertical crts (/2)
  3689.   */
  3690.  
  3691.   _outp(crtcport,0x11);   //lock register
  3692.   rlock = _inp(crtcport+1) & 0x7f;
  3693.   _outp(crtcport+1,rlock); //unlock crtc0-7
  3694.  
  3695.  
  3696.   _outp(crtcport,0x7);    //overflow register 1
  3697.   ovflw = _inp(crtcport+1);  //overflow bits
  3698.   new_ovflw = 0;         //overflow value to be set
  3699.  
  3700.  
  3701.   _outp(crtcport,0x9);    //overflow register 2
  3702.   ovflw_1 = _inp(crtcport+1);  //overflow bits
  3703.   new_ovflw_1 = ovflw_1 & 0xdf;
  3704.  
  3705.  
  3706.   _outp(crtcport,0x5E);    //overflow register 3 for vertical
  3707.   ovflw_2 = _inp(crtcport+1);  //overflow bits
  3708.   new_ovflw_2 = ovflw_2 & 0x1f;
  3709.  
  3710.  
  3711.   _outp(crtcport,0x6);         //vertical total
  3712.   vtotal = _inp(crtcport+1);
  3713.   vtotal += ((ovflw & 0x1) << 8) + (((ovflw & 0x20) >> 5) << 9);
  3714.   vtotal += ((ovflw_2  & 0x1) << 10);
  3715.   vtotal >>= 1;   //divide by 2
  3716.   _outp(crtcport+1,vtotal & 0xff);
  3717.   new_ovflw |= ((vtotal & 0x100) >> 8) | (((vtotal & 0x200) >> 9) << 5);
  3718.   new_ovflw_2 |= ((vtotal & 0x400) >> 10);
  3719.  
  3720.  
  3721.   _outp(crtcport,0x10);        //vertical retrace start
  3722.   vrstart = _inp(crtcport+1);
  3723.   vrstart += (((ovflw & 0x4) >> 2) << 8) + (((ovflw & 0x80) >> 7) << 9);
  3724.   vrstart += (((new_ovflw_2 & 0x10) >> 4) << 10);
  3725.   vrstart >>= 1;   //divide by 2
  3726.   _outp(crtcport+1,vrstart & 0xff);
  3727.   new_ovflw |= (((vrstart & 0x100) >> 8) << 2) | (((vrstart & 0x200) >> 9) << 7);
  3728.   new_ovflw_2 |= (((vrstart & 0x400) >> 10) << 4);
  3729.  
  3730.  
  3731.   _outp(crtcport,0x12);
  3732.   vend = _inp(crtcport+1);        //vertical display end
  3733.   vend += (((ovflw & 0x2) >> 1) << 8) + (((ovflw & 0x40) >> 6) << 9);
  3734.   vend += (((ovflw_2 & 0x2) >> 1) << 10);
  3735.   vend >>= 1;   //divide by 2
  3736.   _outp(crtcport+1,vend & 0xff);
  3737.   new_ovflw |= (((vend & 0x100) >> 8) << 1) | (((vend & 0x200) >> 9) << 6);
  3738.   new_ovflw_2 |= (((vend & 0x400) >> 10) << 1);
  3739.  
  3740.  
  3741.   _outp(crtcport,0x15);           //vertical blank start
  3742.   vbstart = _inp(crtcport+1);
  3743.   vbstart += (((ovflw & 0x8) >> 3) << 8) + (((ovflw_1 & 0x20) >> 5) << 9);
  3744.   vbstart += (((ovflw_2 & 0x4) >> 2) << 10);
  3745.   vbstart >>= 1;   //divide by 2
  3746.   _outp(crtcport+1,vbstart & 0xff);
  3747.  
  3748.  
  3749.   _outp(crtcport,0x16);           //vertical blank end
  3750.   vbend = _inp(crtcport+1);
  3751.   vbend >>= 1;   //divide by 2
  3752.   _outp(crtcport+1,vbend & 0xff);
  3753.  
  3754.  
  3755.   new_ovflw |= ((vbstart & 0x100) >> 8) << 3;
  3756.   _outp(crtcport,0x7);            //set the new overflow
  3757.   _outp(crtcport+1,new_ovflw);
  3758.  
  3759.  
  3760.   new_ovflw_1 |= ((vbstart & 0x200) >> 9) << 5;
  3761.   _outp(crtcport,0x9);            //set the new overflow
  3762.   _outp(crtcport+1,new_ovflw_1);
  3763.  
  3764.  
  3765.   _outp(crtcport,0x11);           //vertical retrace end
  3766.   rlock = _inp(crtcport+1);
  3767.   vrend = rlock & 0xf;
  3768.   vrend >>= 1;   //divide by 2
  3769.   rlock |= (vrend & 0xf) | 0x80;       //lock crt0-7
  3770.   _outp(crtcport+1,rlock & 0xff);
  3771.  
  3772.  
  3773.   _outp(crtcport,0x14);
  3774.   ovflw_1 = _inp(crtcport+1) & 0x9f;
  3775.   _outp(crtcport+1,ovflw_1);           //turn the double word off
  3776.  
  3777.  
  3778.   _outp(crtcport,0x17);
  3779.   ovflw_1 = _inp(crtcport+1) & 0xf7;
  3780.   _outp(crtcport+1,ovflw_1);           //turn the count by 2
  3781.  
  3782.  
  3783.   new_ovflw_2 |= (((vbstart & 0x400) >> 10) << 2);
  3784.   _outp(crtcport,0x5e);
  3785.   _outp(crtcport+1,new_ovflw_2);           //turn the count by 2
  3786.  
  3787. }
  3788. /**********************************************************************
  3789.  *
  3790.  * FUNCTION NAME:    SetCirrusClock()                   @V3.0JAO01
  3791.  *
  3792.  * DESCRIPTIVE NAME: Program on-chip clock for Cirrus.
  3793.  *
  3794.  * FUNCTION:         All "generic" Cirrus cards run this code.
  3795.  *
  3796.  * INPUT:            Pointer to structure pAdapter of type
  3797.  *                      PVIDEO_ADAPTER.
  3798.  *
  3799.  * EXIT:             Pass/fail indication of type APIRET with values:
  3800.  *                      NO_ERROR
  3801.  *                      ERROR_MODE_NOT_SUPPORTED
  3802.  *                      ERROR_REFRESH_NOT_SUPPORTED
  3803.  *
  3804.  * INTERNAL REFERENCES: NONE
  3805.  *   ROUTINES:
  3806.  *
  3807.  * EXTERNAL REFERENCES: NONE
  3808.  *   ROUTINES:
  3809.  *
  3810.  **********************************************************************/
  3811. APIRET _System SetCirrusClock( PVIDEO_ADAPTER pAdapter )
  3812. {
  3813.  
  3814. APIRET rc = NO_ERROR;
  3815. USHORT volatile miscport = 0x3c2;
  3816. USHORT volatile xseqport = 0x3c4;
  3817. USHORT volatile hdacport = 0x3c6;
  3818. USHORT volatile crtcport = (_inp(0x3cc) & 0x01) ? 0x3d4 : 0x3b4;
  3819. enum { CLGD5430 , CLGD5434 , OTHER }
  3820.                 chiptype = (USHORT) OTHER;
  3821. enum { BELOW2M , TWOMEG , ABOVE2M }
  3822.                 TotalMemory = (USHORT) BELOW2M;
  3823.  
  3824. ULONG XResolution  = pAdapter->ModeInfo.usXResolution;
  3825. ULONG BitsPerPixel = pAdapter->ModeInfo.bBitsPerPixel;
  3826. ULONG VrtRefresh   = pAdapter->ModeInfo.bVrtRefresh;
  3827.  
  3828. typedef struct { BYTE cr0,  cr3,  cr4,  cr5,  cr6,
  3829.                       cr7,  cr9,  cr10, cr12, cr15,
  3830.                       cr16, cr11, cr1c, cr19, cr1a,
  3831.                       cr1,  cr2,  cr17; } CRFX;
  3832.                  BYTE *cri, *fxi;
  3833.         struct { CRFX crx,  fx0,  fx1,  fx2,  fx3,  fx4,
  3834.                       fx5,  fx6,  fx7,  fx8,  fx9,  fxA,
  3835.                       fxB,  fxC,  fxD,  fxE,  fxF,  fx10,
  3836.                       fx11, fx12, fx13, fx14; } rf = {
  3837. {0x00,0x03,0x04,0x05,0x06,0x07,0x09,0x10,0x12,0x15,0x16,0x11,0x1c, /*i*/
  3838.  0x19,0x1a,0x01,0x02,0x17},
  3839. {0x64,0x88,0x53,0x9b,0xf2,0x1f,0x40,0xe0,0xdf,0xdf,0xf3,0x03,0x02},/*0*/
  3840. {0x64,0x87,0x54,0x9c,0xf2,0x1f,0x40,0xe1,0xdf,0xe7,0xeb,0x04,0x06},/*1*/
  3841. {0x5f,0x82,0x54,0x9f,0x0b,0x3e,0x40,0xea,0xdf,0xe7,0x04,0x0c,0x00},/*2*/
  3842. {0x7b,0x9e,0x68,0x91,0x6f,0xf0,0x60,0x58,0x57,0x58,0x6f,0x0a,0x00},/*3*/
  3843. {0x5f,0x82,0x53,0x9f,0x0b,0x3e,0x40,0xea,0xdf,0xe7,0x04,0x0c,0x00},/*4*/
  3844. {0x7f,0x82,0x6b,0x1b,0x72,0xf0,0x60,0x58,0x57,0x58,0x72,0x0c,0x04},/*5*/
  3845. {0x7d,0x80,0x6d,0x1c,0x98,0xf0,0x60,0x7c,0x57,0x5f,0x91,0x02,0x00},/*6*/
  3846. {0x7f,0x82,0x68,0x12,0x6f,0xf0,0x60,0x58,0x57,0x57,0x6f,0x0b,0x00},/*7*/
  3847. {0xa3,0x86,0x85,0x96,0x24,0xfd,0x60,0x02,0xff,0x00,0x24,0x08,0x00},/*8*/
  3848. {0xa1,0x84,0x85,0x96,0x24,0xfd,0x60,0x02,0xff,0x00,0x24,0x08,0x00},/*9*/
  3849. {0xa1,0x84,0x85,0x93,0x2a,0xfd,0x60,0x12,0xff,0x00,0x2a,0x09,0x00},/*A*/
  3850. {0x9f,0x82,0x84,0x90,0x1e,0xf5,0x60,0x00,0xff,0xff,0x1e,0x13,0x00},/*B*/
  3851. {0x99,0x9c,0x84,0x1a,0x96,0x1f,0x40,0x80,0x7f,0x80,0x96,0x04,0x00, /*C*/
  3852.  0x4a,0x01},
  3853. {0xbd,0x80,0xa5,0x1a,0x2a,0xb2,0x60,0x0b,0xff,0x00,0x2a,0x00,0x00, /*D*/
  3854.  0x60,0x01,0x9f,0xa0,0xe3},
  3855. {0xd2,0x95,0xa2,0x81,0x14,0xb2,0x60,0x05,0xff,0x00,0x12,0x0b,0x00},/*E*/
  3856. {0x63,0x9a,0x53,0x1e,0x14,0xb2,0x60,0x03,0xff,0x00,0x12,0x07,0x04},/*F*/
  3857. {0x63,0x9a,0x52,0x1e,0x14,0xb2,0x60,0x03,0xff,0x00,0x12,0x07,0x01},/*1*/
  3858.                                                                    /*0*/
  3859. {0x64,0x9a,0x52,0x1b,0x15,0xb2,0x60,0x00,0xff,0x00,0x12,0x01,0x07},/*1*/
  3860.                                                                    /*1*/
  3861. {0x63,0x86,0x54,0x99,0x06,0x3e,0x40,0xe9,0xdf,0xe8,0xff,0x0c,0x03},/*1*/
  3862.                                                                    /*2*/
  3863. {0x7f,0x82,0x6a,0x1a,0x72,0xf0,0x60,0x58,0x57,0x58,0x72,0x0c,0x00},/*1*/
  3864.                                                                    /*3*/
  3865. {0x5f,0x82,0x53,0x9f,0x0b,0x3e,0x40,0xea,0xdf,0xe7,0x04,0x0c,0x04}}/*1*/
  3866.                                                                   ;/*4*/
  3867.  
  3868. _outp(xseqport, 0x06); _outp(xseqport+1, 0x12);
  3869. _outp(crtcport, 0x11); _outp(crtcport+1, (_inp(crtcport+1) & 0x7f) );
  3870.  
  3871. _outp(crtcport,0x27);
  3872. if ( (_inp(crtcport+1) & 0xfc) == 0xa0) chiptype = CLGD5430;
  3873. if ( (_inp(crtcport+1) & 0xfc) == 0xa8) chiptype = CLGD5434;
  3874.  
  3875. _outp(xseqport,0x15);
  3876. if ( (_inp(xseqport+1) & 0x0f) <  0x03) TotalMemory = BELOW2M;
  3877. if ( (_inp(xseqport+1) & 0x0f) == 0x03) TotalMemory = TWOMEG;
  3878. if ( (_inp(xseqport+1) & 0x0f) >  0x03) TotalMemory = ABOVE2M;
  3879.  
  3880. if (chiptype != OTHER)
  3881. switch(XResolution)
  3882. {
  3883.  default:
  3884.       rc = ERROR_MODE_NOT_SUPPORTED;
  3885.  break;
  3886.  case 1280:
  3887.       switch(BitsPerPixel)
  3888.       {
  3889.        default:
  3890.             rc = ERROR_MODE_NOT_SUPPORTED;
  3891.        break;
  3892.        case 16:
  3893.             switch(VrtRefresh)
  3894.             {
  3895.              default:
  3896.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  3897.              break;
  3898.              case 43:
  3899.              case 44:
  3900.                  if (chiptype != CLGD5434)
  3901.                  {
  3902.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  3903.                  }
  3904.                  /*vesa mode 11a*/
  3905.                   _outp(miscport, 0x2f);
  3906.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x6e);
  3907.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x2a);
  3908.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  3909.                   for
  3910.                   (cri=&rf.crx.cr0, fxi=&rf.fxD.cr0; fxi<=&rf.fxD.cr17;)
  3911.                   {
  3912.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  3913.                   }
  3914.             }
  3915.        break;
  3916.        case 8:
  3917.             switch(VrtRefresh)
  3918.             {
  3919.              default:
  3920.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  3921.              break;
  3922.              case 43:
  3923.              case 44:
  3924.                  /*vesa mode 107*/
  3925.                   _outp(miscport, 0xef);
  3926.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x6e);
  3927.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x2a);
  3928.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  3929.                   _inp(hdacport);_inp(hdacport);_inp(hdacport);_inp(hdacport);
  3930.                   _outp(hdacport, 0x00);
  3931.                   for
  3932.                   (cri=&rf.crx.cr0, fxi=&rf.fxD.cr0; fxi<=&rf.fxD.cr17;)
  3933.                   {
  3934.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  3935.                   }
  3936.             }
  3937.       }
  3938.  break;
  3939.  case 1024:
  3940.       switch(BitsPerPixel)
  3941.       {
  3942.        default:
  3943.             rc = ERROR_MODE_NOT_SUPPORTED;
  3944.        break;
  3945.        case 24:
  3946.             switch(VrtRefresh)
  3947.             {
  3948.              default:
  3949.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  3950.              break;
  3951.              case 43:
  3952.              case 44:
  3953.                  if (chiptype != CLGD5434)
  3954.                  {
  3955.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  3956.                  }
  3957.                  /*vesa mode 118*/
  3958.                   _outp(miscport, 0x2f);
  3959.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x55);
  3960.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x36);
  3961.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x09);
  3962.                   for
  3963.                   (cri=&rf.crx.cr0, fxi=&rf.fxC.cr0; fxi<=&rf.fxC.cr1a;)
  3964.                   {
  3965.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  3966.                   }
  3967.             }
  3968.        break;
  3969.        case 16:
  3970.             switch(VrtRefresh)
  3971.             {
  3972.              default:
  3973.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  3974.              break;
  3975.              case 75:
  3976.                  if (chiptype != CLGD5434)
  3977.                  {
  3978.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  3979.                  }
  3980.                  /*vesa mode 117*/
  3981.                   _outp(miscport, 0xef);
  3982.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x2c);
  3983.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x10);
  3984.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  3985.                   for
  3986.                   (cri=&rf.crx.cr0, fxi=&rf.fxB.cr0; fxi<=&rf.fxB.cr1c;)
  3987.                   {
  3988.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  3989.                   }
  3990.              break;
  3991.              case 70:
  3992.                  if (chiptype != CLGD5434)
  3993.                  {
  3994.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  3995.                  }
  3996.                  /*vesa mode 117*/
  3997.                   _outp(miscport, 0xef);
  3998.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x6e);
  3999.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x2a);
  4000.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  4001.                   for
  4002.                   (cri=&rf.crx.cr0, fxi=&rf.fx9.cr0; fxi<=&rf.fx9.cr1c;)
  4003.                   {
  4004.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4005.                   }
  4006.              break;
  4007.              case 60:
  4008.                  if (chiptype != CLGD5434)
  4009.                  {
  4010.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  4011.                  }
  4012.                  /*vesa mode 117*/
  4013.                   _outp(miscport, 0xef);
  4014.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x3b);
  4015.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x1a);
  4016.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  4017.                   for
  4018.                   (cri=&rf.crx.cr0, fxi=&rf.fx8.cr0; fxi<=&rf.fx8.cr1c;)
  4019.                   {
  4020.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4021.                   }
  4022.              break;
  4023.              case 43:
  4024.              case 44:
  4025.                  /*vesa mode 117*/
  4026.                   _outp(miscport, 0x2f);
  4027.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x55);
  4028.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x36);
  4029.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  4030.                   for
  4031.                   (cri=&rf.crx.cr0, fxi=&rf.fxC.cr0; fxi<=&rf.fxC.cr1a;)
  4032.                   {
  4033.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4034.                   }
  4035.             }
  4036.        break;
  4037.        case 8:
  4038.             switch(VrtRefresh)
  4039.             {
  4040.              default:
  4041.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4042.              break;
  4043.              case 75:
  4044.                  /*vesa mode 105*/
  4045.                   _outp(miscport, 0xef);
  4046.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x2c);
  4047.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x10);
  4048.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4049.                   for
  4050.                   (cri=&rf.crx.cr0, fxi=&rf.fxB.cr0; fxi<=&rf.fxB.cr1c;)
  4051.                   {
  4052.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4053.                   }
  4054.              break;
  4055.              case 72:
  4056.                  if (chiptype != CLGD5430)
  4057.                  {
  4058.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  4059.                  }
  4060.                  /*vesa mode 105*/
  4061.                   _outp(miscport, 0xef);
  4062.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x61);
  4063.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x24);
  4064.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4065.                   for
  4066.                   (cri=&rf.crx.cr0, fxi=&rf.fxA.cr0; fxi<=&rf.fxA.cr1c;)
  4067.                   {
  4068.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4069.                   }
  4070.              break;
  4071.              case 70:
  4072.                  /*vesa mode 105*/
  4073.                   _outp(miscport, 0xef);
  4074.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x6e);
  4075.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x2a);
  4076.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4077.                   for
  4078.                   (cri=&rf.crx.cr0, fxi=&rf.fx9.cr0; fxi<=&rf.fx9.cr1c;)
  4079.                   {
  4080.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4081.                   }
  4082.              break;
  4083.              case 60:
  4084.                  /*vesa mode 105*/
  4085.                   _outp(miscport, 0xef);
  4086.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x3b);
  4087.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x1a);
  4088.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4089.                   for
  4090.                   (cri=&rf.crx.cr0, fxi=&rf.fx8.cr0; fxi<=&rf.fx8.cr1c;)
  4091.                   {
  4092.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4093.                   }
  4094.              break;
  4095.              case 43:
  4096.              case 44:
  4097.                  /*vesa mode 105*/
  4098.                   _outp(miscport, 0x2f);
  4099.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x55);
  4100.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x36);
  4101.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4102.                   for
  4103.                   (cri=&rf.crx.cr0, fxi=&rf.fxC.cr0; fxi<=&rf.fxC.cr1a;)
  4104.                   {
  4105.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4106.                   }
  4107.             }
  4108.       }
  4109.  break;
  4110.  case 800:
  4111.       switch(BitsPerPixel)
  4112.       {
  4113.        default:
  4114.             rc = ERROR_MODE_NOT_SUPPORTED;
  4115.        break;
  4116.        case 24:
  4117.             switch(VrtRefresh)
  4118.             {
  4119.              default:
  4120.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4121.              break;
  4122.              case 60:
  4123.                  if (chiptype != CLGD5434)
  4124.                  {
  4125.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  4126.                  }
  4127.                  /*vesa mode 115*/
  4128.                   _outp(miscport, 0x2f);
  4129.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x51);
  4130.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x3a);
  4131.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x09);
  4132.                   for
  4133.                   (cri=&rf.crx.cr0, fxi=&rf.fx5.cr0; fxi<=&rf.fx5.cr1c;)
  4134.                   {
  4135.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4136.                   }
  4137.              break;
  4138.              case 56:
  4139.                  if (chiptype != CLGD5434)
  4140.                  {
  4141.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  4142.                  }
  4143.                  /*vesa mode 115*/
  4144.                   _outp(miscport, 0xef);
  4145.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x7e);
  4146.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x33);
  4147.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x09);
  4148.                   for
  4149.                   (cri=&rf.crx.cr0, fxi=&rf.fx3.cr0; fxi<=&rf.fx3.cr1c;)
  4150.                   {
  4151.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4152.                   }
  4153.             }
  4154.        break;
  4155.        case 16:
  4156.             switch(VrtRefresh)
  4157.             {
  4158.              default:
  4159.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4160.              break;
  4161.              case 75:
  4162.                  if ((chiptype != CLGD5434) || (TotalMemory == BELOW2M))
  4163.                  {
  4164.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  4165.                  }
  4166.                  /*vesa mode 114*/
  4167.                   _outp(miscport, 0x2f);
  4168.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x53);
  4169.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x30);
  4170.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  4171.                   for
  4172.                   (cri=&rf.crx.cr0, fxi=&rf.fx7.cr0; fxi<=&rf.fx7.cr1c;)
  4173.                   {
  4174.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4175.                   }
  4176.              break;
  4177.              case 72:
  4178.                  if (TotalMemory == BELOW2M)
  4179.                  {
  4180.                   rc = ERROR_REFRESH_NOT_SUPPORTED; break;
  4181.                  }
  4182.                  /*vesa mode 114*/
  4183.                   _outp(miscport, 0x2f);
  4184.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x64);
  4185.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x3a);
  4186.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x07);
  4187.                   for
  4188.                   (cri=&rf.crx.cr0, fxi=&rf.fx6.cr0; fxi<=&rf.fx6.cr1c;)
  4189.                   {
  4190.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4191.                   }
  4192.              break;
  4193.              case 60:
  4194.                  /*vesa mode 114*/
  4195.                   _outp(miscport, 0x2f);
  4196.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x5f);
  4197.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x22);
  4198.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x03);
  4199.                   for
  4200.                   (cri=&rf.crx.cr0,fxi=&rf.fx13.cr0;fxi<=&rf.fx13.cr1c;)
  4201.                   {
  4202.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4203.                   }
  4204.              break;
  4205.              case 56:
  4206.                  /*vesa mode 114*/
  4207.                   _outp(miscport, 0xef);
  4208.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x7e);
  4209.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x32);
  4210.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x03);
  4211.                   for
  4212.                   (cri=&rf.crx.cr0, fxi=&rf.fx3.cr0; fxi<=&rf.fx3.cr1c;)
  4213.                   {
  4214.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4215.                   }
  4216.             }
  4217.        break;
  4218.        case 8:
  4219.             switch(VrtRefresh)
  4220.             {
  4221.              default:
  4222.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4223.              break;
  4224.              case 75:
  4225.                  /*vesa mode 103*/
  4226.                   _outp(miscport, 0x2f);
  4227.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x53);
  4228.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x30);
  4229.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4230.                   for
  4231.                   (cri=&rf.crx.cr0, fxi=&rf.fx7.cr0; fxi<=&rf.fx7.cr1c;)
  4232.                   {
  4233.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4234.                   }
  4235.              break;
  4236.              case 72:
  4237.                  /*vesa mode 103*/
  4238.                   _outp(miscport, 0x2f);
  4239.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x64);
  4240.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x3a);
  4241.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4242.                   for
  4243.                   (cri=&rf.crx.cr0, fxi=&rf.fx6.cr0; fxi<=&rf.fx6.cr1c;)
  4244.                   {
  4245.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4246.                   }
  4247.              break;
  4248.              case 60:
  4249.                  /*vesa mode 103*/
  4250.                   _outp(miscport, 0x2f);
  4251.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x51);
  4252.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x3a);
  4253.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4254.                   for
  4255.                   (cri=&rf.crx.cr0, fxi=&rf.fx5.cr0; fxi<=&rf.fx5.cr1c;)
  4256.                   {
  4257.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4258.                   }
  4259.              break;
  4260.              case 56:
  4261.                  /*vesa mode 103*/
  4262.                   _outp(miscport, 0xef);
  4263.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x7e);
  4264.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x33);
  4265.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4266.                   for
  4267.                   (cri=&rf.crx.cr0, fxi=&rf.fx3.cr0; fxi<=&rf.fx3.cr1c;)
  4268.                   {
  4269.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4270.                   }
  4271.             }
  4272.       }
  4273.  break;
  4274.  case 640:
  4275.       switch(BitsPerPixel)
  4276.       {
  4277.        default:
  4278.             rc = ERROR_MODE_NOT_SUPPORTED;
  4279.        break;
  4280.        case 24:
  4281.             switch(VrtRefresh)
  4282.             {
  4283.              default:
  4284.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4285.              break;
  4286.              case 60:
  4287.                  /*vesa mode 112*/
  4288.                   _outp(miscport, 0xef);
  4289.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x3a);
  4290.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x16);
  4291.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x05);
  4292.                   for
  4293.                   (cri=&rf.crx.cr0, fxi=&rf.fx4.cr0; fxi<=&rf.fx4.cr1c;)
  4294.                   {
  4295.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4296.                   }
  4297.             }
  4298.        break;
  4299.        case 16:
  4300.             switch(VrtRefresh)
  4301.             {
  4302.              default:
  4303.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4304.              break;
  4305.              case 75:
  4306.                  /*vesa mode 111*/
  4307.                   _outp(miscport, 0xef);
  4308.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x65);
  4309.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x2e);
  4310.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x03);
  4311.                   _outp(crtcport, 0x1b); _outp(crtcport+1, 0x22);
  4312.                   for
  4313.                   (cri=&rf.crx.cr0, fxi=&rf.fx0.cr0; fxi<=&rf.fx0.cr1c;)
  4314.                   {
  4315.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4316.                   }
  4317.              break;
  4318.              case 72:
  4319.                  /*vesa mode 111*/
  4320.                   _outp(miscport, 0xef);
  4321.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x65);
  4322.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x2e);
  4323.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x03);
  4324.                   _outp(crtcport, 0x1b); _outp(crtcport+1, 0x22);
  4325.                   for
  4326.                   (cri=&rf.crx.cr0,fxi=&rf.fx12.cr0;fxi<=&rf.fx12.cr1c;)
  4327.                   {
  4328.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4329.                   }
  4330.              break;
  4331.              case 60:
  4332.                  /*vesa mode 111*/
  4333.                   _outp(miscport, 0xef);
  4334.                   _outp(xseqport, 0x0e); _outp(xseqport+1, 0x65);
  4335.                   _outp(xseqport, 0x1e); _outp(xseqport+1, 0x3a);
  4336.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x03);
  4337.                   _outp(crtcport, 0x1b); _outp(crtcport+1, 0x02);
  4338.                   for
  4339.                   (cri=&rf.crx.cr0,fxi=&rf.fx14.cr0;fxi<=&rf.fx14.cr1c;)
  4340.                   {
  4341.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4342.                   }
  4343.             }
  4344.        break;
  4345.        case 8:
  4346.             switch(VrtRefresh)
  4347.             {
  4348.              default:
  4349.                  rc = ERROR_REFRESH_NOT_SUPPORTED;
  4350.              break;
  4351.              case 75:
  4352.                  /*vesa mode 101*/
  4353.                   _outp(miscport, 0xeb);
  4354.                   _outp(xseqport, 0x0b); _outp(xseqport+1, 0x4a);
  4355.                   _outp(xseqport, 0x1b); _outp(xseqport+1, 0x2b);
  4356.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4357.                   for
  4358.                   (cri=&rf.crx.cr0, fxi=&rf.fx1.cr0; fxi<=&rf.fx1.cr1c;)
  4359.                   {
  4360.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4361.                   }
  4362.              break;
  4363.              case 72:
  4364.                  /*vesa mode 101*/
  4365.                   _outp(miscport, 0xeb);
  4366.                   _outp(xseqport, 0x0b); _outp(xseqport+1, 0x4a);
  4367.                   _outp(xseqport, 0x1b); _outp(xseqport+1, 0x2b);
  4368.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4369.                   for
  4370.                   (cri=&rf.crx.cr0,fxi=&rf.fx12.cr0;fxi<=&rf.fx12.cr1c;)
  4371.                   {
  4372.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4373.                   }
  4374.              break;
  4375.              case 60:
  4376.                  /*vesa mode 101*/
  4377.                   _outp(miscport, 0xe3);
  4378.                   _outp(xseqport, 0x0b); _outp(xseqport+1, 0x4a);
  4379.                   _outp(xseqport, 0x1b); _outp(xseqport+1, 0x2b);
  4380.                   _outp(xseqport, 0x07); _outp(xseqport+1, 0x01);
  4381.                   for
  4382.                   (cri=&rf.crx.cr0,fxi=&rf.fx4.cr0;fxi<=&rf.fx4.cr1c;)
  4383.                   {
  4384.                    _outp(crtcport,*cri++); _outp(crtcport+1,*fxi++);
  4385.                   }
  4386.             }
  4387.       }
  4388. }
  4389. /* _outp(crtcport, 0x11); _outp(crtcport+1, (_inp(crtcport+1) | 0x80) ); */
  4390.  
  4391. return(rc);
  4392. }                                                     /* @V3.0JAO01 end */
  4393. /*****************************************************************************
  4394.  *
  4395.  *  FUNCTION NAME:      pfnPMIFixupClock()
  4396.  *
  4397.  *  DESCRIPTIVE NAME:   Fixup the clock related registers, usage is per adapter.
  4398.  *
  4399.  *  FUNCTION:           This routine works in conjunction with pfnPMISetMonitorTimings
  4400.  *                      and does post-mode fixups which can't be done in pfnPMISetMonitorTimings
  4401.  *                      due to some timing or order constraints on adapter basis
  4402.  *
  4403.  *  INPUT:              PVIDEO_ADAPTER - Pointer to current state of the adapter/mode
  4404.  *                      PREGS- Pointer to current register state
  4405.  *
  4406.  *  EXIT:               APIRET - return code
  4407.  *
  4408.  *  NOTES:              pfnPMISetMonitorTimings can be assumed as already called
  4409.  *                      either internally (in the PMI) or externally (from IBMGPMI).
  4410.  *                      Since PMI interface specifies that r0 will be set to reflect
  4411.  *                      the return from the function and we doing the fixup to r0 here,
  4412.  *                      make sure that we return the new value of r0. Very convoluted, but
  4413.  *                      so is the hardware too and svga.exe is already bloated with
  4414.  *                      special casing, so I'm trying to retain all of the special casing
  4415.  *                      for the clock in this module.
  4416.  *
  4417.  *  INTERNAL REFERENCES:
  4418.  *    ROUTINES:
  4419.  *
  4420.  *  EXTERNAL REFERENCES:
  4421.  *    ROUTINES:
  4422.  *
  4423.  ****************************************************************************/
  4424. APIRET EXPENTRY  pfnPMIFixupClock(PVIDEO_ADAPTER pAdapter,PREGS pRegs)  /*            */
  4425. {
  4426.   BYTE ClockByte;
  4427.   BYTE bData;                                                      //JWK22
  4428.   USHORT volatile crtcport = (_inp(0x3cc) & 0x01) ? 0x3d4 : 0x3b4; //JWK22
  4429.  
  4430.   if (!(flAdapterSupport & ADAPTER_CLOCK_SUPPORTED)                //proceed
  4431.      || (!((SVGAHardware.ChipType > TSENG_ET4000_CHIP) &&
  4432.            OEMHardware.Manufacturer == DIAMOND_MANUFACTURER))
  4433.      || (pAdapter->ModeInfo.bBitsPerPixel < 16))
  4434.     return (pRegs[0]);
  4435.  
  4436.   switch(pAdapter->ModeInfo.bBitsPerPixel)
  4437.   {
  4438.     case 16:
  4439.       /*
  4440.       ** Force the DAC to double the pixel rate. Make sure ATC 16(5:4) = 10
  4441.       ** r0 is command reg value, r1 is the primary pixel mode and r2 is the
  4442.       ** secondary pixel mode. Change r1 & r2 only.
  4443.       */
  4444.       pRegs[1] = 3;
  4445.       pRegs[2] = 3;
  4446.       _inp(0x3da);_outp(0x3c0,0x16);      //JWK22
  4447.       ClockByte = _inp(0x3c1);
  4448.       _inp(0x3da);_outp(0x3c0,0x16);      //JWK22
  4449.       _outp(0x3c1,ClockByte | 0x20);
  4450.  
  4451. //      if (800) fixup crt 5,6,16,17
  4452. //JWK22 if (800) fixup crt 0,1,2,3,4,5,3f
  4453.       if (pAdapter->ModeInfo.usXResolution == 800)
  4454.       {
  4455.           _outp(crtcport, 0x00);       /* select crtc reg 0 7:0 */
  4456.           _outp(crtcport+1, 0x7f);
  4457.  
  4458.           _outp(crtcport, 0x01);       /* select crtc reg 1 7:0 */
  4459.           _outp(crtcport+1, 0x63);
  4460.  
  4461.           _outp(crtcport, 0x02);       /* select crtc reg 2 7:0 */
  4462.           _outp(crtcport+1, 0x64);
  4463.  
  4464.  
  4465.           _outp(crtcport, 0x03);       /* select crtc reg 3 4:0 */
  4466.           bData = _inp(crtcport+1) & ~0x1f;
  4467. //                    bData |= 0x02;
  4468.           bData |= 0x1d;                //          
  4469.           _outp(crtcport+1, bData);
  4470.  
  4471.           _outp(crtcport, 0x04);       /* select crtc reg 4 7:0 */
  4472.           _outp(crtcport+1, 0x6a);
  4473.  
  4474.           _outp(crtcport, 0x05);       /* select crtc reg 5 4:0 */
  4475.           bData = _inp(crtcport+1) & ~0x1f;
  4476. //                    bData |= 0x1d;
  4477.           bData |= 0x9a;                //          
  4478.           _outp(crtcport+1, bData);
  4479.  
  4480.           _outp(crtcport, 0x3f);       /* select crtc reg x3f bits 0,2,4 */
  4481.           bData = _inp(crtcport+1) & ~0x15;
  4482.           bData |= 0x00;
  4483.           _outp(crtcport+1, bData);
  4484.       }
  4485.       break;
  4486.  
  4487.  
  4488.     case 24:
  4489.       if (StealthOldScheme)
  4490.       {
  4491.         pRegs[0] = 0xF0;
  4492.         pRegs[1] = 4;
  4493.         pRegs[2] = 4;
  4494.         _inp(0x3da);_outp(0x3c0,0x16);
  4495.         ClockByte = _inp(0x3c1);
  4496.         _inp(0x3da);_outp(0x3c0,0x16);
  4497.         _outp(0x3c1,ClockByte & 0xDF);
  4498.       }
  4499.       else
  4500.       {
  4501.         /*
  4502.         ** This scheme allows higher resolutions and refreshes thanks
  4503.         ** to the fact that DAC is doubling the clock produced by ICD
  4504.         ** which allows us to escape the 90MHz limit of the old scheme.
  4505.         */
  4506. //      if (800) fixup crt 5,6,16,17
  4507. //JWK22 if (800) fixup crt 0,1,2,3,4,5,3f
  4508.         if (pAdapter->ModeInfo.usXResolution == 800)
  4509.         {
  4510.             _outp(crtcport, 0x00);       /* select crtc reg 0 7:0 */
  4511.             _outp(crtcport+1, 0xc1);
  4512.  
  4513.             _outp(crtcport, 0x01);       /* select crtc reg 1 7:0 */
  4514.             _outp(crtcport+1, 0x95);
  4515.  
  4516.             _outp(crtcport, 0x02);       /* select crtc reg 2 7:0 */
  4517.             _outp(crtcport+1, 0x95);
  4518.  
  4519.  
  4520.             _outp(crtcport, 0x03);       /* select crtc reg 3 4:0 */
  4521.             bData = _inp(crtcport+1) & ~0x1f;
  4522.             bData |= 0x05;
  4523.             _outp(crtcport+1, bData);
  4524.  
  4525.             _outp(crtcport, 0x04);       /* select crtc reg 4 7:0 */
  4526.             _outp(crtcport+1, 0x9e);
  4527.  
  4528.             _outp(crtcport, 0x05);       /* select crtc reg 5 4:0 */
  4529.             bData = _inp(crtcport+1) & ~0x1f;
  4530.             bData |= 0x13;
  4531.             _outp(crtcport+1, bData);
  4532.  
  4533.             _outp(crtcport, 0x3f);       /* select crtc reg x3f bits 0,2,4 */
  4534.             bData = _inp(crtcport+1) & ~0x15;
  4535.             bData |= 0x00;
  4536.             _outp(crtcport+1, bData);
  4537.         }
  4538.  
  4539.         pRegs[1] = 9;
  4540.         pRegs[2] = 9;
  4541.         _inp(0x3da);_outp(0x3c0,0x16);
  4542.         ClockByte = _inp(0x3c1);
  4543.         _inp(0x3da);_outp(0x3c0,0x16);
  4544.         _outp(0x3c1,ClockByte | 0x20);
  4545.       }
  4546.       break;
  4547.   }
  4548.   return (pRegs[0]);
  4549. }
  4550. //#pragma optimize("',on)
  4551.