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RISC OS BBC BASIC V Source | 1998-06-29 | 5.2 KB | 213 lines |
- swiveneer taken by RISC OS 3.70 ROM, and patched in Librarian's !RunImage
- by Excelsior, on 11/10/96 @ army
- size% = 700
- &code%=
- claim(size%):L%=code%+size%
- _swix veneer starts at &1cd7c in !RunImage absolute address
- $opcode% =
- branch(&1cd7c, _swix)
- "Set alias$Patch_Librarian_SA memorya 1cd7c "+
- ~opcode%
- branch(address%, branch%)
- offset%, opcode%
- offset%=(branch%-address%-8)
- "offset%=offset%>>2
- &00FFFFFF
- opcode%=&EA000000
- offset%
- =opcode%
- pass=8
- 2:P%=code%:[OPTpass
- ._swix
- R R0,R0,#&00020000
- TST R1,#&0FF0
- BNE _swi
- STMFD R13!,{R2,R3}
- # STMFD R13!,{R1,R4-R9,R14}
- SUB R13,R13,#&14
- ADD R14,R13,#&34
- MOV R12,R0
- STR R11,[R13,#0]
- MOV R11,R1
- TST R11,#1
- LDRNE R0,[R14],#4
- TST R11,#2
- LDRNE R1,[R14],#4
- TST R11,#4
- LDRNE R2,[R14],#4
- TST R11,#8
- LDRNE R3,[R14],#4
- STR R14,[R13,#4]
- +! SWI "XOS_CallASWIR12"
- LDMFD R13,{R11,R12}
- B J_7%
- . ._swi
- STMFD R13!,{R2,R3}
- 0# STMFD R13!,{R1,R4-R9,R14}
- SUB R13,R13,#&14
- ADD R14,R13,#&34
- MOV R12,R0
- STR R11,[R13,#0]
- MOV R11,R1
- TST R11,#1
- LDRNE R0,[R14],#4
- TST R11,#2
- LDRNE R1,[R14],#4
- TST R11,#4
- LDRNE R2,[R14],#4
- TST R11,#8
- LDRNE R3,[R14],#4
- TST R11,#&10
- LDRNE R4,[R14],#4
- TST R11,#&20
- LDRNE R5,[R14],#4
- TST R11,#&40
- LDRNE R6,[R14],#4
- TST R11,#&80
- LDRNE R7,[R14],#4
- TST R11,#&0100
- LDRNE R8,[R14],#4
- TST R11,#&0200
- LDRNE R9,[R14],#4
- STR R14,[R13,#4]
- TST R11,#&0800
- BLNE J_4%
- LDRNE R14,[R13,#4]
- TST R12,#&00020000
- BEQ J_2%
- P! SWI "XOS_CallASWIR12"
- LDMFD R13,{R11,R12}
- B J_7%
- S .J_2%
- T! SWI "XOS_CallASWIR12"
- LDMFD R13,{R11,R12}
- STR PC,[R13,#16]!
- LDR R14,[R13,#4]
- TST R14,#&80000000
- BEQ J_3%
- LDRNE R14,[R12],#4
- STRNE R0,[R14,#0]
- LDR R14,[R13,#4]
- ]" BIC R14,R14,#&80000000
- STR R14,[R13,#4]
- _ .J_3%
- `
- S R14,R14,#&000F0000
- BEQ J_6%
- CMP R14,#&00010000
- Q R0,R1
- CMP R14,#&00020000
- Q R0,R2
- CMP R14,#&00030000
- Q R0,R3
- CMP R14,#&00040000
- Q R0,R4
- CMP R14,#&00050000
- Q R0,R5
- CMP R14,#&00060000
- Q R0,R6
- CMP R14,#&00070000
- Q R0,R7
- CMP R14,#&00080000
- Q R0,R8
- CMP R14,#&00090000
- Q R0,R9
- CMP R14,#&000F0000
- LDREQ R0,[R13,#0]
- B J_6%
- w .J_4%
- x" STMFD R13!,{R10-R12,R14}
- LDR R12,[R13,#20]
- MOVS R11,R11,LSL #1
- ADDCS R12,R12,#4
- ADDMI R12,R12,#4
- MOV R10,#5
- ~ .J_5%
- MOVS R11,R11,LSL #2
- ADDCS R12,R12,#4
- ADDMI R12,R12,#4
- SUBS R10,R10,#1
- BNE J_5%
- LDR R11,[R13,#4]
- S R11,R11,#&F000
- Q R0,R12
- CMP R11,#&1000
- Q R1,R12
- CMP R11,#&2000
- Q R2,R12
- CMP R11,#&3000
- Q R3,R12
- CMP R11,#&4000
- Q R4,R12
- CMP R11,#&5000
- Q R5,R12
- CMP R11,#&6000
- Q R6,R12
- CMP R11,#&7000
- Q R7,R12
- CMP R11,#&8000
- Q R8,R12
- CMP R11,#&9000
- Q R9,R12
- " LDMFD R13!,{R10-R12,PC}^
- .J_6%
- LDR R14,[R13,#4]
- MOVS R14,R14,LSL #1
- LDRCS R14,[R12],#4
- STRCS R0,[R14,#0]
- LDRMI R14,[R12],#4
- STRMI R1,[R14,#0]
- LDR R14,[R13,#4]
- B J_8%
- .J_7%
- STR PC,[R13,#16]!
- LDR R14,[R13,#4]
- BVS J_9%
- MOVS R14,R14,LSL #1
- LDRCS R14,[R12],#4
- STRCS R0,[R14,#0]
- LDRMI R14,[R12],#4
- STRMI R1,[R14,#0]
- LDR R14,[R13,#4]
- TST R14,#&000F0000
- Q R0,#0
- .J_8%
- MOVS R14,R14,LSL #3
- LDRCS R1,[R12],#4
- STRCS R2,[R1,#0]
- LDRMI R1,[R12],#4
- STRMI R3,[R1,#0]
-
- R14,R14,#&FF000000
- MOVS R14,R14,LSL #2
- LDRCS R1,[R12],#4
- STRCS R4,[R1,#0]
- BEQ J_9%
- LDRMI R1,[R12],#4
- STRMI R5,[R1,#0]
- MOVS R14,R14,LSL #2
- LDRCS R1,[R12],#4
- STRCS R6,[R1,#0]
- LDRMI R1,[R12],#4
- STRMI R7,[R1,#0]
- MOVS R14,R14,LSL #2
- LDRCS R1,[R12],#4
- STRCS R8,[R1,#0]
- LDRMI R1,[R12],#4
- STRMI R9,[R1,#0]
- MOVS R14,R14,LSL #2
- LDRCS R9,[R13,#0]
- LDRCS R1,[R12],#4
- STRCS R9,[R1,#0]
- .J_9%
- ADD R13,R13,#8
- LDMFD R13!,{R4-R9,R14}
- ADD R13,R13,#8
- MOVS PC,R14
- claim(size%)
- "OS_Module",6,,,size%
- ,,ptr%
- ptr%<1
- "Not enough memory"
- =ptr%
-