ARM Club 1/ARM_CLUB_CD.iso/contents/apps/program/s/uidread/a

Text File | 1992-04-18 | 13.7 KB | 554 lines

; generated by JPT 19 Apr 1991 [0.01]
r0  RN 0
r1  RN 1
r2  RN 2
r3  RN 3
r4  RN 4
r5  RN 5
r6  RN 6
r7  RN 7
r8  RN 8
r9  RN 9
r10 RN 10
r11 RN 11
r12 RN 12
r13 RN 13
r14 RN 14
pc  RN 15

   AREA |min$$code|, CODE, READONLY

|min$codeseg|
        B       check_min

        DCB     "check_min"
        DCB     0
        DCD     &ff00000c

        EXPORT check_min

check_min
        STMFD   r13!, {r0-r12, r14}
        SWI     &20016
        SWI     &20014
        STMFD   r13!, {r14}
        MOV     r12, #&3200000
        LDRB    r0, [r12, #&50]

        STRB    r0, t1l
                        ; Store Timer 1
        LDRB    r0, [r12, #&54]
        STRB    r0, t1h
        LDRB    r0, [r12, #&18]
        STRB    r0, isA
                        ; Store Mask A
        LDRB    r0, [r12, #&28]
        STRB    r0, isB
                        ; Store Mask B
        LDRB    r0, [r12, #&00]
        ORR     r0, r0, #192
        STRB    r0, cr
                        ; Store control register
        LDRB    r0, [r12, #&38]
        STRB    r0, fsk
                        ; Store FIRQ mask
        MOV     r0, #0
        STRB    r0, [r12, #&38]
                        ; Clear FIRQ mask
        STRB    r0, [r12, #&28]
                        ; Clear Mask B
        MOV     r0, #64
        STRB    r0, [r12, #&18]
                        ; Clear Mask A, except TM1

        MOV     r8, #3
retrial
        LDR     r0, cr
        BIC     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #170
        STRB    r0, [r12, #80]
        MOV     r0, #4
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait1
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait1
                        ;        FNwrite(0, time_reset)
                        ; Do a reset pulse
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #14
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait2
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait2
        LDRB    r0, [r12, #0]
        ANDS    r0, r0, #8
        MOVNE   r0, #255
                        ;        FNread(0, 10)
                        ; Check presence
        CMP     r0, #0
        ADREQ   r0, no_detect
        BEQ     recover_e
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #94
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait3
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait3
        LDRB    r0, [r12, #0]
        ANDS    r0, r0, #8
        MOVNE   r0, #255
                        ;        FNread(0, 50)
                        ; And wait
        CMP     r0, #0
        ADRNE   r0, no_detect
        BNE     recover_e
                        ; Exit if -pd
        B       detectok
no_detect
        DCD     1
        DCB     "MIN not detected"
        DCB     r0
        ALIGN
detectok
        MOV     r0, #34
        STRB    r0, [r12, #80]
        MOV     r0, #5
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait4
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait4
                        ;        FNwait(660)
        MOV     r6, #3
l2
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #54
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait5
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait5
                        ;        FNwrite(1, 30)
        LDR     r0, cr
        BIC     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #0
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait6
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait6
                        ;        FNwrite(0, 3)
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #234
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait7
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait7
                        ;        FNwrite(1, 120)
        SUBS    r6, r6, #1
        BPL     l2
        MOV     r6, #3
l1
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #54
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait8
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait8
                        ;        FNwrite(1, 30)
        LDR     r0, cr
        BIC     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #134
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait9
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait9
                        ;        FNwrite(0, 70)
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #114
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait10
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait10
                        ;        FNwrite(1, 60)
        SUBS    r6, r6, #1
        BPL     l1
        MOV     r7, #7
        MOV     r6, #0
read_bits
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #54
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait11
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait11
                        ;        FNwrite(1, 30)
        LDR     r0, cr
        BIC     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #0
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait12
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait12
                        ;        FNwrite(0, 3)
        LDR     r1, cr
        ORR     r1, r1, #8
        STRB    r1, [r12, #0]
        MOV     r1, #2
        STRB    r1, [r12, #80]
        MOV     r1, #0
        STRB    r1, [r12, #84]
        MOV     r1, #0
        STRB    r1, [r12, #88]
        MOV     r1, #64
        STRB    r1, [r12, #20]
wait13
        LDRB    r1, [r12, #16]
        TST     r1, #64
        BEQ     wait13
        LDRB    r1, [r12, #0]
        ANDS    r1, r1, #8
        MOVNE   r1, #255
                        ;        FNread(1, 4)
        MOV     r0, #18
        STRB    r0, [r12, #80]
        MOV     r0, #1
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait14
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait14
                        ;        FNwait(140)
        MOV     r6, r6, LSR#1
        CMP     r1, #0
        ORRNE   r6, r6, #128
        MOV     r0, #94
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait15
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait15
                        ;        FNwait(50)
        SUBS    r7, r7, #1
        BPL     read_bits
        CMP     r6, #1
        ADRNE   r0, no_detect
        BNE     recover_e
        MOV     r7, #32
        MOV     r6, #0
read_32
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #54
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait16
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait16
                        ;        FNwrite(1, 30)
        LDR     r0, cr
        BIC     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #0
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait17
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait17
                        ;        FNwrite(0, 3)
        LDR     r1, cr
        ORR     r1, r1, #8
        STRB    r1, [r12, #0]
        MOV     r1, #2
        STRB    r1, [r12, #80]
        MOV     r1, #0
        STRB    r1, [r12, #84]
        MOV     r1, #0
        STRB    r1, [r12, #88]
        MOV     r1, #64
        STRB    r1, [r12, #20]
wait18
        LDRB    r1, [r12, #16]
        TST     r1, #64
        BEQ     wait18
        LDRB    r1, [r12, #0]
        ANDS    r1, r1, #8
        MOVNE   r1, #255
                        ;        FNread(1, 4)
        MOV     r0, #18
        STRB    r0, [r12, #80]
        MOV     r0, #1
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait19
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait19
                        ;        FNwait(140)
        MOV     r6, r6, LSR#1
        CMP     r1, #0
        ORRNE   r6, r6, #1<<31
        SUBS    r7, r7, #1
        BNE     read_32
        STR     r6, min
        MOV     r7, #56-32
        MOV     r6, #0
read_32b
        LDR     r0, cr
        ORR     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #54
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait20
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait20
                        ;        FNwrite(1, 30)
        LDR     r0, cr
        BIC     r0, r0, #8
        STRB    r0, [r12, #0]
        MOV     r0, #0
        STRB    r0, [r12, #80]
        MOV     r0, #0
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait21
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait21
                        ;        FNwrite(0, 3)
        LDR     r1, cr
        ORR     r1, r1, #8
        STRB    r1, [r12, #0]
        MOV     r1, #2
        STRB    r1, [r12, #80]
        MOV     r1, #0
        STRB    r1, [r12, #84]
        MOV     r1, #0
        STRB    r1, [r12, #88]
        MOV     r1, #64
        STRB    r1, [r12, #20]
wait22
        LDRB    r1, [r12, #16]
        TST     r1, #64
        BEQ     wait22
        LDRB    r1, [r12, #0]
        ANDS    r1, r1, #8
        MOVNE   r1, #255
                        ;        FNread(1, 4)
        MOV     r0, #18
        STRB    r0, [r12, #80]
        MOV     r0, #1
        STRB    r0, [r12, #84]
        MOV     r0, #0
        STRB    r0, [r12, #88]
        MOV     r0, #64
        STRB    r0, [r12, #20]
wait23
        LDRB    r0, [r12, #16]
        TST     r0, #64
        BEQ     wait23
                        ;        FNwait(140)
        MOV     r6, r6, LSR#1
        CMP     r1, #0
        ORRNE   r6, r6, #1<<31
        SUBS    r7, r7, #1
        BNE     read_32b
        MOV     r6, r6, LSR#8
        STR     r6, min+4

                        ; Rest of code
        MOV     r0, #0
recover
        LDRB    r1, t1l
        STRB    r1, [r12, #&50]
                        ; Restore Timer 1
        LDRB    r1, t1h
        STRB    r1, [r12, #&54]
        LDRB    r1, isA
        STRB    r1, [r12, #&18]
                        ; And IRQ Mask A
        LDRB    r1, isB
        STRB    r1, [r12, #&28]
                        ; And IRQ Mask B
        LDRB    r1, fsk
        STRB    r1, [r12, #&38]
                        ; And FIRQ Mask
        LDRB    r1, cr
        STRB    r1, [r12, #&00]
                        ; And control register
        MOV     r1, #127
        STRB    r1, [r12, #&14]
                        ; Clear IRQ A
                        ;LDRB r1, [r12, #kart]
        LDMFD   r13!, {r14}
        TEQP    pc, #0
        MVNNV   r0, r0
        CMP     r0, #0
        STRNE   r0, [r13]
        LDMFD   r13!, {r0-r12, r14}
        SWINE   &0002B
        MOV     pc, r14

recover_e
        SUBS    r8, r8, #1
        BPL     retrial
        B       recover

bad_crc
        DCD     1
        DCB     "Bad MIN crc"
        DCB     0
        ALIGN

t1l
        DCB     0
t1h
        DCB     0
isA
        DCB     0
isB
        DCB     0
fsk
        DCB     0
cr
        DCB     0
        ALIGN
min
        DCD     0
        DCD     0
crc
        DCD     0

    END