8bitfiles.net/archives/archives.tar/archives/genie-commodore-file-library/C64-128BBS/DTJ950307B.ARC/INFO.ARC/BAUDTUNING.INFO

Text File | 2019-04-13 | 8.9 KB | 209 lines

┬AUD RATE TUNING INFORMATION
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    ╘HE ─╘╩-┬┬╙ ALLOWS YOU TO FINE-TUNE THE ╥╙232 TIMING TO OBTAIN THE LEAST
    AMOUNT OF GARBLED CHARACTERS AT EACH OF THE THREE BAUD RATES.  ╘HIS ONLY
    APPLIES IF YOU DO NOT HAVE A ╙WIFTLINK-232 CARTRIDGE.

    ┼ACH BAUD RATE (300, 1200, AND 2400) HAS THREE DIFFERENT TUNING VALUES;
    RECEIVER HALF-BIT, RECEIVER FULL-BIT, AND TRANSMITTER FULL-BIT.

    ╘O UNDERSTAND WHAT EACH TUNING VALUE DOES, YOU MUST UNDERSTAND HOW SERIAL
    COMMUNICATIONS WORK.  ╘HERE ARE BOOKS AND MAGAZINE ARTICLES THAT EXPLAIN
    HOW SERIAL COMMUNICATION TAKES PLACE, SO ╔ WON'T GO INTO IT IN TOO MUCH
    DETAIL HERE.


╙ERIAL ├OMMUNICATIONS
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    ╫HEN YOU SEND DATA THOUGH YOUR MODEM TO ANOTHER COMPUTER, THE ╥╙232
    TRANSMITS EACH BYTE ONE BIT AT A TIME.  ┼ACH OF THESE BITS CAN BE EITHER ON
    OR OFF, AND THE MODEM TRANSLATES THE ON AND OFF BITS INTO DIFFERENT TONES
    THAT GOES OUT OVER THE PHONE LINE.  (┴CTUALLY, THE MODEM DOESN'T USE TONES
    AT 1200 BPS AND HIGHER, BUT FOR THE PURPOSE OF THIS DISCUSSION, WE'LL
    ASSUME IT DOES.)

    ╬ORMALLY, WHEN NO DATA IS BEING TRANSMITTED, A CONTINUAL "ON" BIT IS
    TRANSMITTED (CALLED A STOP BIT).  ╘HEN WHEN A DATA BYTE IS TO BE
    TRANSMITTED, THE ╥╙232 FIRST SENDS OUT AN "OFF" BIT (CALLED A START BIT)
    WHICH TELLS THE ╥╙232 PORT ON THE OTHER COMPUTER THAT A BYTE IS ABOUT TO
    BE SENT.

    ╘HEN EACH BIT OF THE 8-BIT DATA BYTE IS SENT, ONE AT A TIME.

    ┴FTER THE LAST BIT IS SENT, THE ╥╙-232 DATA GOES BACK TO THE CONTINUAL "ON"
    BIT.  ╫HEN YOU SET YOUR COMMUNICATIONS PARAMETERS TO 1 STOP BIT, THAT MEANS
    THE ╥╙232 WILL MAKE THE STOP BIT AT LEAST AS LONG AS ONE NORMAL BIT BEFORE
    SENDING THE NEXT CHARACTER.

    ╙O, EACH CHARACTER SENT OVER THE MODEM TAKES 10 BITS:  THE START BIT, 8
    DATA BITS, AND THE STOP BIT.  ╙INCE EACH BYTE TAKES 10 BITS TO SEND, YOU
    CAN DETERMINE THE MAXIMUM NUMBER OF CHARACTERS THAT CAN BE TRANSMITTED IN
    ON SECOND BY DIVIDING THE BAUD RATE BY 10.  30 BYTES CAN BE TRANSMITTED IN
    ONE SECOND AT 300 BPS.  ╘HIS IS THE IDEAL MAXIMUM SPEED.  ╧THER FACTORS CAN
    SLOW THIS DOWN, INCLUDING TIME TO ACCESS THE DISK, PROCESS THE DATA AND THE
    USE OF A LARGER STOP BIT.


╘HE ╘RANSMITTER ┬AUD ╘UNING ╓ALUE
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    ╚ERE'S AN EXPLANATION OF HOW THE TRANSMITTER TUNING VALUES WORK:

    ═OST COMPUTER USE A HARDWARE DEVICE CALLED A ╒┴╥╘ TO DO SERIAL
    COMMUNICATIONS.  ╔T TAKES EACH 8-BIT BYTE AND SENDS IT ONE BIT AT A TIME TO
    ANOTHER COMPUTER AND IT RECEIVES BITS FROM THE OTHER COMPUTER AND ASSEMBLES
    THEM INTO 8-BIT BYTES.

    ╘HE ├OMMODORE 64 DOES NOT HAVE THE ╒┴╥╘ HARDWARE DEVICE AND MUST DO ALL
    THIS IN SOFTWARE.  ╘O KEEP PROPER TIMING, THE ├OMMODORE 64 USES SOME TIMERS
    TO HAVE IT INTERRUPT WHATEVER IT IS DOING SO IT CAN SEND OR RECEIVE A BIT
    AT THE PROPER TIME.

    ╫ITH 2400 BPS, FOR EXAMPLE, WHENEVER THE COMPUTER IS SENDING DATA, IT MUST
    STOP WHAT IT IS DOING EVERY 1/2400TH OF A SECOND TO SEND THE NEXT BIT OF
    DATA BEFORE CONTINUING WHAT IT WAS DOING.

    ╫HAT CAUSES THIS INTERRUPT IS A VALUE THAT IS LOADED INTO A HARDWARE TIMER.
    ╘HIS IS CALLED THE TRANSMITTER FULL-BIT TIMER.  ┴S THE COMPUTER DOES IT'S
    THING, THE TIMER COUNTS DOWN.  ╫HEN IT REACHES ZERO, THE COMPUTER STOPS WHAT
    IT IS DOING TO SEND THE NEXT BIT.  ╔T THEN RESETS THE TIMER TO IT'S ORIGINAL
    VALUE SO THE NEXT BIT CAN BE SENT AT THE RIGHT TIME.  ╘HEN THE COMPUTER
    GOES BACK TO WHATEVER IT WAS DOING BEFORE IT INTERRUPTED ITSELF.

    ╘HIS TIMER COUNTS AT A RATE EQUAL TO THE CLOCK FREQUENCY OF THE COMPUTER.
    ╔N THE ╒.╙., THE CLOCK FREQUENCY IS 1022730HZ OR "TICKS PER SECOND".  (╔N
    SOME OTHER COUNTRIES, IT IS 985250HZ.)

    ╘HE FULL-BIT TIMING IS THE NUMBER OF "TICKS" THAT OCCUR IN EACH BIT.  ╘O
    FIND THE APPROXIMATE NUMBER OF "TICKS" REQUIRED, USE THE FORMULA:

TIMING = 1022730 / BAUD

    ╬OW, WHEN THE COMPUTER INTERRUPTS ITSELF TO SEND THE NEXT BIT, THERE IS A
    SLIGHT DELAY BEFORE IT RESETS THE TIMER TO START OVER.  ╘HE FULL-BIT TIMING
    VALUE MUST BE DECREASED SLIGHTLY TO COMPENSATE FOR THIS SLIGHT DELAY.  ╘HE
    DELAY IS NOT ALWAYS THE SAME, BUT IT TAKES AN AVERAGE OF ABOUT 14 "TICKS".
    ╘HIS CHANGES THE FORMULA TO:

TIMING = 1022730 / BAUD - 14

    ╔N ACTUAL PRACTICE, YOU MAY GET BETTER RESULTS VARYING THE 14 A LITTLE BIT
    EITHER WAY.


╘HE ╥ECEIVER ┬AUD ╘UNING ╓ALUES
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    ╘HE RECEIVER FULL-BIT TIMING WORKS IN MUCH THE SAME WAY.  ╘HE COMPUTER
    INTERRUPTS ITSELF (USING A DIFFERENT HARDWARE TIMER) FOR EVERY BIT TO
    SAMPLE WHAT THE VALUE OF THE INCOMING BIT IS (EITHER "ON" OR "OFF").

    ╘HE RECEIVER TIMING ALSO USES A "HALF-BIT" TIMING VALUE TO MAKE SURE THE
    FULL-BIT SAMPLE OCCURS IN THE MIDDLE OF EACH BIT.  ╚OW THIS WORKS IS THAT
    WHEN THE START BIT OF A NEW BYTE IS DETECTED, THE RECEIVER TIMER IS LOADED
    WITH THE HALF-BIT TIMING VALUE SO THAT THE NEXT TIME THE COMPUTER IS
    INTERRUPTED IS IN THE MIDDLE OF THE START BIT.

    ╘HE HALF BIT TIMING IS COMPUTED BY TAKING THE FULL-BIT TIMING (WITHOUT THE
    DELAY FACTOR), AND DIVIDING IT BY TWO:

TIMING = 1022730 / BAUD / 2

    ╘HERE IS A DELAY OF ABOUT 100 TICKS ONCE THE INTERRUPT HAS OCCURRED BEFORE
    THE TIMER IS RESET.  ╘HIS CHANGES THE FORMULA TO:

TIMING = 1022730 / BAUD / 2 - 100

    ┴GAIN, THIS DELAY IS APPROXIMATE.

    ─URING THIS NEXT INTERRUPT, THE COMPUTER LOADS THE RECEIVER TIMER WITH THE
    FULL-BIT VALUE, SO THAT THE INTERRUPTS WILL CONTINUE TO OCCUR IN THE MIDDLE
    OF EACH SUCCESSIVE BIT.  ┴FTER THE LAST BIT IS RECEIVED, THE TIMING REVERTS
    BACK TO THE HALF-BIT TIMING.

    ╘HE REASON EACH BIT MUST BE SAMPLED IN THE MIDDLE OF THE BIT IS THAT IF YOU
    SAMPLE AT THE BEGINNING OF THE BIT, AND THE TIMING IS SLIGHTLY TOO FAST,
    THEN THE NEXT SAMPLE WILL OCCUR BEFORE THE CURRENT BIT IS FINISHED.  ╔F THE
    SAMPLE IS AT THE END OF THE BIT, AND THE TIMING IS A LITTLE BIT TOO SLOW,
    THEN THE NEXT SAMPLE WILL SKIP THE NEXT BIT.  ┬AD BIT TIMING IS THE PRIMARY
    CAUSE OF GARBLED CHARACTERS WHEN PHONE LINE CONDITIONS ARE GOOD.

    ╘HE HALF-BIT TIMING AND THE FULL-BIT TIMING INTERACT WITH EACH OTHER.  ╔F
    YOU SET THE HALF-BIT TIMING SO THE SAMPLE OCCURS ONE THIRD OF THE WAY INTO
    THE START BIT, THEN THE FULL-BIT TIMING CAN BE A LITTLE SLOWER.  ╔F YOU SET
    THE HALF-BIT TIMING TO OCCUR TWO THIRDS INTO THE START BIT, THEN THE FULL-
    BIT TIMING CAN BE A LITTLE FASTER.


╚INTS ╞OR 2400 BPS
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    ┴T 2400 BPS, THE COMPUTER IS INTERRUPTING ITSELF 2400 TIMES A SECOND WHEN
    SENDING ╨╠╒╙ 2400 TIMES A SECOND WHEN RECEIVING.  ╘HE ├OMMODORE 64 HAS A
    HARD TIME KEEPING UP AT THAT SPEED.  ╔F THE COMPUTER INTERRUPTS ITSELF TO
    SEND A BIT, WHILE IT HAS ALREADY INTERRUPTED ITSELF TO RECEIVE A BIT, THAT
    THROWS THE TIMING FOR RECEIVING THE BIT OFF.  ╘HAT IS WHY YOU MAY HAVE
    PROBLEMS IN THE TERMINAL MODE WITH ┴╘ COMMANDS GETTING GARBLED.  ╫ITH THE
    ┴╘┼1 ACTIVE, THE MODEM SENDS EACH CHARACTER YOU TYPE BACK TO THE TERMINAL
    AND SO YOU END UP SENDING AND RECEIVING AT THE SAME TIME.

    ╘O OBTAIN BETTER RESULTS, TRY REMOVING THE ┼1 FROM THE TERMINAL MODE
    INITIALIZATION COMMAND.  ┘OU WON'T BE ABLE TO SEE WHAT YOU TYPE, BUT YOU
    WON'T GET THE GARBAGE EITHER.

    ═OST ╚AYES MODEMS ALLOW YOU TO TURN ECHO OFF PERMANENTLY.  ╘HIS IS DONE
    USING THE COMMAND SEQUENCES:

┴╘┌
┴╘┼0&╫

    ╧THER ╚AYES-COMPATABLE MODEMS USE A ─╔╨ SWITCH TO TURN ECHO OFF.  ╙ET IT TO
    TURN ECHO OFF FOR BEST RESULTS.

    ╚ERE ARE SOME SUGGESTED VALUES FOR 2400 BPS FINE TUNING:

  ╥ECEIVER HALF-BIT:     103
  ╥ECEIVER FULL-BIT:     396
        ╘RANSMITTER FULL-BIT:  426

    ┘OU MAY WANT TO TRY EXPERIMENTING WITH DIFFERENT VALUES.  ┴ GOOD WAY IS TO
    ATTEMPT TO RECEIVE FILES VIA XMODEM FROM A NON-├OMMODORE COMPUTER.  (╘HE
    REASON YOU WANT TO BE CONNECTED TO A NON-├OMMODORE COMPUTER IS BECAUSE YOU
    WANT THE OTHER COMPUTER TO BE ABLE TO SEND CHARACTERS AS FAST AS THE ╥╙-232
    CHANNEL CAN HANDLE IT AND AT AT ACCURATE BAUDRATE.)

    ╒SE THE ─╘╩ ╪═╧─┼═ CHECKSUM PROTOCOL TO TRANSFER A FILE OF ABOUT 30 BLOCKS.
    ╔F THE TRANSFER HAS SOME PAUSES OF ABOUT 3 SECONDS BETWEEN BLOCKS, THEN THE
    RECEIVER FULL-BIT TIMING IS TOO SLOW.  ─ECREASING THE VALUE SLIGHTLY WILL
    SPEED IT UP.

    ╔F THE TRANSFER HAS SOME 10 SECOND PAUSES, THE RECEIVER FULL-BIT TIMING IS
    TOO FAST.  ╔NCREASE THE TIMING VALUE SLIGHTLY TO SLOW IT DOWN.

    ╔F YOU GET THE OCCASIONAL 3 AND 10 SECOND PAUSES, YOU ARE CLOSE.  ╘RY
    ADJUSTING BOTH THE RECEIVER FULL AND HALF BIT TIMING VALUES SLIGHTLY IN
    OPPOSITE DIRECTIONS.

    ╫ORKABLE VALUES FOR 300 AND 1200:


    300 BPS:

  ╥ECEIVER HALF-BIT:     1605
  ╥ECEIVER FULL-BIT:     3409
        ╘RANSMITTER FULL-BIT:  3409


    1200 BPS:

  ╥ECEIVER HALF-BIT:      319
  ╥ECEIVER FULL-BIT:      838
        ╘RANSMITTER FULL-BIT:   838

    ┴GAIN, YOU MAY WANT TO TRY FINE TUNING THE 1200 BPS TIMING TO GET BETTER
    RESULTS.