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═EMORY EXPANSIONS FOR THE ├OMMODORE 128 ═ARKO ═\"AKEL\"A <═ARKO.═AKELA@╚ELSINKI.╞╔> ╨EKKA ╨ESSI <╨EKKA.╨ESSI@╚╒╘.╞╔> ┴PRIL 17TH, 1994 (*) ┴S THE ├OMMODORE 128 WAS FIRST INTRODUCED, 128 KILOBYTES FEELED LIKE AN UNBELIEVABLY BIG AMOUNT OF MEMORY. ╬OWADAYS EVEN PLAIN TERMINALS AND GAME CONSOLES HAVE MORE, AND YOU CAN EXPAND EVEN A ├OMMODORE 64 TO 256 KILOBYTES, TWICE AS MUCH AS ITS BIG BROTHER HAS BY DEFAULT. ╘HERE ARE SEVERAL COMMERCIAL MEMORY EXPANSIONS FOR THE ├OMMODORES 128 AND 64, BUT THEY ARE RATHER EXPENSIVE, AND MOST IF NOT ALL OF THEM ARE NOT BEING MANUFACTURED ANY MORE. ╘HIS ARTICLE INTRODUCES THREE DIFFERENT MEMORY EXPANSIONS FOR THE ├OMMODORE 128 AND 128─ COMPUTERS. ╫ITH THESE INSTRUCTIONS, YOU CAN EXPAND YOUR COMPUTER TO 256, 512 OR 1024 KILOBYTES OF INTERNAL MEMORY. ╘HE 1024 KILOBYTE EXPANSION IS ACTUALLY A COMBINATION OF THE TWO FORMER ONES, AND IT IS FULLY COMPATIBLE WITH BOTH OF THEM. ╫HEN BUILT BY ONESELF, THE 1024 K┬ EXPANSION CAN REMAIN CHEAPER THAN 200 ╞INNISH MARKS. ╧NE ┴MERICAL DOLLAR (╒╙─) IS EQUIVALENT TO FIVE OR SIX ╞INNISH MARKS (╞╔═). ═Y EXPANSION COSTED ABOUT 240 ╞╔═, BUT ╔ BOUGHT SOME PARTS IN VAIN, AND COULD HAVE BOUGHT THE MEMORY CHIPS SOMEWHAT CHEAPER. ╘HIS TIME THEY COSTED 117 ╞╔═. ╔ SET THREE GOALS TO THE EXPANSIONS. ╘HE BIGGER EXPANSIONS SHOULD BE FULLY COMPATIBLE WITH THE INTERNAL 256 K┬ EXPANSION FOR THE ├OMMODORE 64 WHEN THE COMPUTER IS IN ├64 MODE, AND THE 256 K┬ AND 1024 K┬ EXPANSIONS SHOULD BE DOWNWARDS COMPATIBLE WITH A COMMERCIAL INTERNAL 256 K┬ EXPANSION FOR THE ├OMMODORE 128. ╞INALLY, AN EXPANDED COMPUTER SHOULD BE FULLY DOWNWARDS COMPATIBLE WITH AN UNEXPANDED ONE. ╘HE DESIGN AIMS TO A HARDWARE THAT SUPPORTS PROGRAMMING. ╘HE 256 K┬ AND 1 ═┬ EXPANSIONS ENHANCE THE CAPABILITIES OF THE ══╒ IN A WAY THAT THE ENGINEERS AT ├OMMODORE MUST HAVE PLANNED, AND THE OTHER MEMORY MANAGEMENT LOGIC IS EVEN EASIER TO PROGRAM. --- * ╘HIS DOCUMENT IS PARTIALLY BASED ON ╨EKKA ╨ESSI'S TWO ARTICLES DESCRIBING AN 256 K┬ INTERNAL MEMORY EXPANSION FOR THE ├OMMODORE 64. ╘HE ARTICLES WERE ORIGINALLY PUBLISHED IN THE LARGEST ╬ORDIC AND ╞INNISH HOME COMPUTER USERS' MAGAZINE, ═IKRO┬╔╘╘╔, IN ITS FIRST TWO ISSUES IN THE YEAR 1987. ╙IX YEARS LATER, THEY WERE TRANSLATED TO ┼NGLISH AND EDITED BY ═ARKO ═\"AKEL\"A, WITH HELP FROM ╨EKKA ╨ESSI. ╘HE TRANSLATION SHOULD BE AVAILABLE VIA ANONYMOUS ╞╘╨ FROM ╞╘╨.╞╒╬┼╘.╞╔. ┘OU CAN RETRIEVE THIS DOCUMENT IN ╨OST╙CRIPT OR ╠A╘E╪ FORMAT VIA ANONYMOUS ╞╘╨. ╘HE FILES ARE AT ╞╘╨.╞╒╬┼╘.╞╔ IN THE DIRECTORY /PUB/CBM/HARDWARE/1028. ├ONTENTS 1 ╙OME BASICS 1.1 ┼XPANSION MEMORY IN 16 K┬ BLOCKS 1.2 ═EMORY CHIPS 1.3 ─YNAMIC HEADACHES 1.4 ═EMORY REFRESH 1.5 ╘HE ══╒ EXPANSION 2 ┬UILDING THE EXPANSION 2.1 ─ISCLAIMER 2.2 ╟ETTING STARTED 2.3 ┼XPANDING TO 512 KILOBYTES 2.3.1 ╥EMOVING THE OLD MEMORY CHIPS 2.3.2 ┴DDING THE NEW ADDRESS LINE 2.3.3 ╨REPARE FOR THE FINAL STEP 2.3.4 ╘ESTING 2.4 ┼XPANDING TO 256 OR 1024 KILOBYTES 2.4.1 ╥EALIZING THE PROCESSOR BUS INTERFACE 2.4.2 ┴DDING THE NEW MEMORY BANKING SIGNALS 2.4.3 ╙OLDERING THE MEMORY CHIPS 3 ╒SING THE EXPANSION 3.1 ╘HE OPERATION OF THE BLOCK SWITCHER 3.1.1 ╨╔┴'S LOCATION IN ADDRESS SPACE 3.1.2 ┬LOCK SELECTION 3.1.3 ╔NTERFACING THE SECOND ══╒ 3.1.4 ╙TARTUP SETTINGS FOR THE ╨╔┴ EXPANSION 3.2 ╙EGMENTED MEMORY 3.3 ├RITICAL ADDRESSES FOR THE ╨╔┴ EXPANSION 3.4 ╔NITIALIZING THE ╨╔┴ EXPANSION 3.5 ╨ROGRAMMING THE ╨╔┴ IN MACHINE LANGUAGE 3.5.1 ┴N EXCEPTION: VIDEO MEMORY 3.6 ╨ROGRAMMING THE ══╒ 3.7 ╚INTS FOR PROGRAMMING IN ├128 MODE ═ACHINE ╠ANGUAGE 3.8 ╨ROGRAMMING IN ├128 MODE ┬┴╙╔├ 4 ╨ROGRAMMING THE EXPANSION IN ├64 MODE ┬┴╙╔├ 4.1 ╨ROCESSING A HUGE ARRAY 4.2 ╙TORING GRAPHICS 5 ╥┴═ DISK AND OTHER ├64 MODE PROGRAMS 5.1 ═EMORY TEST 5.2 ╨OOR MAN'S MULTITASKING 5.3 ═ACHINE LANGUAGE MONITOR 5.4 ╥┴═ DISK 5.4.1 ─ISK COPIERS 6 ┼NHANCING THE ╨╔┴ EXPANSION 6.1 ┬UILT-IN FREEZER 6.2 ╬EW OPERATING SYSTEM 7 ├ONTACTING THE AUTHOR 1 ╙OME BASICS ╘HIS ARTICLE DESCRIBES TWO MEMORY EXPANSIONS: AN EXPANSION THAT ADDS TWO NEW MEMORY BANKS TO THE ├OMMODORE 128, DOUBLING ITS MEMORY SPACE, AND ANOTHER EXPANSION WHICH EXPANDS EACH BANK TO 256 KILOBYTES, QUADRUPLING THE MEMORY SPACE. ╘HE FORMER IS THE 256 K┬ EXPANSION, FROM HERE ON THE ══╒ EXPANSION, AND THE LATTER IS THE 512 K┬ EXPANSION, OR THE ╨╔┴ EXPANSION. ├OMBINING THESE TWO EXPANSIONS GIVES YOU FOUR BANKS OF 256 KILOBYTES EACH, THAT IS 1024 KILOBYTES. ╫HEN ╔ MADE THE 256 K┬ EXPANSION TO MY ├OMMODORE 64, ╔ RENAMED THE COMPUTER TO 2564 --- 256 K┬ ├64. ╘HE FIRST THREE DIGITS SPECIFY THE AMOUNT OF MEMORY, WHEREAS THE LAST TWO ONES TELL THE MACHINE TYPE NUMBER. ┴ LOGICAL CHOICE FOR THE NAME OF A 512 K┬ ├128 IS 5128 --- THE FIRST THREE DIGITS TELL THE AMOUNT OF MEMORY IN KILOBYTES, AND THE LAST THREE EXPOSE THE ORIGINAL MACHINE TYPE. ╒NFORTUNATELY THE 256 K┬ AND 1024 K┬ EXPANSIONS FOR THE ├128 CANNOT BE NAMED SO NICELY. ╔ HAVE BAPTIZED MY ├128─ TO ├1028─, THOUGH. ╘HE SUBSECTIONS 1.1 THROUGH 1.4 OF THIS SECTION APPLY FOR THE ╨╔┴ EXPANSION. ┘OU CAN SKIP THEM, IF YOU WANT TO SAVE SOME TROUBLE AND MONEY AND ARE GOING TO EXPAND YOUR MACHINE ONLY TO 256 KILOBYTES. ╙IMILARLY, THE SECTION 1.5 CAN BE SKIPPED IF YOU AIM ONLY TO THE 512 KILOBYTE EXPANSION. 1.1 ┼XPANSION MEMORY IN 16 K┬ BLOCKS ╘HE PROCESSOR OF ├OMMODORE 128, ═╧╙ 8502, HAS AN 8-BIT DATA BUS, AND ITS ADDRESS BUS IS 16 BITS WIDE. ╠IKE OTHER 8-BIT PROCESSORS, IT CAN ADDRESS ONLY 64 K┬ OF MEMORY AT A TIME. ╔N MOST 8-BIT COMPUTERS, THE MEMORY IS LIMITED TO THESE 64 KILOBYTES. ╚OW COULD ONE ADD MEMORY ABOVE THIS LIMIT? ╘HE SOLUTION IS SIMPLE: THE MEMORY IS DIVIDED INTO BANKS OF NO MORE THAN 64 K┬, WHICH ARE SWITCHED ON AND OFF. ╙OME PROCESSORS HAVE BEEN ADDED A SPECIAL CIRCUIT FOR THIS PURPOSE, IN WHICH CASE THE EXECUTING PROGRAM CAN BE IN ITS OWN 64 K┬ BANK AND THE PROCESSED DATA IN ANOTHER BANK. ╞OR EXAMPLE, ═╧╙ 6509, A FELLOW PROCESSOR OF ═╧╙ 8502, WORKS IN THIS WAY, ENABLING ACCESS TO ONE MEGABYTE. ╘HE ├OMMODORE 128 USES A SOPHISTICATED CHIP, ═╧╙ 8722 ══╒ (═EMORY ═ANAGEMENT ╒NIT), WHICH LETS YOU TO ACTIVATE ONE 64 K┬ MEMORY BANK OF A TOTAL OF TWO MEMORY BANKS AT A TIME. ╘HE ╨╔┴ EXPANSION EXPANDS EACH ├128 MEMORY BANK TO 256 KILOBYTES. ╘HE EXTENDED MEMORY IS DIVIDED TO SIXTEEN BLOCKS OF SIXTEEN KILOBYTES EACH. ╘HE PROCESSOR CAN ADDRESS UP TO FOUR OF THEM AT A TIME. ┼VERY FOUR 16 K┬ SEGMENT OF THE ADDRESS SPACE CAN BE MAPPED TO ANY 16 K┬ BLOCK. ╞IGURE 1 SHOWS THE MAPPING RIGHT AFTER STARTUP. ╚OWEVER, THE VIDEO CHIP ╓╔├-╔╔E --- ═╧╙ 8566 (8564 FOR ╬╘╙├) --- RETRIEVES ITS DATA FROM THE MEMORY OUTSIDE THE NORMAL BUS. ╘HE INTERNAL ADDRESS REGISTERS OF ╓╔├-╔╔E ARE 14 BITS WIDE, SO IT CAN ADDRESS ONLY 16 K┬ WITHOUT EXTERNAL LOGIC. ╘HE REQUIRED TWO EXTRA BITS FOR ACCESSING THE WHOLE 64 K┬ VIDEO BANK ARE PROVIDED FROM THE SECOND ├╔┴ CHIP, AND THE VIDEO BANK IS SELECTED BY THE ══╒. ╧UR EXTRA LOGIC PROVIDES ADDITIONAL TWO ADDRESS BITS FOR ACCESSING THE WHOLE 256 K┬ OF THE SELECTED VIDEO MEMORY BANK. ═╨╒'S ╥┴═ ╥┴═ POOL (BANK 0) ╓╔├-╔╔E'S ╥┴═ +--$10000 --+ +-- $40000 --+ +--$10000 --+ ▄ ▄ /--->▄ ╙EGMENT ╞ ▄<---\ ▄ ▄ ▄ ┬LOCK 3 ▄-/ +-- $3├000 --+ \-▄ ┬LOCK 0 ▄ ▄ ▄ /--->▄ ╙EGMENT ┼ ▄<---\ ▄ ▄ +-- $├000 --+ ▄ +-- $38000 --+ ▄ +-- $├000 --+ ▄ ▄ ▄/-->▄ ╙EGMENT ─ ▄<--\▄ ▄ ▄ ▄ ┬LOCK 2 ▄-/ ▄ +-- $34000 --+ ▄ \-▄ ┬LOCK 1 ▄ ▄ ▄ ▄/->▄ ╙EGMENT ├ ▄<-\▄ ▄ ▄ +-- $8000 --+ ▄▄ +-- $30000 --+ ▄▄ +-- $8000 --+ ▄ ▄ ▄▄ ▄ ╙EGMENT ┬ ▄ ▄▄ ▄ ▄ ▄ ┬LOCK 1 ▄--/ ▄ +-- $2├000 --+ ▄ \--▄ ┬LOCK 2 ▄ ▄ ▄ ▄ ▄ ╙EGMENT ┴ ▄ ▄ ▄ ▄ +-- $4000 --+ ▄ +-- $28000 --+ ▄ +-- $4000 --+ ▄ ▄ ▄ ▄ ╙EGMENT 9 ▄ ▄ ▄ ▄ ▄ ┬LOCK 0 ▄---/ +-- $24000 --+ \---▄ ┬LOCK 3 ▄ ▄ ▄ ▄ ╙EGMENT 8 ▄ ▄ ▄ +-- $0000 --+ +-- $20000 --+ +-- $0000 --+ ▄ ╙EGMENT 7 ▄ +-- $1├000 --+ ▄ ╙EGMENT 6 ▄ +-- $18000 --+ ▄ ╙EGMENT 5 ▄ +-- $14000 --+ ▄ ╙EGMENT 4 ▄ +-- $10000 --+ ▄ ╙EGMENT 3 ▄ +-- $0├000 --+ ▄ ╙EGMENT 2 ▄ +-- $08000 --+ ▄ ╙EGMENT 1 ▄ +-- $04000 --+ ▄ ╙EGMENT 0 ▄ +-- $00000 --+ ╞IGURE 1. ═EMORY MAPPING RIGHT AFTER POWER-UP 4164 41256 +--------+ +--------+ ╬├ ▄ 1 \/ 16▄ ╓╙╙ ═┴8 ▄ 1 \/ 16▄ ╓╙╙ ─ ▄ 2 15▄ -├┴╙ ─ ▄ 2 15▄ -├┴╙ -╫ ▄ 3 14▄ ╤ -╫ ▄ 3 14▄ ╤ -╥┴╙ ▄ 4 13▄ ═┴6 -╥┴╙ ▄ 4 13▄ ═┴6 ═┴0 ▄ 5 12▄ ═┴3 ═┴0 ▄ 5 12▄ ═┴3 ═┴2 ▄ 6 11▄ ═┴4 ═┴2 ▄ 6 11▄ ═┴4 ═┴1 ▄ 7 10▄ ═┴5 ═┴1 ▄ 7 10▄ ═┴5 ╓── ▄ 8 9▄ ═┴7 ╓── ▄ 8 9▄ ═┴7 +--------+ +--------+ ╞IGURE 2. ╘HE ─YNAMIC ╥ANDOM ┴CCESS ═EMORY ├HIPS 4164 AND 41256 1.2 ═EMORY CHIPS ├OMMODORE 128 USES 64 KB DYNAMIC ╥┴═ CHIPS OF ╩┼─┼├ STANDARD. ╔N 1982, WHEN THE ├OMMODORE 64 WAS INTRODUCED, THEY WERE MOST MODERN TECHNOLOGY, THEY NEEDED ONLY ONE OPERATING VOLTAGE SUPPLY INSTEAD OF TRADITIONAL THREE. ╘HE SEMICONDUCTOR MEMORIES HAVE DEVELOPED FAST, HOWEVER, AND NOW A CHIP IN A ─╔╨ OF EQUAL SIZE CAN HOLD 256 KILOBITS. ╘HE PINOUT OF THESE 256 KB CHIPS DIFFERS MINIMALLY FROM THE 64 KB ONES. ╘HE SMALLER 64 KB CHIPS, AT LEAST THE ONES USED IN ├64 AND ├128, HAVE ONE UNUSED CONTACT. ╘HE ADDRESS LINE TO HANDLE THREE TIMES BIGGER MEMORY IS TIED TO THIS PIN. ╔N THE ─╥┴═S THE ADDRESS LINES ARE MULTIPLEXED: TWO ADDRESS BITS USE THE SAME PIN SUCCESSIVELY. ╔N THE ═IKRO┬╔╘╘╔ ARTICLE ╨EKKA WROTE THAT 256 KB CHIPS ARE RATHER CHEAP, AND THE PRICE WOULD LOWER AS THE PRODUCTION RATE INCREASES. ╬OWADAYS THE PRODUCTION MUST HAVE ALMOST STOPPED. ╫HEN ╨EKKA BOUGHT HIS CHIPS BETWEEN ═ARCH AND ┴PRIL OF 1986, THEY COSTED ABOUT 50 ╞╔═ EACH. ╫HEN THE ORIGINAL ARTICLE WAS PUBLISHED, THEY COSTED LESS THAN 20 ╞╔═. ┴FTER THAT THE PRICES ROSE DUE TO A MEMORY SHORTAGE. ┬UT NOWADAYS THE CHIPS DON'T COST PRACTICALLY ANYTHING, IF YOU'RE LUCKY. ═ANY USERS OF ╔┬═ ╨├ COMPATIBLES WANT TO UPGRADE THEIR SYSTEM MEMORY WITH 1 ═B CHIPS OR ALIKE AND WOULD LIKE TO GET RID OF THEIR OLD 256 KB CHIPS. ╔ BOUGHT EIGHT SECOND-HAND CHIPS WITH TOTAL 35 ╞╔═, AND LATER 36 CHIPS WITH 117 ╞╔═, INCLUDING SHIPPING. ╘HE LOWEST PRICE OF UNUSED CHIP ╔ ENCOUNTERED WAS 13 ╞╔═ A PIECE AND THE HIGHEST WAS 30 ╞╔═, ALMOST 10 TIMES THE PRICE ╔ PAID! ╘HE 256 KB CHIPS DON'T CONSUME SIGNIFICANTLY MORE POWER, SO THERE IS NO NEED FOR A BIGGER POWER SUPPLY. ╚OWEVER, DEVICES THAT TAKE THEIR POWER DIRECTLY FROM THE COMPUTER CAN CAUSE PROBLEMS. ┘OU CAN FIND THIS OUT BY EXPERIMENTING. ╘HE SPEED OF THE CHIPS DOESN'T PREVENT THE REPLACEMENT EITHER. ┴CCORDING TO THEIR SCHEMATICS DIAGRAMS, ├OMMODORE 64 AND 128 CAN USE CHIPS WITH ACCESS TIME OF 200 NANOSECONDS. (┬ESIDES, THE OLDEST ├OMMODORE 64 ╔ HAVE USES 300 NS CHIPS HOUSED IN CERAMIC PACKAGES.) ┼VEN THE SLOWEST 256 KB DYNAMIC ╥┴═S ARE NOT THAT SLOW. ╔T MIGHT BE WISE TO REPLACE THE BYPASS CAPACITORS NEAR THE MEMORY CHIPS WITH BIGGER ONES, AT LEAST IF YOU ARE GOING TO MAKE THE ══╒ EXPANSION (SEE ╙ECTION 1.5). ╧N THE OTHER HAND, MY MACHINE WORKS WELL WITH THE DEFAULT 220 N╞ CAPACITORS. ╔F YOUR COMPUTER STARTS TO WORK UNRELIABLY, TOO SMALL BYPASS CAPACITORS COULD BE THE CULPRIT. 1.3 ─YNAMIC HEADACHES ╘HE DYNAMIC ╥┴═ CHIPS ARE ORGANIZED IN ROWS AND COLUMNS. ╔N 64 KB CHIPS, A ROW IS 256 BITS WIDE, AND IN 256 KB ONES IT IS 512 BITS WIDE. ┴LSO THE MEMORY ADDRESS IS DIVIDED INTO ROW AND COLUMN ADDRESSES. ╫HEN A BIT IS BEING ACCESSED IN THE DYNAMIC ╥┴═, THE ROW ADDRESS IS ASSERTED BEFORE THE COLUMN ADDRESS. ╞IRST THE INTERFACING CIRCUITRY PUTS THE ROW ADDRESS ON THE ═ULTIPLEXED ┴DDRESS BUS, WHILE THE VIDEO CHIP ASSERTS THE -╥┴╙ (╥OW ┴DDRESS ╙ELECT) SIGNAL FOR A SHORT PERIOD. ┴FTER THAT, THE VIDEO CHIP PULLS THE ═╒╪ LINE LOW, AND THE INTERFACING CIRCUITRY PLACES THE COLUMN ADDRESS ON THE BUS WHILE PULLING LOW THE -├┴╙ (├OLUMN ┴DDRESS ╙ELECT) SIGNAL OF THE SELECTED ╥┴═ BANK. ┴FTER ALL THIS, THE BITS IN THAT POSITION CAN BE READ OR WRITTEN. ╘HE COMPUTER HAS TWO CIRCUITRIES THAT TAKE CARE OF THIS MULTIPLEXING. ╘HE MULTIPLEXERS ╒14 AND ╒15 FORM THE ADDRESS WHEN EITHER ONE OF THE ├128'S TWO PROCESSORS HAS THE BUS, WHEREAS THE VIDEO CHIP PRODUCES THE ROW AND COLUMN ADDRESSES ITSELF WHEN IT NEEDS ITS SCREEN DATA. ┘OU COULD ACCESS A SET OF NEARBY LOCATIONS FASTER, IF YOU SPECIFIED THE ROW ADDRESS ONLY ONCE, AND THEN PRODUCED ONLY THE COLUMN ADDRESSES FOR EACH LOCATION. ╘HIS TECHNIQUE IS SUPPORTED IN THE ┴CORN ┴RCHIMEDES COMPUTER ON THE PROCESSOR LEVEL, AND SOME OTHER COMPUTERS UTILIZE IT WITH EXTERNAL CIRCUITRY AS MEMORY INTERLEAVING. ╘HE ├OMMODORE, HOWEVER, DOES NOT HAVE TO HASSLE WITH THIS, AS ITS SYSTEM CLOCK RATE IS SO SLOW. ┴S A MATTER OF FACT, IT ACTUALLY USES THE LEAST SIGNIFICANT PROCESSOR ADDRESS BITS (┴0--┴7) AS A ROW ADDRESS AND THE MOST SIGNIFICANT BITS (┴8--┴15) AS THE COLUMN ADDRESS. 1.4 ═EMORY REFRESH ┴ DYNAMIC MEMORY CHIP STORES THE DATA BITS AS CHARGED TINY CAPACITORS, WHICH DISCHARGE AMONG THE TIME. ╘HE DATA MUST BE REFRESHED PERIODICALLY, EVERY 2--4 MILLISECONDS, BY RECHARGING THE CAPACITORS. ╔F THE WHOLE CONTENTS OF THE MEMORY WAS REFRESHED SIMULTANEOUSLY, THE POWER PEAK WOULD CAUSE ENORMOUS PROBLEMS. ╧NLY A BLOCK OF ONE OR TWO ROWS CAN BE REFRESHED AT A TIME. ╘HE 64 KB CHIPS HAVE 128 BLOCKS TO BE REFRESHED, WHICH IMPLIES A 7-BIT REFRESH COUNTER ($2^7$ EQUALS 128). ╔N ORDER TO AVOID DISTURBANCE, 256 KB CHIPS MUST HAVE MORE BLOCKS. ╘HUS THEY REQUIRE A LONGER REFRESH COUNTER (8 BITS). ┴S THE AMOUNT OF REFRESH CYCLES HAS INCREASED, THE CAPACITORS' ABILITY OF KEEPING CHARGE HAS BEEN IMPROVED. ╘HE 64 KILOBIT ─╥┴═S REQUIRED 128 REFRESH CYCLES EVERY 2 MILLISECONDS, NOW THE 256 KB CHIPS NEED 256 CYCLES BUT EVERY 4 MS. ╫HENEVER YOU SELECT A ROW ADDRESS (SEE ╙ECTION 1.3), THE BLOCK TO WHICH THE ROW ADDRESS BELONGS GETS REFRESHED. ┴S THE 64 KILOBIT CHIPS HAVE A 7-BIT REFRESH COUNTER, THE LOWEST SEVEN ROW ADDRESS BITS SPECIFY THE ROW ADDRESS, AND THE HIGHEST BIT IS IGNORED. ╘HE 256 KILOBIT MEMORY CHIPS HAVE AN 8-BIT COUNTER, SO THEY IGNORE THE 9TH ROW ADDRESS BIT AND DETERMINE THE BLOCK TO BE REFRESHED BY THE EIGHT LOWEST BITS. ╘HE ╓╔├-╔╔E CHIP REFRESHES THE MEMORY SYSTEMATICALLY, 5 ROWS IN THE END OF EACH SCREEN SCAN LINE. ╔T DOES THIS BY SELECTING A ROW ADDRESS DETERMINED BY ITS INTERNAL COUNTER, AND THEN INCREASES THIS COUNTER BY ONE. ╘HE VIDEO CHIP COULD HAVE ONLY 7-BIT REFRESH COUNTER, AND IT WOULD STILL OPERATE WITH 64 KB CHIPS, BUT FORTUNATELY IT HAS AN 8-BIT COUNTER, SO ALL OF THE 256 KB CHIPS GET REFRESHED. ╬EWER MEMORY CHIPS CAN BE REFRESHED USING A ├┴╙-BEFORE-╥┴╙ TECHNIQUE. ╔N THIS TECHNIQUE, YOU PULL FIRST THE -├┴╙ SIGNAL LOW, AND THEN THE -╥┴╙ SIGNAL. ╘HE MEMORY CHIPS RECOGNIZE THIS AS A MEMORY REFRESH CONDITION, AND THEY REFRESH A BLOCK AND INCREASE THEIR INTERNAL REFRESH COUNTER. ╚OWEVER, THIS TECHNIQUE WAS NOT AVAILABLE WHEN THE ├OMMODORE 64 AND ITS VIDEO CHIP WERE DESIGNED. 1.5 ╘HE ══╒ EXPANSION ╘HE ├OMMODORE 128 HAS TWO MEMORY BANKS, NUMBERED 0 AND 1. ╘HE BANKS ARE SWITCHED IN AND OUT BY A CUSTOM CHIP CALLED ═╧╙ 8722 ══╒ (═EMORY ═ANAGEMENT ╒NIT). ╘HE CHIP HAS THE REGISTERS FOR HANDLING FOUR MEMORY BANKS, BUT THERE ARE ONLY TWO HARDWARE LINES FOR BANK SELECTION, NAMED -├┴╙0 AND -├┴╙1. ╘HEY ARE CONNECTED TO THE -├┴╙ SIGNAL (SEE ╙ECTION 1.3) OF THE MEMORY CHIPS IN BANKS 0 AND 1, RESPECTIVELY. ╘HE ══╒ EXPANSION ADDS TWO NEW MEMORY BANKS TO THE COMPUTER. ╔T ADDS ANOTHER 8722 ══╒ CHIP TO THE SYSTEM, ROUTING SOME SIGNALS SO THAT THE CHIP CONSIDERS BANK 2 AS BANK 1. ╘HE -├┴╙0 AND -├┴╙1 OUTPUTS OF THE TWO ══╒ CHIPS WILL BE COMBINED TO FORM THE -├┴╙ SIGNALS FOR ALL FOUR MEMORY BANKS. ╘HE LOGIC GLUE INVOLVED IS VERY SIMPLE, AND DESIGNING IT WAS QUITE STRAIGHT-FORWARD. 2 ┬UILDING THE EXPANSION 2.1 ─ISCLAIMER ┴LTHOUGH THIS PROCEDURE WORKED PERFECTLY FOR ME, ╔ CANNOT GUARANTEE THAT ANYONE ELSE CAN PERFORM THIS UPGRADE WITHOUT DAMAGING THEIR COMPUTER. ╔ THEREFORE DISCLAIM ANY RESPONSIBILTY FOR ANY DAMAGE THAT MAY OCCUR AS A RESULT OF ATTEMPTING THIS UPGRADE. ╔T WILL ALSO VOID ANY WARRANTY ON YOUR COMPUTER. ╧N A MORE POSITIVE NOTE, THERE IS NO REASON WHY SOMEONE WHO IS EXPERIENCED IN WIELDING A SOLDERING IRON, AND HAS DONE SOME ELECTRONIC CONSTRUCTION OR TROUBLESHOOTING, SHOULD NOT BE ABLE TO PERFORM THIS UPGRADE SUCCESSFULLY. 2.2 ╟ETTING STARTED ┴ TERMOSTATE SOLDERING IRON, DESOLDERING PUMP OR OTHER DESOLDERING TOOL, A SCREWDRIVER, A SPOON AND A CONTINUITY TESTER ARE THE ONLY TOOLS NEEDED. ╘HE SPOON IS FOR REMOVING THE CHIPS. ┴ BOTTLE TOP REMOVER IS NOT SUITABLE FOR THAT. ┴ TINY SCREWDRIVER IS EQUALLY GOOD. ╩UST INSERT THE SCREWDRIVER TIP UNDER ONE END OF THE CHIP AND WOUND IT A BIT IN UPWARD ANGLE SO THAT THE CHIP MOVES SLIGHTLY. ╘HEN INSERT IT TO THE OTHER END OF THE CHIP AND TRY TO LIFT IT A BIT. ┘OU MAY HAVE TO REPEAT THIS PROCEDURE. ┬E CAREFUL NOT TO WOUND THE PINS TOO MUCH. ╘HE CONTINUITY TESTER IS VITAL FOR CHECKING SUSPICIOUS CONNECTIONS. ╔F YOUR TESTER DOES NOT AUTOMATICALLY SELECT PROPER MEASURING RANGE, USE THE COARSEST (MEGA-OHM) RANGE, AS IT USES SMALLEST CURRENT, WHICH SHOULDN'T DAMAGE ANY CHIPS ON THE BOARD. ╘HE INSTALLATION BEGINS OF COURSE BY OPENING THE MACHINE AND REMOVING THE KEYBOARD AND ╠┼─ CABLES (AND INTERNAL DRIVE AND POWER SUPPLY IN THE ├128─). ╔T IS USEFUL TO MEMORIZE, PHOTOGRAPH OR DRAW HOW THE PARTS WERE INITIALLY CONNECTED. ┴FTER REMOVING THE CABLES, OPEN THE SCREWS THAT HOLD THE METAL ╥╞ SHIELD AND THE MOTHERBOARD WITH THE CASE, AND REMOVE THE SHIELD AND THE BOARD. ╔F YOU ARE GOING TO EXPAND YOUR MACHINE ONLY TO 256 KILOBYTES, SKIP THE FOLLOWING SUBSECTION. ╔F YOU AIM TO A WHOLE MEGABYTE, EXPAND YOUR COMPUTER FIRST TO 512 KILOBYTES, AND THEN MAKE THE ══╒ EXPANSION. 2.3 ┼XPANDING TO 512 KILOBYTES ╘HE ╨╔┴ EXPANSION CONSISTS OF ONE DAUGHTER BOARD, WHICH CONTAINS MOST OF THE NEW LOGIC, ONE PIGGY-BACKED CHIP, AND A SPAGHETTI OF WIRES. ╔N ╞IGURE 3, THERE IS A SCHEMATICS DIAGRAM OF THE DAUGHTER BOARD FOR THE ╨╔┴ EXPANSION. ╔F YOU CANNOT READ IT, TRY TO GET THE ╠A╘E╪ OR ╨OST╙CRIPT VERSION OF THIS DOCUMENT. ╔├4 ^ ^ /---3->!-4-----\ ^ ▄ ▄ *--11->!-10---\▄ 20 ▄ < ╥1 === ├1 *---5->!-6---\▄▄ +------+------+ > 4K7 ▄100N╞ *---9->!-8--\▄▄▄ 2-▄ ╨┴0 ╓CC ├╬╘ ▄-40 < ╓ ^ ▄ 74╠╙05 ▄▄▄▄ ╔├2 3-▄ ╨┴1 ╙╨ ▄-39 ▄ 20 ▄ \---------\ ▄▄▄▄ 74╠╙153 4-▄ ╨┴2 -╔╥╤ ▄-21 ▄ +------+------+ ▄ ▄▄▄▄ ^ 5-▄ ╨┴3 ╥╙0 ▄-38-▄-36-▄ ╥╙0 ╓CC ├┴1 ▄-40-* ▄▄▄▄ ╓CC▄ 16 6-▄ ╨┴4 ╥╙1 ▄-37-▄-35-▄ ╥╙1 ├┴2 ▄-39-/ ▄▄▄▄ +-------+ 7-▄ ╨┴5 ╥╙2 ▄-36 *-38-▄ -╔╥╤┴ ╨┴0 ▄--2---*▄▄▄--6-▄╔0A ┌A▄--7-┬15> 8-▄ ╨┴6 ╥╙3 ▄-35 ▄ 37-▄ -╔╥╤┬ ╨┴1 ▄--3----*▄▄--5-▄╔0B ┌B▄--9-┬14> 9-▄ ╨┴7 -╥┼╙┼╘ ▄-34-▄-34-▄ -╥┼╙┼╘ ╨┴4 ▄--6-----▄▄--4-▄╔2A ╓SS▄--8---\ 10-▄ ╨┬0 ─0 ▄-33-▄-33-▄ ─0 ╨┴5 ▄--7-----*▄--3-▄╔3A ┼A▄--1---* 11-▄ ╨┬1 ─1 ▄-32-▄-32-▄ ─1 ╨┬0 ▄-10------*-10-▄╔0B ┼B▄-15---* 12-▄ ╨┬2 ─2 ▄-31-▄-31-▄ ─2 ╨┬1 ▄-11--------11-▄╔1B ▄ ╓ 13-▄ ╨┬3 ─3 ▄-30-▄-30-▄ ─3 ╨┬4 ▄-14--------12-▄╔2B ╙0▄-14-*-<┴15 14-▄ ╨┬4 ─4 ▄-29-▄-29-▄ ─4 ╨┬5 ▄-15--------13-▄╔3B ╙1▄-2-*▄-<┴14 15-▄ ╨┬5 ─5 ▄-28-▄-28-▄ ─5 ├┬1 ▄-18 ^ +-------+ ▄▄ 16-▄ ╨┬6 ─6 ▄-27-▄-27-▄ ─6 ├┬2 ▄-19 ▄ +-------+ ▄▄ 17-▄ ╨┬7 ─7 ▄-26-▄-26-▄ ─7 ▄ \-16-▄╓CC ╙2▄-9-/▄ 24-▄ -╞╠┴╟ ╨HI2 ▄-25-▄-25-▄ ┼ ╨┴2 ▄-4----------4-▄╔0 ╙1▄-10-/ 18-▄ -╨├ -├╙ ▄-23 \-24-▄ ├╙1 ╨┴3 ▄-5----------3-▄╔1 ╙0▄-11---<═╒╪ ▄ ╥/-╫ ▄-22---21-▄ ╥/-╫ ╨┴6 ▄-8----------2-▄╔2 ▄ ▄ ╒1 ╓SS ╘╧─ ▄-19 ▄ ╨┴7 ▄-9----------1-▄╔3 ▄ +-------------+ ┴7>-22-▄ ├╙0 ╨┬2 ▄-12--------15-▄╔4 ┌▄-5 ╥2 33╥ ═6526 ▄ 1 -╔/╧2>-23-▄ -├╙2 ╨┬3 ▄-13--------14-▄╔5 -┌▄-6-^V^-═┴8> ╓ ▄ ╨┬6 ▄-16--------13-▄╔6 -┼▄-7-\ ▄ ╔├1 ╓SS ╨┬7 ▄-17--------12-▄╔7 ╓SS▄-8-* +-------------+ +-------+ ▄ ═├6821 ▄ 1 ╔├3 ╓ ╓ 74╠╙151 ╞IGURE 3. ╘HE SCHEMATICS DIAGRAM OF THE ╨╔┴ EXPANSION. ╙EE TEXT. ╘HERE ARE SOME SIGNALS THAT YOU MUST WIRE TO THE MOTHER BOARD. ┘OU CAN TAKE THE -╔/╧2 AND ┴7 SIGNALS FROM THE CARTRIDGE PORT, OR FROM SOME THROUGH-PUT LOCATION NEAR THE DAUGHTER BOARD. ╘HE -╔/╧2 SIGNAL SHOULD BE ON THE PIN 7 OF THE CHIP ╒3 (74╠╙138). ╘HE ┴7 CAN BE ALSO TAKEN FROM THE ══╒'S (╒7, ═╧╙ 8722) PIN 23, IN WHICH CASE THE ADDRESS RANGE OF THE ╨╔┴ WILL BE LIMITED TO $─╞├0--$─╞╞╞ INSTEAD OF $─╞80--$─╞╞╞, OR FROM THE 8502'S PIN 14. ╔T IS ALSO ON THE MULTIPLEXOR ╒14 (74╠╙257┴), IN PIN 3. ╘HE ═┴8 SIGNAL IS THE NEW ═ULTIPLEXED ┴DDRESS LINE FOR THE MEMORY CHIPS AND SHOULD BE SOLDERED TO THE PIN 1 OF EACH CHIP. ┴LL THE REMAINING FIVE SIGNALS ON THE RIGHT EDGE OF THE DIAGRAM INTERFACE TO THE MULTIPLEXOR CHIP ╒14. ╘HE ═╒╪ SIGNAL GOES TO PIN 1. ╘O INTERFACE THE ADDRESS LINES ┴14, ┴15, ┬14 AND ┬15, YOU HAVE TO DESOLDER TWO PINS OF THE MULTIPLEXOR, 2 AND 5. ╘HE SIGNAL ┴15 SHOULD THEN BE WIRED TO THE MOTHER BOARD CONTACT UNDER THE MULTIPLEXOR PIN 2, OR TO THE 8502'S PIN 23, AND THE SIGNAL ┬15, THE RELOCATED ADDRESS LINE SHOULD BE SOLDERED TO THE MULTIPLEXOR'S PIN 2. ╙IMILARLY, THE CONTACTS ┴14 AND ┬14 SHOULD BE CONNECTED TO THE SYSTEM BUS LINE ┴14 AND THE ╒14'S PIN 5, RESPECTIVELY. ╞IGURE 4 SHOWS THE PINOUT OF THE MULTIPLEXOR CHIP ╒14. ╒14 74╠╙257┴ +--\__/--+ ═╒╪ -▄1 16▄- ╓DD ╘┴15 -▄2 15▄- -┴┼├ ┴7 -▄3 14▄- ╘┴12 ╓═┴7 -▄4 13▄- ┴4 ╘┴14 -▄5 12▄- ╓═┴4 ┴6 -▄6 11▄- ╘┴13 ╓═┴6 -▄7 10▄- ┴5 ╓SS -▄8 9▄- ╓═┴5 +--------+ ╞IGURE 4: ╨IN-OUT FOR THE MULTIPLEXER CHIP ╒14 +-----\___/-----+ +-----\___/-----+ ╓SS -▄1 40▄- ├╬╘ ╓SS -▄1 40▄- ├┴1 ╨┴0 -▄2 39▄- ╙╨ ╨┴0 -▄2 39▄- ├┴2 ╨┴1 -▄3 38▄- ╥╙0 ╨┴1 -▄3 38▄- -╔╥╤┴ ╨┴2 -▄4 ═╧╙ 37▄- ╥╙1 ╨┴2 -▄4 ═├ 37▄- -╔╥╤┬ ╨┴3 -▄5 36▄- ╥╙2 ╨┴3 -▄5 36▄- ╥╙0 ╨┴4 -▄6 6526 35▄- ╥╙3 ╨┴4 -▄6 6821 35▄- ╥╙1 ╨┴5 -▄7 34▄- -╥┼╙┼╘ ╨┴5 -▄7 34▄- -╥┼╙┼╘ ╨┴6 -▄8 ├╔┴ 33▄- ─0 ╨┴6 -▄8 ╨╔┴ 33▄- ─0 ╨┴7 -▄9 32▄- ─1 ╨┴7 -▄9 32▄- ─1 ╨┬0 -▄10 31▄- ─2 ╨┬0 -▄10 31▄- ─2 ╨┬1 -▄11 30▄- ─3 ╨┬1 -▄11 30▄- ─3 ╨┬2 -▄12 29▄- ─4 ╨┬2 -▄12 29▄- ─4 ╨┬3 -▄13 28▄- ─5 ╨┬3 -▄13 28▄- ─5 ╨┬4 -▄14 27▄- ─6 ╨┬4 -▄14 27▄- ─6 ╨┬5 -▄15 26▄- ─7 ╨┬5 -▄15 26▄- ─7 ╨┬6 -▄16 25▄- ╨HI2 ╨┬6 -▄16 25▄- ┼ ╨┬7 -▄17 24▄- -╞╠┴╟ ╨┬7 -▄17 24▄- ├╙1 ╨├ -▄18 23▄- -├╙ ├┬1 -▄18 23▄- -├╙2 ╘╧─ -▄19 22▄- ╥/-╫ ├┬2 -▄19 22▄- ├╙0 ╓DD -▄20 21▄- -╔╥╤ ╓DD -▄20 21▄- ╥/-╫ +---------------+ +---------------+ ╞IGURE 5: ╘HE ├╔┴ AND THE ╨╔┴ +----------------------------------------------+ ▄ ┼LECTRONIC ├OMPONENTS ▄ +----------+-----------------------------------+ ▄ ╙YMBOL ▄ ─ESCRIPTION ▄ +----------+-----------------------------------+ ▄ ╔├1 ▄ ═├6821 ▄ ▄ ╔├2 ▄ 74╠╙153 (OR 74╠╙253) ▄ ▄ ╔├3 ▄ 74╠╙151 (OR 74╠╙251) ▄ ▄ ╔├4 ▄ 74╠╙05 ▄ ▄ ╒9--╒12, ▄ 80256 OR ▄ ▄ ╒21--╒24 ▄ COMPATIBLE ▄ ▄ ├1 ▄ 100 N╞ POLYESTER CAPACITOR ▄ ▄ ╥1 ▄ 33 OHM RESISTOR ▄ ▄ ╥2 ▄ 4.7 KILO-OHM RESISTOR ▄ +----------+-----------------------------------+ +----------------------------------------------+ ▄ ╧THER ╨ARTS ▄ +----------+-----------------------------------+ ▄ ╤UANTITY ▄ ╤UALITY ▄ +----------+-----------------------------------+ ▄ 2 PCS ▄ 10-PIN FLAT CABLE CONNECTOR PAIR ▄ ▄ CA. 15 CM▄ 10-WIRE FLAT CABLE ▄ ▄ 1 PC ▄ 16-PIN PIGGYBACK SOCKET ▄ ▄ 2 PCS ▄ 16-PIN ╫╫-SOCKET ▄ ▄ OR ▄ ONE 16-PIN PIGGYBACK SOCKET AND ▄ ▄ ▄ TWO NORMAL 16-PIN SOCKETS ▄ ▄ 1 PC ▄ 40-PIN ╫╫-SOCKET ▄ ▄ OR ▄ ONE 40-PIN PIGGYBACK SOCKET AND ▄ ▄ ▄ A NORMAL 40-PIN SOCKET ▄ ▄ 10 PCS ▄ 16-PIN SOCKET ▄ ▄ 1 PC ▄ 14-PIN SOCKET ▄ ▄ PLENTY OF▄ CONNECTION WIRE ▄ +----------+-----------------------------------+ ╘ABLE 1. ╨ARTS LIST FOR THE ╨╔┴ EXPANSION 2.3.1 ╥EMOVING THE OLD MEMORY CHIPS ╞IRST YOU HAVE TO REMOVE THE MEMORY CHIPS ╒38 THROUGH ╒53. ╔F YOU LOOK AT THE MOTHER BOARD FROM THE FRONT OF THE COMPUTER AS IF YOU WERE TYPING, THE CHIPS ARE ON THE FRONT LEFT IN TWO ROWS OF EIGHT CHIPS. ╘HEY ARE OF TYPE 4164 (OR 3164 OR 6665 OR 6664 OR 8064 OR...). ┘OU COULD INSTALL THE NEW CHIPS INTO SOCKETS, BUT ╔ THOUGHT THAT IT IS A WASTE OF MONEY. ╔F THESE MEMORY CHIPS ARE ALREADY ON SOCKETS, THE MOST OF THE WORK IS DONE FOR YOU. ╔T HELPS A LOT, IF YOU REMOVE THE BYPASS CAPACITORS BEFORE REMOVING THE CHIPS. ╥EMOVING THE COMPONENTS IS EASIEST WITH A DESOLDERING PUMP. ╔T BECOMES EVEN EASIER, WHEN YOU FIRST SOLDER THE PINS WITH FRESH SOLDER, SO THAT THE HARTZ FROM IT MAKES THE REMOVAL OF OLD SOLDER EASIER. ╒SING MUCH POWER IS QUESTIONABLE, AS THE COPPER FOLIO COMES OFF THE BOARD IN A SURPRISINGLY EASY WAY. ┴S USUAL, ╔ USED A SCREWDRIVER LIKE A CROWBAR, AND THE THROUGH-COPPERING GOT LOST FROM SEVERAL PLACES. ╘HIS WAS NOT CRUCIAL, AS THOSE PINS WERE CONNECTED ONLY TO THE DOWN SIDE OF THE BOARD. ╚OWEVER, THREE OR FOUR ROUTES BROKE ON THE TOP SIDE ALSO. ╘HIS MADE IT FAR MORE DIFFICULT (AND SLOWER) TO SOLDER THE NEW CHIPS IN, BUT ╔ SUCCEEDED ON THE FIRST TRY. ┴FTER YOU HAVE REMOVED THE 4164S, YOU CAN SOLDER THE 16-PIN SOCKETS (OR THE 41256 MEMORY CHIPS) INTO THEIR PLACES. ┘OU CAN SOLDER THE CAPACITORS BACK AS WELL, IF YOU REMOVED THEM. 2.3.2 ┴DDING THE NEW ADDRESS LINE ┘OU MUST CONNECT THE PIN 1 OF EACH MEMORY CHIP (OR SOCKET). ╔T IS THE EXTRA ADDRESS LINE (═┴8) TO THE SWITCHER. ╘HE BEST WAY IS TO SOLDER A ╫IRE-╫RAP WIRE TO EACH CONTACT UNDER THE MOTHER BOARD, BUT ANY THIN AND PLIABLE UNI-STRAND WIRE SHOULD DO. ╘HE WIRE DOES NOT AFFECT IN ANY WAY THE COMPUTER'S OPERATION WITH 64 KB CHIPS. ┴FTER THE PINS HAVE BEEN CONNECTED TOGETHER, THEY MUST BE TEMPORARILY CONNECTED TO +5 ╓, WHICH IS IN THE PIN 8 OF THE MEMORY CHIPS. ├OMPARING TO ╘╘╠ CHIPS, THE OPERATING VOLTAGES ARE ▐REVERSED' IN DYNAMIC MEMORIES. ╬OW THE NEW 256 KB MEMORY CHIPS CAN BE INSTALLED TO THE SOCKETS (PREFERABLY RIGHT-SIDE FORWARD), AND YOU CAN TRY SWITCHING THE POWER ON. ┘OU DO NOT HAVE TO CONNECT ANYTHING EXCEPT THE POWER CABLE AND THE CABLE TO THE ╘╓ SET OR MONITOR. ┼NSURE THAT THE ▐▐40/80 DISPLAY'' KEY IS UP, AND THAT THE MONITOR IS SET TO DISPLAY THE 40 COLUMN SCREEN, TOO. ╔T IS A GOOD IDEA TO TURN ON THE MONITOR FIRST AND LET IT WARM UP, SO THAT IT WILL SHOW THE PICTURE FROM THE VERY BEGINNING. ╔F THE SCREEN SHOWS UP NORMALLY, YOU MAY NOT (YET) HAVE MADE ANY MISTAKES. ╔F IT DOES NOT SHOW UP AT ALL, YOU HAVE TO FIND POSSIBLE CUT-OUTS AND SHORTS. ═ULTI-COLORED ▐@'S SHOW UP USUALLY BECAUSE OF TOO SMALL BYPASS CAPACITORS. ┴NOTHER CAUSE IS THAT THE PIN 1 IS NOT CONNECTED TO +5 ╓. ╔N THIS CASE THE SCREEN MAY COME UP NORMALLY, BUT A LITTLE DISTURBANCE IN THE OPERATING VOLTAGE LOCKS THE COMPUTER UP. ╬OW THE COMPUTER SHOULD OPERATE EXACTLY LIKE AN UNEXPANDED ├128, SO ANY PREVIOUSLY WORKING PROGRAM SHOULD WORK WITH IT. 2.3.3 ╨REPARE FOR THE FINAL STEP ╬EXT YOU REMOVE ╒14 (74╠╙257, TO THE RIGHT OF THE MEMORY CHIPS) AND ╒1 (═╧╙ 6526, NEAR THE KEYBOARD CONNECTOR). ┼ITHER OR BOTH OF THESE CHIPS MAY ALREADY BE ON SOCKETS, AND YOU MUST REMOVE THE REST. ╥EINSERT THE CHIPS AND CHECK IF THE MACHINE BOOTS UP. ╔F THE COMPUTER DOES NOT WORK ON FIRST TRY, REMEMBER TO DISCONNECT ANY CABLES FROM IT BEFORE TRYING TO FIX THE PROBLEM. ╘HE SOLDERING IRON MAY OCCASIONALLY GIVE LITTLE ELECTRIC PULSES TO THE COMPUTER, AND THIS MIGHT BURN SOME EXPENSIVE CHIPS, ESPECIALLY IF THE COMPUTER IS HOOKED TO A WALL OUTLET OR A TELEVISION SET. ╫HEN YOU HAVE COMPLETED THE PREPARATIONS, YOU CAN START BUILDING THE CONTROL LOGIC. ┘OU COULD BUILD THE WHOLE EXPANSION BY PIGGY-BACKING CHIPS, THAT IS, BY SOLDERING NEW CHIPS ON THE TOP OF OLD ONES, BENDING SOME FEET TO THE SIDE, AND CONNECTING MESSY WIRES ALL OVER YOUR COMPUTER. ╚OWEVER, THE BEST WAY IS TO PUT MOST OF THE CHIPS ON A DAUGHTER BOARD. ╔ USED ONLY A SMALL DAUGHTER BOARD, AND PIGGY-BACKED FIVE OR SIX CHIPS, BUT YOU CAN BE WISER AND PUT ALL NEW CHIPS ON THE DAUGHTER BOARD. ═Y DAUGHTER BOARD INTERFACES THE HEART OF THE EXPANSION, ═├ 6821 ╨╔┴, TO THE BUS OF THE COMPUTER THROUGH THE PINS OF ╒1, THE ═╧╙ 6526 ├╔┴ NEAR THE KEYBOARD CONNECTOR. ╘HE ├╔┴ IS RAISED ON THE BOARD, AND ITS PINS ARE LENGHTENED WITH TWO THROUGH-PUT SOCKET HALVES, SO THAT THEY CAN REACH THE SOCKET ON THE MOTHER BOARD. ╔ BUILT THE DAUGHTER BOARD ON AN UNCOPPERED PROTOTYPE BOARD, A PLASTIC BOARD WITH HOLES PUNCHED IN IT AT A 1/10 INCH GRID. ╘HE ROOM RESERVED FOR THE MOTHER BOARD IN THE ├128 AND ├128─ IS VERY SHALLOW, ABOUT ONE THIRD OF THE HEIGHT IN THE ├64. ╔N ADDITION TO THAT, THE FRONT EDGE OF THE MOTHER BOARD MUST BE EVEN SHALLOWER, AS THE METAL SHIELD HAS AN ANGLE IN IT. ─UE TO THIS, YOU CANNOT USE ANY SOCKETS IN THE ├╔┴ DAUGHTER BOARD, AND YOU HAVE TO CHOOSE THE CHIP LAYOUT VERY CAREFULLY. ═Y DAUGHTER BOARD HAS THE ╨╔┴ CHIP ON THE LEFT SIDE OF THE ├╔┴. ╘O LEAVE ROOM FOR THE ══╒ EXPANSION, ╔ COULD PUT ONLY TWO CHIPS (╔├2 AND ╔├3) HORIZONTALLY NEXT TO THE NOTCHED END OF THE ╨╔┴ (╔├1) AND ├╔┴ (╒1). ╔ PLACED THE INVERTER (╔├4) WITH THE 100 N╞ BYPASS CAPACITOR NEAR THE OTHER END OF THE ╨╔┴ CHIP. ┴ FAR BETTER WAY IS TO INTERFACE THE DAUGHTER BOARD TO THE SOCKET OF ╒7 (═╧╙ 8722 ══╒). ╘HERE ARE NOT SO TERRIBLE SPACE LIMITATIONS, THE ╥╞ SHIELD IS HIGHER NEAR THE REAR EDGE OF THE MACHINE THAN ON THE FRONT EDGE. ╔N ADDITION TO THAT, THE KEYBOARD CABLE OF THE FLAT ├128 IS NOT SO LIKELY TO DAMAGE THAT DAUGHTER BOARD THAN THE ├╔┴ BOARD, WHICH WOULD BE NEXT TO THE KEYBOARD CONNECTOR. ╘HE ══╒ DAUGHTER BOARD WOULD ALLOW YOU TO MAKE AN EASILY REMOVABLE EXPANSION, AS NO CHIPS WOULD BE PIGGY-BACKED. ┘OU COULD EVEN MAKE AN OPTION FOR INSTALLING A SECOND ═╧╙ 6581 (8580 FOR THE 9 VOLT VERSION) ╙╔─ (╙OUND ╔NTERFACE ─EVICE) ON THE BOARD TO GET STEREO SOUND. ╚OWEVER, THIS BOARD SHOULD BE ETCHED, AS THE ╨╔┴ AND ══╒ PIN LAYOUTS DIFFER VERY MUCH FROM EACH OTHER. ╙EE ╞IGURE 6 FOR PINOUTS FOR THE ══╒. ╨INOUTS FOR THE ╨╔┴ AND ├╔┴ ARE PRESENTED IN ╞IGURE 5. ┬UILDING THE ├╔┴ DAUGHTER BOARD WAS A REAL PAIN. ╔ HAD TO SOLDER THE ├╔┴ DIRECTLY TO THE PIGGY-BACK SOCKET PINS, AND ╔ EVEN BENT THE ├╔┴ PIN ENDS ASIDE, SO THAT ╔ COULD MAKE IT ABOUT 1 MM SHALLOWER. ╔ PUT THE ├╔┴ PINS AND THE THROUGH-PUT SOCKET HALVES TO THE SAME HOLES AND STARTED SOLDERING. ╘O KEEP THE SOCKET HALVES PARALLEL, ╔ PUT ONE HALF AGAINST THE OUTSIDE OF THE ├╔┴ PINS, AND THE OTHER HALF AGAINST THE INSIDE. ╔T WAS VERY EASY TO SOLDER THE HALF WHOSE CONTACTS WERE OUTSIDE THE PINS, BUT THE OTHER HALF WAS A REAL PAIN. ╔T COULD BE DONE BY HEATING A ├╔┴ PIN, INSERTING SOME SOLDER FROM THE SIDE, AND HOPING THAT IT CONNECTS THE PIGGY-BACK SOCKET PIN. ╔ HAD TO SOLDER THOSE PINS FOUR OR FIVE TIMES. ┴FTER RAISING THE ├╔┴ ON THE DAUGHTER BOARD, IT IS A VERY GOOD IDEA TO INSERT THE BOARD TO THE SOCKET AND CHECK IF THE MACHINE BOOTS UP. ╔F SOME OF THE RIGHT SIDE PINS (21--40) ARE LOOSE, THE MACHINE CAN JUMP TO ═╠ MONITOR DUE TO AN UNEXPECTED INTERRUPT, OR IT CAN MISREAD THE KEYBOARD. ╔N THE ├64 MODE, IT WILL PROBABLY JAM. ╘HE NEXT STEP IS TO ADD THE ╨╔┴ ON THE BOARD. ╘HE CONTACTS FROM THE ├╔┴ EXCEPT THE OPERATING VOLTAGES MAY BE DIFFICULT TO ROUTE. ╔ SOLVED THE PROBLEM BY PUTTING THE WIRES THROUGH THE VERY SMALL HOLES THAT WERE LEFT BETWEEN THE BIGGY-BACK SOCKET HALVES AND THE DOWN SURFACE OF THE DAUGHTER BOARD. ╔T WAS VERY PAINFUL, BUT THE DESIGN IS VERY COMPACT. ┴FTER SOLDERING ALL ├╔┴ CONTACTS TO THE ╨╔┴, ╔ WIRED THE INVERTER AND THE REST OF THE CHIPS. ╘O INCREASE RELIABILITY, ╔ USED THIN MULTI-STRAND WIRE, AS UNI-STRAND WIRE GETS EASILY LOOSE WHEN YOU PUSH IT. ╙INCE ╔ HAD FINISHED THE DAUGHTER BOARD, ╔ BENT UP THE PINS 2 AND 5 OF THE ╒14 MULTIPLEXER CHIP, AND CONNECTED ITS PINS 1--3 AND 5--6 TO THE DAUGHTER BOARD WITH WIRES. ╞IRST ╔ INSERTED THE WIRES FOR ┴14 AND ┴15 DIRECTLY TO THE CHIP SOCKET, BUT AS IT TURNED OUT TO BE UNRELIABLE, ╔ LOCATED A THROUGH-PUT PLACE FOR EACH LINE, AND SOLDERED THE WIRES THERE INSTEAD. ╫HEN YOU HAVE WIRED THE MULTIPLEXER ╒14, REMOVE THE JUMPER WIRE BETWEEN ═┴8 AND +5 ╓ AND CONNECT THAT ADDRESS LINE TO THE DAUGHTER BOARD. ╘HEN CONNECT THE ╨╔┴'S -├╙ LINE TO -╔/╧2, WHICH IS IN ╒3'S PIN 7 (OR ONE OF THE THROUGH-PUT PLACES ALONG THE TRACE'S PATH TO THE CARTRIDGE PORT), AND INSERT THE DAUGHTER BOARD TO THE SOCKET. ╙WITCH THE POWER ON AND PRAY THAT YOUR DEAR COMPUTER WORKS. ╔F YOU GET ONLY CRAP CONSISTING OF @'S OR SOME RANDOMLY CHANGING GRAPHICS ON THE 40 COLUMN SCREEN, CHECK THAT ALL ├╔┴ PINS HAVE A GOOD CONTACT TO THE PIGGY-BACK SOCKET, AND THAT THE WIRES FROM ╒14 AND ITS SOCKET ARE FIRMLY CONNECTED. ╔F IT DOESN'T HELP, YOU HAVE TO CHECK ALL DAUGHTER BOARD CONNECTIONS WITH THE CONTINUITY TESTER. ─ON'T PANIC, YOU CAN ENSURE THAT THE COMPUTER WORKS BY CONNECTING THE ═┴8 LINE BACK TO +5 ╓, BY BENDING THE ╒14 LINES BACK DOWN, AND BY INSERTING A SPARE ├╔┴ CHIP TO THE ├╔┴ SOCKET. 2.3.4 ╘ESTING ┴FTER YOU HAVE INSTALLED THE BOARDS TO YOUR MACHINE, IT IS TIME TO TEST THE CONNECTIONS. ┘OU CAN CONNECT ╠┼─, KEYBOARD AND PROBABLY DISK DRIVE IN ADDITION TO THE POWER CABLE AND THE ╘╓ CABLE, BUT DO NOT FASTEN THE MOUNTING SCREWS YET. ╔F THE 40 COLUMN SCREEN SHOWS UP AND IF THE MACHINE SEEMS TO OPERATE, INPUT THE FOLLOWING TEST PROGRAM: 10 ╨┬=57282 20 ╨╧╦┼ ╨┬,255:╨╧╦┼ ╨┬+1,4:╨╧╦┼ ╨┬,255 30 ╨╥╔╬╘"╨╥┼╙╙ ┴ ╦┼┘ ┴╞╘┼╥ ╘╚╔╙ ╚┴╙ ─╔╙┴╨╨┼┴╥┼─": ╞╧╥ ╔=0 ╘╧ 3000:╬┼╪╘ 40 ╨╧╦┼ ╨┬,14:╫┴╔╘ 198,15:╟┼╘ ┴$:╨╧╦┼ ╨┬,255 ╧N THE LINE 10 A VARIABLE ╨┬ IS SET UP. ╔T IS THE ADDRESS OF THE PERIPHERAL AND DATA DIRECTION REGISTERS FOR THE 6821 PORT ┬, AND THE BLOCK SELECTION REGISTER OF THE SEGMENTS 2 AND 3 AND THE ╓╔├-╔╔E. ╘HE LINE 20 CONTAINS INITIALIZATION OF ╨╔┴: THE LINES ╨┬0--╨┬7 ARE SET OUTPUTS, THE DATA DIRECTION REGISTER IS SWITCHED TO DATA REGISTER WITH ▐╨╧╦┼ ╨┬+1,4', AND THE ╨┬ LINES ARE SET HIGH. ╧N THE LINE 40 ╓╔├-╔╔E IS GIVEN BLOCK 0 ($00000--$0╞╞╞╞) OF THE DEFAULT BANK (0), AND THEN THE PROGRAM WAITS FOR A KEYPRESS AND RESTORES THE BLOCK ╞ ($30000--$3╞╞╞╞). ╔F THIS TEST PROGRAM WORKS AS EXPECTED, THE SCREEN WILL BE FILLED WITH ▐@'S AND OTHER RANDOM CHARACTERS. ┴T THIS POINT, YOU MAY WANT TO SWITCH TO THE ├64 MODE AND TO RUN THE ╘┼╙╘ PROGRAM, WHICH IS AMONG THE DISTRIBUTION FILES. (╙EE ╙ECTION 5.1.) ┴LSO, YOU CAN TRY THE ╨╔┴╟╠╧┬┼.128 PROGRAM TO TEST ALMOST ALL OF THE 512 K┬ OR 1024 K┬ MEMORY. ╘HE ╨╔┴╟╠╧┬┼.128 PROGRAM IS BASED ON ╟EORG ╙CHWARZ'S GLOBE SPINNER ╟╠╧┬┼.64 THAT USES TWO GRAPHICS SCREENS. ╚E HAS MADE A SLIGHTLY FASTER VERSION FOR THE ├128, UTILIZING THE 2 ═╚Z MODE IN THE SCREEN BORDER. ┬UT COMPARED TO IT, ╨╔┴╟╠╧┬┼.128 IS FROM OTHER PLANET. ─EPENDING ON THE AMOUNT OF MEMORY AVAILABLE, IT CALCULATES 112 OR 56 PICTURES OF THE GLOBE AND THEN USES THEM IN A CONTINUOUS ANIMATION. ╧NE REVOLUTION WILL LAST APPROXIMATELY 2.23 SECONDS ON ╨┴╠ SYSTEMS AND 1.87 SECONDS ON ╬╘╙├. ┴S THE CALCULATION PHASE LASTS MORE THAN A MINUTE, THE PROGRAM CHANGES THE SCREEN COLOR BETWEEN EACH PICTURE. ╧N ╬╘╙├ SYSTEMS, THE EDGE OF THE GLOBE MIGHT NOT DISPLAY CORRECTLY. ╘HE EDGE IS ROUNDED WITH 24 SPRITES, WHICH ARE MOVED AROUND BY A RASTER INTERRUPT ROUTINE, STARTING FROM $4801. ╔ DID NOT BOTHER TO THINK ABOUT THE TIMINGS, SINCE ╔ HAD ENOUGH TROUBLES WITH RELOCATING THE PROGRAM AND THE TABLES, AND IN TRYING TO GET ALL THAT GRAPHICS DATA TO FIT IN THE MEMORY. ╔N THE DISTANT FUTURE ╔ MIGHT MAKE A BETTER LOOKING VERSION OF THE GLOBE SPINNER, WHO KNOWS. ╘HERE IS OVER 80 KILOBYTES OF UNUSED MEMORY WHEN RUNNING THE PROGRAM ON A ├1028. 2.4 ┼XPANDING TO 256 OR 1024 KILOBYTES ╘HIS ══╒ EXPANSION IS FAR EASIER TO UNDERSTAND THAN THE ╨╔┴ EXPANSION, AND MAYBE FASTER TO BUILD, TOO. ┘OU HAVE TO SOLDER THE NEW ══╒ AND A COUPLE OF LOGIC CHIPS ON TOP OF SOME CHIPS LAYING ON THE MOTHER BOARD, OR TO INSTALL THEM ON A DAUGHTER BOARD. ╔ CHOSE THE PIGGY-BACKING METHOD. ╘HE BIGGEST PROBLEM WITH THIS EXPANSION IS THAT THE ═╧╙ 8722 ══╒ IS A CUSTOM CHIP FROM ├OMMODORE, AND IT IS ONLY USED IN THE ├OMMODORE 128, WHICH HAS NOT BEEN MANUFACTURED FOR AGES. ╔F YOU DO NOT HAPPEN TO HAVE A WRECK ├128 LYING AROUND, YOU CAN TRY ORDERING THE CHIP FROM ╩AMECO ┼LECTRONICS. ╘HE CHIP SHOULDN'T COST MORE THAN 10 ╒╙─. ┘OU CAN REACH THEM AT: ╧RDERS (PHONE): 1-800-831-4242 ╧RDERS (FAX): 1-800-237-6948 ╞AX (OVERSEAS): +1-415-592-2503 ═AIL: ╩AMECO ┼LECTRONICS 1355 ╙HOREWAY ╥OAD ┬ELMONT, ├┴ 94002 ╒.╙.┴. ╔N ╞IGURE 6, THERE IS A WIRING DIAGRAM FOR THIS EXPANSION. ╔T IS A BIT TIGHT, AND NEEDS SOME CLARIFICATION. ╘HE ╒9 74╞32 IS A QUAD ╧╥ CHIP (EACH ├ = ┴ ╧╥ ┬) THAT TAKES THE -├┴╙0 AND -├┴╙1 OUTPUTS FROM THE ORIGINAL ══╒ AND LETS THEM THROUGH TO THE ORIGINAL MEMORY CHIPS AS -╥┴═├┴╙0 AND -╥┴═├┴╙1 IF AND ONLY IF BOTH THE -├┴╙ OUTPUT FROM THE VIDEO CHIP AND THE -├┴╙┼╬┬ OUTPUT FROM THE ╨╠┴ ARE ACTIVE. ╔├9, THE 74╞32 NEXT TO ╒9, ▐▐HOOKS'' THE -╥┴═├┴╙ OUTPUTS AND LETS THEM THROUGH WHEN THE -├┴╙0 OUTPUT OF THE NEW ══╒ IS ACTIVE, THAT IS, WHEN THE BANKS 0 OR 1 ARE BEING ACCESSED. ╘HE ╔├9 ALSO GENERATES THE -├┴╙ SIGNALS FOR THE TWO NEW MEMORY BANKS, -╥┴═├┴╙2 AND -╥┴═├┴╙3. ╘HE 68 OHM RESISTORS PROTECT THE ╔├9, AS THE INPUTS OF THE ─╥┴═ CHIPS ARE NOT FULLY ╘╘╠ COMPATIBLE. ╘HE LOGIC GLUE AT THE LOWER EDGE OF THE PICTURE TAKE CARE OF FEEDING CORRECT VALUES TO THE NEW ══╒'S DATA LEADS ─6 AND ─0. ╙EE ╙ECTION 3.1.3 FOR A COMPLETE DESCRIPTION. ╘HE ╔├8 4066 TAKES THE DATA LINES ─0, ─1, ─6 AND ─7 FROM THE SYSTEM BUS AND FEEDS TWO OF THEM TO THE NEW ══╒'S DATA LINES ─0 AND ─6 AT A TIME. ╔N MY IMPLEMENTATION THE ─0 AND ─1 LINES COME FROM THE ╒20 4066 AND THE REMAINING TWO DATA LEADS FROM THE ORIGINAL ══╒. ╘HE ╒20 4066 IS NOT REALLY NEEDED AT ALL, AS THE SAME LINES ARE ON THE ORIGINAL ══╒, BUT ╔ CHOSE IT AS IT WAS EASY TO PIGGY-BACK. ╧N THE LOWER RIGHT CORNER IS ╒3, A 74╠╙138 WHICH TAKES CARE OF PRODUCING THE -├╙ (├HIP ╙ELECT) SIGNALS FOR THE ADDRESS RANGES $─400--$─┬╞╞ AND $─├00--$─╞╞╞. ╘HE ╔├6 DOES NOT ACTUALLY NEED ANY SIGNALS FROM IT, NOT EVEN THE -╔╧├╙ THAT IS ON THE CONTACT -╟2, BUT IT WAS EASIER TO PIGGY-BACK SO. ╔F YOU BUILD A DAUGHTER BOARD FOR THIS EXPANSION TOO, YOU CAN WIRE THE ╔├6'S ╟1 TO +5 ╓ AND THE -╟2 AND -╟3 TO GROUND. ╘HE ╔├6 TOGETHER WITH THE ╔├7, A QUAD ╬EGATIVE-┴╬─ CHIP, INPUTS THE FOUR LOWMOST ADDRESS BUS BITS AND PRODUCES THE ┼NABLE SIGNALS FOR THE ╔├8 4066. ^ ^ ╓CC ▄ 1 ╓CC ▄ 1 +-----------+ +-----------+ 3--▄╘┴15 -╥┼╙┼╘▄--2-------2-▄-╥┼╙┼╘ ╘┴15▄--3 4--▄╘┴14 ┴┼├▄-16------16-▄┴┼├ ╘┴14▄--4 5--▄╘┴13 ═╒╪▄-17------17-▄═╒╪ ╘┴13▄--5 ╔├9 ╒9 6--▄╘┴12 ┴0▄-18------18-▄┴0 ╘┴12▄--6 74╞32 74╞32 7--▄╘┴11 ┴1▄-19------19-▄┴1 ╘┴11▄--7 ^ ^ 8--▄╘┴10 ┴2▄-20------20-▄┴2 ╘┴10▄--8 ╓CC ▄ 14 ╓CC ▄ 14 9--▄╘┴9 ┴3▄-21------21-▄┴3 ╘┴9▄--9 +-----+ +-----+ 10-▄╘┴8 ┴5/┴4▄-22------22-▄┴5/┴4 ╘┴8▄-10 /--1-▄┴1 ┬1▄--2-\ -▄┬1 ┴1▄- 11-▄-├┴╙1 ┴7/┴6▄-23------23-▄┴7/┴6 -├┴╙1▄-11--*--4-▄┴2 ┬4▄-12-*-\ -▄┬4 ┴2▄- 12-▄-├┴╙0 ┴8▄-24------24-▄┴8 -├┴╙0▄-12-*--10-▄┴3 ├4▄-11---O\-▄├4 ┴3▄- 13-▄═╙2 ┴9▄-25------25-▄┴9 ═╙2▄-13 \--13-▄┴4 ┬2▄--5-\ -▄┬2 ┴4▄- 14-▄═╙1 ┴10▄-26------26-▄┴10 ═╙1▄-14 /-3-▄├1 ┬3▄--9-*-\ -▄┬3 ├1▄- 15-▄═╙0 ┴11▄-27------27-▄┴11 ═╙0▄-15 / /6-▄├2 ├3▄--8---O\-▄├3 ├2▄- ▄ ┴12▄-28------28-▄┴12 ▄ ▄ ▄ +-----+ +-----+ ▄ ┴13▄-29------29-▄┴13 ▄ ▄ ▄ ╓SS ▄ 7 ╓SS ▄ 7 ▄ ┴14▄-30------30-▄┴14 ▄ ▄ ▄ ╓ ╓ ▄ ┴15▄-31------31-▄┴15 ▄ ╥3< < ╥4 ▄ ╥/-╫▄-32------32-▄╥/-╫ ▄68OHM> > 68OHM ▄ ╨HI ╔╬▄-33------33-▄╨HI ╔╬ ▄ < < ▄ ─0▄-35 /----35-▄─0 ▄ ▄ ▄ ▄ ─1▄-36-▄----36-▄─1 ▄ ▄ \---- -╥┴═├┴╙2> ▄ ╒7 ─2▄-37-▄----37-▄─2 ╔├5 ▄ ▄ ▄ ═8722 ─3▄-38-▄----38-▄─3 ═8722 ▄ \------ -╥┴═├┴╙3> ▄ ══╒ ─4▄-39-▄----39-▄─4 ══╒ ▄ ▄ ─5▄-40-▄----40-▄─5 ▄ ╠EGEND: ▄ ─6▄-41-▄\ /-41-▄─6 ▄ ▄ ─7▄-42-▄▄*▄-42-▄─7 ▄ ▄ ▄ -┌80┼╬▄-43-▄▄▄▄-43-▄-┌80┼╬ ▄ < \ ▄ -╞╙─╔╥▄-44-▄▄▄▄-44-▄-╞╙─╔╥ ▄ > ╥ESISTOR &! 74╞00 PORT * ├ROSSING ▄ -╟┴═┼▄-45-▄▄▄▄-45-▄-╟┴═┼ ▄ < / ▄ -┼╪╥╧═▄-46-▄▄▄▄-46-▄-┼╪╥╧═ ▄ ▄ ▄ ═╙3▄-47-▄▄▄▄-47-▄═╙3 ▄ ^ ^ ▄ 40/-80▄-48-▄▄▄▄-48-▄40/-80 ▄ ╓CC ▄ 16 ╓CC ▄ 16 +-----------+/---▄▄▄/ +-----------+ +-------+ +-------+ ╓SS ▄ 34 ▄ ▄\\------\╓SS ▄ 34 ┴0>--1-▄┴ -╟3▄-4---▄-╟3 ┴▄- ╓ ▄ \ \---\ \ ╓ ┴1>--2-▄┬ -╟2▄-5---▄-╟2 ┬▄- ▄ *--\ \ ▄ ┴2>--3-▄├ ╟1▄-6---▄╟1 ├▄- 1▄ 4▄ 8▄11▄ ▄ 1▄ 4▄ 8▄11▄ /-<┴3 /15-▄-┘0 ▄ ▄ -┘0▄- ^ +-----------+ ▄ +-----------+ ^ \ _!& -▄-┘1 ▄ ▄ -┘1▄- ▄ ▄┴1 ┴2 ┴3 ┴4▄ ▄ ▄┴1 ┴2 ┴3 ┴4▄ ▄ \&/ \13-▄-┘2 ▄ ▄ -┘2▄- \-▄╓CC ┬4▄ *10▄┬4 ╓CC▄-/ ! -▄-┘3 ▄ ▄ -┘3▄- 14▄ ╒20 ┬3▄ \9-▄┬3 ╔├8 ▄14/-*-*-\ -▄-┘4 -┘7▄- -▄-┘7 -┘4▄- ▄ 4066 ┬2▄--3-▄┬2 4066 ▄ ▄ \ / /-*-▄-┘5 -┘6▄- -▄-┘6 -┘5▄- /-▄╓SS ┬1▄--2-▄┬1 ╓SS▄-\▄ \&/ / ▄ +-------+ +-------+ ▄7▄┼1 ┼2 ┼3 ┼4▄ ▄┼1 ┼2 ┼3 ┼4▄7▄▄ !/-*-\▄ ╓SS ▄ 8 ╓SS ▄ 8 ╓ +-----------+ +-----------+ ╓▄ ▄▄ ▄▄ ╓ ╓ 13▄ 5▄ 6▄12▄ 13▄ 5▄ 6▄12▄ ▄ /\ /▄ ▄ \--▄--▄---▄--/ \&/ ▄ ╔├6 ╒3 \-----▄--▄---/ ! ▄ 74╠╙138 74╠╙138 ▄ \----------▄--/ \-------------/ ╞IGURE 6: ╘HE SCHEMATICS DIAGRAM FOR THE ══╒ EXPANSION LOGIC. ═╧╙ 8722 ══╒ +--------------+ ╓DD ▄ 1 \__/ 48 ▄ 40/-80 -╥┼╙┼╘ ▄ 2 47 ▄ ═╙3 ╘┴15 ▄ 3 46 ▄ -┼╪╥╧═ ╘┴14 ▄ 4 45 ▄ -╟┴═┼ ╘┴13 ▄ 5 44 ▄ -╞╙─╔╥ ╘┴12 ▄ 6 43 ▄ -┌80┼╬ ╘┴11 ▄ 7 42 ▄ ─7 ╘┴10 ▄ 8 41 ▄ ─6 ╘┴9 ▄ 9 40 ▄ ─5 ╘┴8 ▄ 10 39 ▄ ─4 -├┴╙1 ▄ 11 38 ▄ ─3 -├┴╙0 ▄ 12 37 ▄ ─2 ═╙2 ▄ 13 36 ▄ ─1 ═╙1 ▄ 14 35 ▄ ─0 ═╙0 ▄ 15 34 ▄ ╓SS ┴┼├ ▄ 16 33 ▄ 0IN ═╒╪ ▄ 17 32 ▄ ╥/-╫ ┴0 ▄ 18 31 ▄ ┴15 ┴1 ▄ 19 30 ▄ ┴14 ┴2 ▄ 20 29 ▄ ┴13 ┴3 ▄ 21 28 ▄ ┴12 ┴5/┴4 ▄ 22 27 ▄ ┴11 ┴7/┴6 ▄ 23 26 ▄ ┴10 ┴8 ▄ 24 25 ▄ ┴9 +--------------+ ╞IGURE 7: ╘HE ═╧╙ 8722 ═EMORY ═ANAGEMENT ╒NIT +----------------------------------------------+ ▄ ┼LECTRONIC ├OMPONENTS ▄ +------------+---------------------------------+ ▄ ╙YMBOL ▄ ─ESCRIPTION ▄ +------------+---------------------------------+ ▄ ╔├5 ▄ ═╧╙ 8722 ▄ ▄ ╔├6 ▄ 74╠╙138 ▄ ▄ ╔├7 ▄ 74╞00 ▄ ▄ ╔├8 ▄ 4066 ▄ ▄ ╔├9 ▄ 74╞32 ▄ ▄ ╔├10--╔├25 ▄ 80256 OR COMPATIBLE ▄ ▄ ╥3, ╥4 ▄ 68 OHM RESISTOR ▄ +------------+---------------------------------+ +----------------------------------------------+ ▄ ╧THER ╨ARTS ▄ +-----------+----------------------------------+ ▄ ╤UANTITY ▄ ╤UALITY ▄ +-----------+----------------------------------+ ▄ 1 PC ▄ 14-PIN SOCKET ▄ ▄ PLENTY OF ▄ CONNECTION WIRE ▄ +----------------------------------------------+ ╘ABLE 2. ╨ARTS LIST FOR THE ══╒ EXPANSION 74╠╙138 74╞00 4066 +--------+ +--------+ +--------+ ┴ ▄ 1 \/ 16▄ ╓DD ╔1 ▄ 1 \/ 14▄ ╓DD ┴1 ▄ 1 \/ 14▄ ╓DD ┬ ▄ 2 15▄ -┘0 ╩1 ▄ 2 13▄ ╔4 ┬1 ▄ 2 13▄ ┼1 ├ ▄ 3 14▄ -┘1 ╦1 ▄ 3 12▄ ╩4 ┬2 ▄ 3 12▄ ┼4 -╟3 ▄ 4 13▄ -┘2 ╔2 ▄ 4 11▄ ╦4 ┴2 ▄ 4 11▄ ┴4 -╟2 ▄ 5 12▄ -┘3 ╩2 ▄ 5 10▄ ╔3 ┼2 ▄ 5 10▄ ┬4 ╟1 ▄ 6 11▄ -┘4 ╦2 ▄ 6 9▄ ╩3 ┼3 ▄ 6 9▄ ┬3 -┘7 ▄ 7 10▄ -┘5 ╓SS ▄ 7 8▄ ╦3 ╓SS ▄ 7 8▄ ┴3 ╓SS ▄ 8 9▄ -┘6 +--------+ +--------+ +--------+ ╦N = ╬╧╘(╔N ┴╬─ ╩N) ╞IGURE 8. ╘HE LOGIC GLUE CHIPS 74╠╙138, 74╞00 AND 4066 2.4.1 ╥EALIZING THE PROCESSOR BUS INTERFACE ╞IRST BEND UP THE PINS 3--15, 35 AND 41 OF THE NEW 8722 ══╒ CHIP (╔├5) ASIDE. ┬END THE REST OF THE PINS SLIGHTLY TO THE OPPOSITE DIRECTION SO THAT THEY ARE PERPENDICULAR TO THE SURFACE OF THE CHIP. ╔F THE OLD ══╒ IS IN SOCKET, POP IT OFF. ╨USH THE NEW ══╒ ON THE BACK OF THE OLD ONE. ╙OLDER THE PINS TOGETHER, BUT BE CAREFUL NOT TO HEAT THE CHIPS TOO MUCH. ╬OW YOU CAN INSERT THE ══╒ PAIR TO THE SOCKET. ┴FTER WIRING THOSE PINS, YOU MUST BUILD THE LOGIC FOR INTERFACING THE SYSTEM DATA BUS TO THE NEW ══╒. ╠OCATE ╒3, 74╠╙138, IT IS TO THE LEFT OF THE PROCESSOR (╒6, 8502). ╘AKE ANOTHER 74╠╙138 (╔├6) AND BEND ITS PINS 1--3, 7 AND 9--15 ASIDE. ╙OLDER THE REST OF THE PINS TO CORRESPONDING ╒3 PINS. ├ONNECT THE PINS 1--3 OF THE NEW CHIP TO THE PROCESSOR'S PINS 7--9, RESPECTIVELY. ┬EFORE CONNECTING THE ╔├6'S REQUIRED OUTPUTS, YOU HAVE TO SOLDER ╔├7 AND ╔├8 ON THE BOARD. ╞IRST LOCATE ╒20, THE 4066 TO THE RIGHT OF THE ╥╞ SHIELD COVERING THE VIDEO CIRCUITRY. ╟ET A NEW 4066 (╔├8) AND BEND ITS PINS 1, 4--6 AND 8--13 TO THE SIDE AND SOLDER THE FOUR DOWNWARDS POINTING PINS TO THE ╒20. ╫IRE THE PINS 1 AND 4 TOGETHER AND CONNECT THEM TO THE NEW ══╒'S PIN 35, THE DATA LEAD ─0. ╙IMILARLY, CONNECT THE PINS 9 AND 10 TOGETHER, AND SOLDER THEM TO THE TOPMOST ══╒'S PIN 41, ─6. ╙OLDER THE ╔├8'S PINS 8 AND 11 TO THE SYSTEM DATA BUS LINES ─6 AND ─7, RESPECTIVELY. ╘HEY ARE AVAILABLE IN THE ORIGINAL ══╒'S PINS 41 AND 42. ╔T IS A GOOD IDEA TO LOCATE THROUGH-PUT PLACES FOR THESE SIGNALS AND SOLDER THE WIRES THERE. ╘HE NEXT CHIP TO BE MOUNTED IS ╔├7, THE 74╞00. ┴ GOOD PLACE FOR IT IS THE 14-PIN CHIP NEXT TO THE ╔├6 AND THE PROCESSOR. ╠EAVE ONLY THE PINS 7 AND 14 DOWN AND SOLDER THEM TO THE CHIP ON THE MOTHERBOARD. ├ONNECT THE PINS 13 AND 12 FROM THE 74╞00 TO THE ╔├6'S PINS 15 AND 13, AND CONNECT THE 74╞00'S PINS 11 AND 10 TOGETHER. ╘HEN SOLDER THE PIN 9 TO THE 8502'S PIN 10, ┴3. ╙OLDER THE ╔├7'S PIN 8 TO ITS OWN PINS 4 AND 5, AND CONNECT IT ALSO TO THE ╔├8 4066'S PIN 13. ├ONNECT THE ╔├7'S PIN 6 TO THE ╔├8'S PIN 5. ╠EAD THE 74╠╙138'S PIN 10 TO THE 4066'S PIN 6 AND TO THE 74╞00'S PINS 1 AND 2. ╠EAD THE 74╞00'S PIN 3 TO THE 4066'S PIN 12. ┴FTER ALL THESE PIGGY-BACKINGS, IT IS WISE TO CHECK IF THE COMPUTER POWERS UP ANY MORE. ╔F NOT, CHECK THE SOLDERINGS. ╫HEN ╔ BUILT THIS SECOND VERSION OF THE ══╒ EXPANSION, ╔ SWAPPED THE 4066 PINS 9 AND 10 BY MISTAKE, WHICH RESULTED IN A MISERABLY BLACK SCREEN EACH TIME ╔ DESPERATELY TRIED TO POWER THE COMPUTER UP. 2.4.2 ┴DDING THE NEW MEMORY BANKING SIGNALS ╔F THE FIRST STAGE SUCCEEDED, YOU CAN BUILD THE NEW LOGIC FOR DERIVING THE -├┴╙ SIGNALS FOR THE TWO NEW ╥┴═ BANKS. ╠OCATE ╒9 (74╞32) AND LIFT IT ON A SOCKET, IF IT WAS DIRECTLY SOLDERED TO THE SYSTEM BOARD. ╔F THE COMPUTER WORKS AFTER THIS OPERATION, YOU CAN CONTINUE WITH THE PIGGY- BACKING. ╘AKE A NEW 74╞32 (╔├9) AND BEND ITS ALL PINS EXCEPT 7, 9, 12 AND 14 TO THE SIDE. ┬END THE PINS 8 AND 11 OF THE OLD 74╞32 UP, SO THAT THEY CAN BE CONNECTED TO THE ╔├9'S PINS 9 AND 12, RESPECTIVELY. ├ONNECT THE PINS 7 AND 14, TOO. ╙OLDER A SHORT LENGTH OF STIFF UNI-STRAND WIRE TO THE NEW 74╞32'S PINS 8 AND 11, IN ORDER THAT THESE PINS REACH THE SOCKET ON THE MOTHERBOARD. ├ONNECT THE PIN 12 OF THE NEW ══╒ TO THE ╔├9'S PINS 13 AND 10. ╬OW THE COMPUTER SHOULD WORK JUST AS EARLIER, EXCEPT THAT WHEN YOU TRY TO ACCESS THE BANKS 2 OR 3, THE PROCESSOR WILL READ RANDOMLY CHANGING GARBAGE. ┘OU CAN VERIFY THIS BY MOVING THE CURSOR TO THE TOP LEFT-HAND CORNER OF THE SCREEN AND TYPING ▐▐═ 20400'' OR ▐▐═ 30400'' IN THE MACHINE LANGUAGE MONITOR A COUPLE OF TIMES. ╘O GENERATE THE SIGNALS -╥┴═├┴╙2 AND -╥┴═├┴╙3, CONNECT THE TOPMOST ══╒'S PIN 11 TO THE ╔├9'S PINS 1 AND 4, AND SOLDER THE NEW 74╞00'S PINS 2 AND 12 AS WELL AS THE PINS 5 AND 9 TOGETHER. ╘HEN MOUNT ╥3 AND ╥4, THE 68 OHM RESISTORS TO THE NEW 74╞00'S PINS 6 AND 3. ╧N THEIR FREE ENDS WILL BE THE -╥┴═├┴╙2 AND -╥┴═├┴╙3 SIGNALS, RESPECTIVELY. 2.4.3 ╙OLDERING THE MEMORY CHIPS ┴FTER ENSURING THAT THE COMPUTER WORKS, YOU CAN PREPARE FOR THE FINAL STEP. ╘AKE THE SIXTEEN MEMORY CHIPS (4164'S OR SIMILAR IF YOU ARE AIMING TO THE 256 K┬ MEMORY EXPANSION; 41256'S OR SIMILAR FOR THE 1024 K┬ EXPANSION) AND BEND THEIR PINS 15 (-├┴╙) UP. ╙OLDER THE REMAINING PINS ON TOP OF THE SIXTEEN MEMORY CHIPS ON THE MOTHERBOARD. ╘HEN COMBINE THE -├┴╙ SIGNALS OF THE EIGHT NEW MEMORY CHIPS AT THE FRONT EDGE OF THE SYSTEM BOARD AND CONNECT THEM TO ╥3 OR ╥4. ╙IMILARLY, CONNECT THE PINS 15 OF THE REMAINING MEMORY CHIPS AND WIRE THEM TO THE REMAINING 68 OHM RESISTOR. ╨OWER THE COMPUTER UP AGAIN AND PRAY UNTIL IT WORKS. ╔F YOU CAN ACCESS THE BANKS 2 AND 3 AS EXPECTED, CONGRATULATIONS! ╫HEN RE-ASSEMBLING THE CHASSIS, BE VERY CAREFUL WITH THE ╥╞ SHIELD. ┼SPECIALLY MEASURE THAT THE -├┴╙ SIGNALS FOR THE NEW MEMORY BANKS HAVE NO CONTACT WITH THE SHIELD. 3 ╒SING THE EXPANSION 3.1 ╘HE OPERATION OF THE BLOCK SWITCHER ╘HERE ARE FOUR NEW MICRO CHIPS IN THE ╨╔┴ EXPANSION. ╘HE MOST IMPORTANT OF THEM IS THE ╨╔┴ CHIP ═├ 6821, WHICH HOLDS THE VALUES OF THE BLOCK SELECTIONS. ╘HE ╨╔┴ HAS TWO 8-BIT PORTS SET UP IN THE ADDRESSES 57280 AND 57282. ╘HE UPPER AND LOWER FOUR BITS (NYBBLES) OF EACH PORT DETERMINE WHICH 16 K┬ BLOCK IS MAPPED TO EACH 16 K┬ SEGMENT OF THE PROCESSOR'S ADDRESS SPACE. ╔├2 AND ╔├3 PARTICIPATE IN FORMING THE MEMORY BLOCK CONTROL SIGNALS. ╘HERE IS A CHIP EQUIVALENT TO THE ╨╔┴ EVEN IN ├OMMODORE'S OWN 6500 SERIES, BUT IT IS NOT SUITABLE FOR THIS CONNECTION, AS IT IS NOT ╘╘╠ COMPATIBLE. ╘HE 6821 FROM ═OTOROLA 6800 SERIES, WHICH CONTAINS ALSO PROCESSORS REMINDING THOSE IN THE ├╙╟ (├OMMODORE ╙EMICONDUCTOR ╟ROUP; FORMER ═OSTEK OR ═╧╙ ╘ECHNOLOGIES) 6500 AND 8500 SERIES, IS BUS