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C/C++ Source or Header  |  1997-05-06  |  9KB  |  196 lines
  1. #include "mtypes.h"
  2.  
  3. #define OCR1    0x20            /* 8259-1 Operation control register */
  4. #define IMR1    0x21            /* 8259-1 Mask register */
  5.  
  6. #define OCR2    0xA0            /* 8259-2 Operation control register */
  7. #define IMR2    0xA1            /* 8259-2 Mask register */
  8.  
  9. #define MAKE_MSW(x)     ((long)((long)(x)) << 16)
  10. #define LSW(x)          ((unsigned int)(x))
  11. #define MSW(x)          ((unsigned int)(((long)x)>>16))
  12. #define MSB(x)          (unsigned char)((unsigned int)(x)>>8)
  13. #define LSB(x)          ((unsigned char)(x))
  14.  
  15. #define ADDR_HIGH(x) ((unsigned int)((unsigned int)((x>>7L)&0x1fffL)))
  16. #define ADDR_LOW(x)  ((unsigned int)((unsigned int)((x&0x7fL)<<9L)))
  17.  
  18. #define JOYSTICK_TIMER  (GUS_PORT+0x201)                /* 201 */
  19. #define JOYSTICK_DATA   (GUS_PORT+0x201)                /* 201 */
  20.  
  21. #define GF1_MIDI_CTRL   (GUS_PORT+0x100)                /* 3X0 */
  22. #define GF1_MIDI_DATA   (GUS_PORT+0x101)                /* 3X1 */
  23.  
  24. #define GF1_PAGE        (GUS_PORT+0x102)                /* 3X2 */
  25. #define GF1_REG_SELECT  (GUS_PORT+0x103)                /* 3X3 */
  26. #define GF1_VOICE_SELECT (GUS_PORT+0x102)               /* 3X3 */
  27. #define GF1_DATA_LOW    (GUS_PORT+0x104)                /* 3X4 */
  28. #define GF1_DATA_HI     (GUS_PORT+0x105)                /* 3X5 */
  29. #define GF1_IRQ_STAT    (GUS_PORT+0x006)                /* 2X6 */
  30. #define GF1_DRAM        (GUS_PORT+0x107)                /* 3X7 */
  31.  
  32. #define GF1_MIX_CTRL    (GUS_PORT+0x000)                /* 2X0 */
  33. #define GF1_TIMER_CTRL  (GUS_PORT+0x008)                /* 2X8 */
  34. #define GF1_TIMER_DATA  (GUS_PORT+0x009)                /* 2X9 */
  35. #define GF1_IRQ_CTRL    (GUS_PORT+0x00B)                /* 2XB */
  36.  
  37. #define CLOCK_RATE              9878400L
  38.  
  39. #define ENABLE_LINE             0x01
  40. #define ENABLE_DAC              0x02
  41. #define ENABLE_MIC              0x04
  42.  
  43. #define CNTRL_8259              0x21
  44. #define OCR_8259                0x20
  45. #define EOI                     0x20
  46. #define REARM3                  0x2F3
  47. #define REARM5                  0x2F5
  48.  
  49. #define CNTRL_M_8259            0x21
  50. #define CNTRL_M2_8259              0xA1
  51. #define OCR_2_8259              0xA0
  52.  
  53. #define DMA_CONTROL             0x41
  54. #define SET_DMA_ADDRESS         0x42
  55. #define SET_DRAM_LOW            0x43
  56. #define SET_DRAM_HIGH           0x44
  57.  
  58. #define TIMER_CONTROL           0x45
  59. #define TIMER1                  0x46
  60. #define TIMER2                  0x47
  61.  
  62. #define SET_SAMPLE_RATE         0x48
  63. #define SAMPLE_CONTROL          0x49
  64.  
  65. #define SET_JOYSTICK            0x4B
  66. #define MASTER_RESET            0x4C
  67.  
  68. #define SET_CONTROL                     0x00
  69. #define SET_FREQUENCY           0x01
  70. #define SET_START_HIGH          0x02
  71. #define SET_START_LOW           0x03
  72. #define SET_END_HIGH            0x04
  73. #define SET_END_LOW                     0x05
  74. #define SET_VOLUME_RATE         0x06
  75. #define SET_VOLUME_START        0x07
  76. #define SET_VOLUME_END          0x08
  77. #define SET_VOLUME                      0x09
  78. #define SET_ACC_HIGH            0x0a
  79. #define SET_ACC_LOW                     0x0b
  80. #define SET_BALANCE                     0x0c
  81. #define SET_VOLUME_CONTROL      0x0d
  82. #define SET_VOICES                      0x0e
  83.  
  84. #define GET_CONTROL                     0x80
  85. #define GET_FREQUENCY           0x81
  86. #define GET_START_HIGH          0x82
  87. #define GET_START_LOW           0x83
  88. #define GET_END_HIGH            0x84
  89. #define GET_END_LOW                     0x85
  90. #define GET_VOLUME_RATE         0x86
  91. #define GET_VOLUME_START        0x87
  92. #define GET_VOLUME_END          0x88
  93. #define GET_VOLUME                      0x89
  94. #define GET_ACC_HIGH            0x8a
  95. #define GET_ACC_LOW                     0x8b
  96. #define GET_BALANCE                     0x8c
  97. #define GET_VOLUME_CONTROL      0x8d
  98. #define GET_VOICES                      0x8e
  99. #define GET_IRQV                        0x8f
  100.  
  101. #define MIDI_RESET      0x03
  102. #define MIDI_ENABLE_XMIT        0x20
  103. #define MIDI_ENABLE_RCV         0x80
  104.  
  105. #define MIDI_RCV_FULL           0x01
  106. #define MIDI_XMIT_EMPTY         0x02
  107. #define MIDI_FRAME_ERR          0x10
  108. #define MIDI_OVERRUN            0x20
  109. #define MIDI_IRQ_PEND           0x80
  110.  
  111. #define JOY_POSITION            0x0f
  112. #define JOY_BUTTONS                     0xf0
  113.  
  114. #define MIDI_TX_IRQ                     0x01            /* pending MIDI xmit IRQ */
  115. #define MIDI_RX_IRQ                     0x02            /* pending MIDI recv IRQ */
  116. #define GF1_TIMER1_IRQ          0x04            /* general purpose timer */
  117. #define GF1_TIMER2_IRQ          0x08            /* general purpose timer */
  118. #define WAVETABLE_IRQ           0x20            /* pending wavetable IRQ */
  119. #define ENVELOPE_IRQ            0x40            /* pending volume envelope IRQ */
  120. #define DMA_TC_IRQ                      0x80            /* pending dma tc IRQ */
  121.  
  122. #define ENABLE_LINE_IN          0x01            /* 0=enable */
  123. #define ENABLE_OUTPUT           0x02            /* 0=enable */
  124. #define ENABLE_MIC_IN           0x04            /* 1=enable */
  125. #define ENABLE_GF1_IRQ          0x08            /* 1=enable */
  126. #define GF122                           0x10            /* ?? */
  127. #define ENABLE_MIDI_LOOP        0x20            /* 1=enable loop back */
  128. #define SELECT_GF1_REG          0x40            /* 0=irq latches */
  129.                                         /* 1=dma latches */
  130. #define DMA_ENABLE                      0x01
  131. #define DMA_READ                        0x02            /* 1=read,0=write */
  132. #define DMA_WIDTH_16            0x04            /* 1=16 bit,0=8 bit (dma chan width)*/
  133. #define DMA_RATE                        0x18            /* 00=fast, 11=slow */
  134. #define DMA_IRQ_ENABLE          0x20            /* 1=enable */
  135. #define DMA_IRQ_PENDING         0x40            /* read */
  136. #define DMA_DATA_16                     0x40            /* write (data width) */
  137. #define DMA_TWOS_COMP           0x80            /* 1=do twos comp */
  138.  
  139. #define DMA_R0          0x00            /* Fastest DMA xfer (~650khz) */
  140. #define DMA_R1          0x08            /* fastest / 2 */
  141. #define DMA_R2          0x10            /* fastest / 4 */
  142. #define DMA_R3          0x18            /* Slowest DMA xfer (fastest / 8) */
  143.  
  144. #define ENABLE_ADC                      0x01
  145. #define ADC_MODE                        0x02            /* 0=mono, 1=stereo */
  146. #define ADC_DMA_WIDTH           0x04            /* 0=8 bit, 1=16 bit */
  147. #define ADC_IRQ_ENABLE          0x20            /* 1=enable */
  148. #define ADC_IRQ_PENDING         0x40            /* 1=irq pending */
  149. #define ADC_TWOS_COMP           0x80            /* 1=do twos comp */
  150.  
  151. #define GF1_MASTER_RESET        0x01            /* 0=hold in reset */
  152. #define GF1_OUTPUT_ENABLE       0x02            /* enable output */
  153. #define GF1_MASTER_IRQ          0x04            /* master IRQ enable */
  154.  
  155. #define VOICE_STOPPED           0x01            /* voice has stopped */
  156. #define STOP_VOICE                      0x02            /* stop voice */
  157. #define VC_DATA_TYPE            0x04            /* 0=8 bit,1=16 bit */
  158. #define VC_LOOP_ENABLE          0x08            /* 1=enable */
  159. #define VC_BI_LOOP                      0x10            /* 1=bi directional looping */
  160. #define VC_WAVE_IRQ                     0x20            /* 1=enable voice's wave irq */
  161. #define VC_DIRECT                       0x40            /* 0=increasing,1=decreasing */
  162. #define VC_IRQ_PENDING          0x80            /* 1=wavetable irq pending */
  163.  
  164. #define VL_RATE_MANTISSA                0x3f
  165. #define VL_RATE_RANGE                   0xC0
  166.  
  167. #define VL_START_MANT                   0x0F
  168. #define VL_START_EXP                    0xF0
  169.  
  170. #define VL_END_MANT                             0x0F
  171. #define VL_END_EXP                              0xF0
  172.  
  173. #define VOLUME_STOPPED          0x01            /* volume has stopped */
  174. #define STOP_VOLUME                     0x02            /* stop volume */
  175. #define VC_ROLLOVER                     0x04            /* Roll PAST end & gen IRQ */
  176. #define VL_LOOP_ENABLE          0x08            /* 1=enable */
  177. #define VL_BI_LOOP                      0x10            /* 1=bi directional looping */
  178. #define VL_WAVE_IRQ                     0x20            /* 1=enable voice's wave irq */
  179. #define VL_DIRECT                       0x40            /* 0=increasing,1=decreasing */
  180. #define VL_IRQ_PENDING          0x80            /* 1=wavetable irq pending */
  181.  
  182. #define VOICE_VOLUME_IRQ        0x40            /* individual voice irq bit */
  183. #define VOICE_WAVE_IRQ          0x80            /* individual waveform irq bit */
  184.  
  185. #define UltraSelect(x) outportb(GF1_REG_SELECT,GUS_SELECT=x)
  186. #define MAKE_MS_SWORD( x )       ((unsigned long)((unsigned long)(x)) << 16)
  187.  
  188. #define MIXER_ADDRESS         (sb_port+0x4)
  189. #define MIXER_DATA            (sb_port+0x5)
  190. #define DSP_RESET            (sb_port+0x6)
  191. #define DSP_READ_DATA        (sb_port+0xa)
  192. #define DSP_WRITE_DATA        (sb_port+0xc)
  193. #define DSP_WRITE_STATUS    (sb_port+0xc)
  194. #define DSP_DATA_AVAIL        (sb_port+0xe)
  195.  
  196.