home
***
CD-ROM
|
disk
|
FTP
|
other
***
search
/
High Voltage Shareware
/
high1.zip
/
high1
/
DIR3
/
LENA.ZIP
/
LE_APX_D.TXT
< prev
next >
Wrap
Text File
|
1994-02-04
|
6KB
|
133 lines
.
GENERAL HISTORY
===============
The genesis of all circuit analysis programs is IBM's ECAP, born in
the mid-sixties. Electronic Circuit Analysis Program was the first
wide-use program to incorporate a system of component entry, selection
of output, choice of either frequency-domain or time-domain analysis.
A circuit designer could finally see the _entire_ circuit's response
before building the breadboard. ECAP was comprehensive but it was
slow. Born before the advent of low-cost mass storage devices, a
circuit designer had to learn the "language" of describing a circuit,
"input" the circuit to special forms so that they could be translated
by others into punched cards. The designer usually had to wait
overnight until the job was completed (done in the old "batch" mode),
pick up a thick stack of fan-fold paper the next day, hope no errors
were made in either circuit description or the card punching, then
study the many sheets of B-size output to see the circuit response.
Any abnormalities or unexpected results required another cycle to
correct and collect. Design analysis took literal days to complete.
For many tasks, it was easier to go back to pencil and paper, do the
approximations of critical circuit parts, assemble and check out a
breadboard.
By 1969, the Missle and Surface Radar Division of RCA Corporation had
developed LECAP (Linear Electronic Circuit Analysis Program), doing
the frequency-domain tasks similar to ECAP. The difference was that
LECAP was smaller, faster, and could be used in an interactive mode on
the corporation's time-sharing computer network. No longer was it
required to wait until the next day for an analysis run...the designer
could see the response within a few seconds, try changes, in effect do
"breadboard" work at the terminal before actual building of the
prototype, all within half a working day.
At the end of the sixties, several other programs made their debut.
TRAC and SCEPTRE, development funded by the U.S. government, increased
time-domain versatility and made an attempt towards an input-output
language closer to the circuit designer. Finally, SPICE (Simulation
Program with Integrated Circuit Emphasis) was written at Berkeley and
survives in various forms to today as the standard transient response
analyzer. Most such non-microwave-region analysis programs were
concerned with time-domain analyses, understandable due to increasing
design work with digital electronics. Analog circuit designers tended
to ignore frequency-domain analyses in favor of using "formula"sub-
circuits and data...or doing "cut and try" analyses on the bench with
breadboards.
The author's experience with computer-aided design began in 1972 at
RCA Electromagnetic and Aviation Systems Division. Having some parts
procurement problems with a special delay line, some almost-
specification inductors were available, but manual calculation of
response would take too long. A colleague showed how to use LECAP
and, by the end of the day, it was determined that the substitutes
would work. They worked so well that a quick breadboard pulse
response photo _duplicated_ the analysis print-out. That was the
final selling-point on CAD/CAE for the author.
LENA Appendix D - Page 1 of 2
.
Since the birth of personal computing in the late seventies, a few
shareware electronic circuit analysis programs have appeared (see
Appendix E). There are working demo program sets from three different
commercial time-domain analysis specialists. The LINEA Program Set,
released in August, 1993, was designed to work in the frequency
domain, to fit as wide a variety of peripherals as possible. The LENA
Program Set is a smaller, compatible version of LINEA, possibly the
smallest electronic network computer-aided engineering program
available having multiple single branches and macromodels.
LENA incorporates color text for various program functions, something
not considered important in the original release of LINEA. As of this
writing, LINEA (Linear INteractive Electronic Analysis) is being
modified to include color text and VGA/SVGA on-screen graphing. LENA
has improved analysis time over LINEA and can accomodate 56-node
circuits; LINEA will follow those improvements in later releases.
FIONA (Frequency-domain Interactive Optimizing Network Analysis) will
be an outgrowth of LINEA. It will have the capability to automatically
"tune" (optimize) up to ten component values to fit a specified response.
FIONA will be compatible with LINEA and LENA and is expected to be
finished in the summer of 1994.
LENA was originally targetted for release in early December, 1993. A
hard disk crash in October, 1993, put a two-week pause in the cycle.
The Northridge, California, earthquake of 17 January 1994 put another
pause in final testing and release. While the earthquake (10 miles
from the author's home) did no real damage, the continuing aftershocks
put nerves on edge and caused some mistakes in final text file editing.
While the LENA version date is 31 January 1994, a few files will have
a 4 February 1994 date, a result of repairing mistakes caused by
jangled nerves. Earthquakes are not conducive to stable programming!
Whichever version, LENA, LINEA, or FIONA, computer-aided engineering
(CAE) can save the circuit designer and hobbyist from hours of
repetitive breadboard work.
Use and enjoy. :)
Leonard H. Anderson
February 1994
Internet addresses: len.anderson@ledge.com
len.anderson@mogur.com
LINEA is copyright 1993, LENA and FIONA are copyright 1994, all three
by Leonard H. Anderson.
LENA Appendix D - Page 2 of 2
.