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4012.chp
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1979-12-31
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304b
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46 lines
09/27/87
CMOS dual 4-input NAND gate.
14
1y
1a
1b
1c
1d
NC
Vss (-)
NC
2a
2b
2c
2d
2y
Vdd (+)
1
done
14
output for #1.
input 1a
input 1b
input 1c
input 1d
NO CONNECTION
ground
NO CONNECTION
input 2a
input 2b
input 2c
input 2d
output for #2
Vdd (+)