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Text File  |  1996-05-28  |  117KB  |  3,415 lines
  1. #
  2. #    $Id: stl00018.da@ 2.11 1996/05/14 01:54:18 JIMK Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00018.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 220Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Draweng32=s3x6832.drw
  14. Dac=ibm525.dac
  15. Cursor=ibm525.cur
  16. PixClk=ibm525.clk
  17. Draweng=s3x68.drw
  18.  
  19. [BoardInfo]
  20. wMinimumFormatBltWidth16bpp=8
  21. wMinimumFormatBltWidth32bpp=8
  22. bPixelFormatter=1
  23. bViewports=1
  24. bNewMMIO=1
  25. bTwoPtLine=1
  26. ValidateBAR=YES
  27. SwapVLA30A25=YES
  28.  
  29. [Desktops]
  30. 2048,768,8
  31. 1600,1200,8
  32. 1280,1024,8
  33. 1152,864,16
  34. 1152,864,8
  35. 1024,1536,8
  36. 1024,768,16
  37. 1024,768,8
  38. 800,600,32
  39. 800,600,24
  40. 800,600,16
  41. 800,600,8
  42. 640,480,32
  43. 640,480,24
  44. 640,480,16
  45. 640,480,8
  46.  
  47. [Viewports]
  48. 1600,1200,8,95,76
  49. 1600,1200,8,94,75
  50. 1600,1200,8,82,66
  51. 1600,1200,8,75,60
  52. 1280,1024,8,95,90
  53. 1280,1024,8,79,75
  54. 1280,1024,8,76,72
  55. 1280,1024,8,74,70
  56. 1280,1024,8,64,60
  57. 1152,864,16,82,90
  58. 1152,864,16,71,75
  59. 1152,864,16,64,70
  60. 1152,864,16,56,60
  61. 1152,864,8,82,90
  62. 1152,864,8,71,75
  63. 1152,864,8,64,70
  64. 1152,864,8,56,60
  65. 1024,768,16,96,120
  66. 1024,768,16,81,100
  67. 1024,768,16,64,80
  68. 1024,768,16,60,75
  69. 1024,768,16,58,72
  70. 1024,768,16,56,70
  71. 1024,768,16,48,60
  72. 1024,768,8,96,120
  73. 1024,768,8,81,100
  74. 1024,768,8,64,80
  75. 1024,768,8,60,75
  76. 1024,768,8,58,72
  77. 1024,768,8,56,70
  78. 1024,768,8,48,60
  79. 800,600,32,75,120
  80. 800,600,32,64,100
  81. 800,600,32,56,90
  82. 800,600,32,46,75
  83. 800,600,32,48,72
  84. 800,600,32,37,60
  85. 800,600,32,35,56
  86. 800,600,24,75,120
  87. 800,600,24,64,100
  88. 800,600,24,56,90
  89. 800,600,24,46,75
  90. 800,600,24,48,72
  91. 800,600,24,37,60
  92. 800,600,24,35,56
  93. 800,600,16,75,120
  94. 800,600,16,64,100
  95. 800,600,16,56,90
  96. 800,600,16,46,75
  97. 800,600,16,48,72
  98. 800,600,16,37,60
  99. 800,600,16,35,56
  100. 800,600,8,75,120
  101. 800,600,8,64,100
  102. 800,600,8,56,90
  103. 800,600,8,46,75
  104. 800,600,8,48,72
  105. 800,600,8,37,60
  106. 800,600,8,35,56
  107. 640,480,32,64,120
  108. 640,480,32,52,100
  109. 640,480,32,48,90
  110. 640,480,32,37,75
  111. 640,480,32,37,72
  112. 640,480,32,31,60
  113. 640,480,24,64,120
  114. 640,480,24,52,100
  115. 640,480,24,48,90
  116. 640,480,24,37,75
  117. 640,480,24,37,72
  118. 640,480,24,31,60
  119. 640,480,16,64,120
  120. 640,480,16,52,100
  121. 640,480,16,48,90
  122. 640,480,16,37,75
  123. 640,480,16,37,72
  124. 640,480,16,31,60
  125. 640,480,8,64,120
  126. 640,480,8,52,100
  127. 640,480,8,48,90
  128. 640,480,8,37,75
  129. 640,480,8,37,72
  130. 640,480,8,31,60
  131.  
  132. [TextMode]
  133. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  134. SHELL, I10, 0x0003,  0x0000
  135. CRT, RUN, REG_LOCK_1, 0x48
  136. CRT, RUN, REG_LOCK_2, 0xA0
  137.  
  138. [GraphicsEnable]
  139. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  140. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  141.  
  142. [GraphicsDisable]
  143. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  144. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  145.  
  146. [2048,768,8]
  147. # Setting Line Pitch
  148. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  149. CRT,RUN,EXT_MODE,0x00
  150. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  151. # Setting Engine Pitch
  152. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  153. CRT,RUN,MEM_CONFIG,0x8f
  154. # Setting Basic Mode Registers.The registers
  155. # below are neither Desktop or Viewport Regs
  156. # Unlock Sequencer
  157. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  158. # Dump Sequencer Registers
  159. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  160. # Dump Graphics Controller Registers
  161. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  162. # Dump Attribute Controller Registers
  163. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  164. # Lock Sequencer
  165. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  166. DAC_IDR, RUN, DAC_OPERATION, 0x02
  167. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  168. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  169. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  170. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  171. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  172. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  173. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  174. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  175. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  176.  
  177. [1024,1536,8]
  178. # Setting Line Pitch
  179. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  180. CRT,RUN,EXT_MODE,0x00
  181. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  182. # Setting Engine Pitch
  183. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  184. CRT,RUN,MEM_CONFIG,0x09
  185. # Setting Basic Mode Registers.The registers
  186. # below are neither Desktop or Viewport Regs
  187. # Unlock Sequencer
  188. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  189. # Dump Sequencer Registers
  190. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  191. # Dump Graphics Controller Registers
  192. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  193. # Dump Attribute Controller Registers
  194. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  195. # Lock Sequencer
  196. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  197. DAC_IDR, RUN, DAC_OPERATION, 0x02
  198. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  199. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  200. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  201. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  202. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  203. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  204. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  205. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  206. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  207.  
  208. [1600,1200,8]
  209. # Setting Line Pitch
  210. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  211. CRT,RUN,EXT_MODE,0x00
  212. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  213. # Setting Engine Pitch
  214. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  215. CRT,RUN,MEM_CONFIG,0x8b
  216. # Setting Basic Mode Registers.The registers
  217. # below are neither Desktop or Viewport Regs
  218. # Unlock Sequencer
  219. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  220. # Dump Sequencer Registers
  221. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  222. # Dump Graphics Controller Registers
  223. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  224. # Dump Attribute Controller Registers
  225. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  226. # Lock Sequencer
  227. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  228. DAC_IDR, RUN, DAC_OPERATION, 0x02
  229. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  230. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  231. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  232. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  233. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  234. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  235. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  236. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  237. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  238.  
  239. [1280,1024,8]
  240. # Setting Line Pitch
  241. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  242. CRT,RUN,EXT_MODE,0x00
  243. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  244. # Setting Engine Pitch
  245. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  246. CRT,RUN,MEM_CONFIG,0x0b
  247. # Setting Basic Mode Registers.The registers
  248. # below are neither Desktop or Viewport Regs
  249. # Unlock Sequencer
  250. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  251. # Dump Sequencer Registers
  252. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  253. # Dump Graphics Controller Registers
  254. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  255. # Dump Attribute Controller Registers
  256. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  257. # Lock Sequencer
  258. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  259. DAC_IDR, RUN, DAC_OPERATION, 0x02
  260. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  261. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  262. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  263. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  264. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  265. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  266. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  267. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  268. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  269.  
  270. [1152,864,16]
  271. # Setting Line Pitch
  272. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  273. CRT,RUN,EXT_MODE,0x00
  274. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  275. # Setting Engine Pitch
  276. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  277. CRT,RUN,MEM_CONFIG,0x89
  278. # Setting Basic Mode Registers.The registers
  279. # below are neither Desktop or Viewport Regs
  280. # Unlock Sequencer
  281. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  282. # Dump Sequencer Registers
  283. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  284. # Dump Graphics Controller Registers
  285. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  286. # Dump Attribute Controller Registers
  287. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  288. # Lock Sequencer
  289. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  290. DAC_IDR, RUN, DAC_OPERATION, 0x02
  291. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  292. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  293. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  294. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  295. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  296. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  297. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  298. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  299. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  300.  
  301. [1152,864,8]
  302. # Setting Line Pitch
  303. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  304. CRT,RUN,EXT_MODE,0x00
  305. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  306. # Setting Engine Pitch
  307. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  308. CRT,RUN,MEM_CONFIG,0x89
  309. # Setting Basic Mode Registers.The registers
  310. # below are neither Desktop or Viewport Regs
  311. # Unlock Sequencer
  312. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  313. # Dump Sequencer Registers
  314. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  315. # Dump Graphics Controller Registers
  316. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  317. # Dump Attribute Controller Registers
  318. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  319. # Lock Sequencer
  320. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  321. DAC_IDR, RUN, DAC_OPERATION, 0x02
  322. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  323. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  324. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  325. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  326. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  327. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  328. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  329. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  330. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  331.  
  332. [1024,768,16]
  333. # Setting Line Pitch
  334. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  335. CRT,RUN,EXT_MODE,0x00
  336. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  337. # Setting Engine Pitch
  338. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  339. CRT,RUN,MEM_CONFIG,0x89
  340. # Setting Basic Mode Registers.The registers
  341. # below are neither Desktop or Viewport Regs
  342. # Unlock Sequencer
  343. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  344. # Dump Sequencer Registers
  345. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  346. # Dump Graphics Controller Registers
  347. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  348. # Dump Attribute Controller Registers
  349. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  350. # Lock Sequencer
  351. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  352. DAC_IDR, RUN, DAC_OPERATION, 0x02
  353. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  354. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  355. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  356. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  357. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  358. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  359. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  360. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  361. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  362.  
  363. [1024,768,8]
  364. # Setting Line Pitch
  365. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  366. CRT,RUN,EXT_MODE,0x00
  367. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  368. # Setting Engine Pitch
  369. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  370. CRT,RUN,MEM_CONFIG,0x09
  371. # Setting Basic Mode Registers.The registers
  372. # below are neither Desktop or Viewport Regs
  373. # Unlock Sequencer
  374. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  375. # Dump Sequencer Registers
  376. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  377. # Dump Graphics Controller Registers
  378. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  379. # Dump Attribute Controller Registers
  380. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  381. # Lock Sequencer
  382. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  383. DAC_IDR, RUN, DAC_OPERATION, 0x02
  384. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  385. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  386. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  387. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  388. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  389. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  390. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  391. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  392. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  393.  
  394. [800,600,32]
  395. # Setting Line Pitch
  396. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  397. CRT,RUN,EXT_MODE,0x00
  398. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  399. # Setting Engine Pitch
  400. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  401. CRT,RUN,MEM_CONFIG,0x89
  402. # Setting Basic Mode Registers.The registers
  403. # below are neither Desktop or Viewport Regs
  404. # Unlock Sequencer
  405. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  406. # Dump Sequencer Registers
  407. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  408. # Dump Graphics Controller Registers
  409. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  410. # Dump Attribute Controller Registers
  411. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  412. # Lock Sequencer
  413. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  414. DAC_IDR, RUN, DAC_OPERATION, 0x02
  415. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  416. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  417. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  418. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  419. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  420. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  421. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  422. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  423. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  424.  
  425. [800,600,24]
  426. # Setting Line Pitch
  427. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  428. CRT,RUN,EXT_MODE,0x00
  429. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  430. # Setting Engine Pitch
  431. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  432. CRT,RUN,MEM_CONFIG,0x8b
  433. # Setting Basic Mode Registers.The registers
  434. # below are neither Desktop or Viewport Regs
  435. # Unlock Sequencer
  436. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  437. # Dump Sequencer Registers
  438. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  439. # Dump Graphics Controller Registers
  440. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  441. # Dump Attribute Controller Registers
  442. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  443. # Lock Sequencer
  444. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  445. DAC_IDR, RUN, DAC_OPERATION, 0x02
  446. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  447. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  448. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  449. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  450. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  451. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  452. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  453. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  454. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  455.  
  456. [800,600,16]
  457. # Setting Line Pitch
  458. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  459. CRT,RUN,EXT_MODE,0x00
  460. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  461. # Setting Engine Pitch
  462. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  463. CRT,RUN,MEM_CONFIG,0x89
  464. # Setting Basic Mode Registers.The registers
  465. # below are neither Desktop or Viewport Regs
  466. # Unlock Sequencer
  467. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  468. # Dump Sequencer Registers
  469. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  470. # Dump Graphics Controller Registers
  471. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  472. # Dump Attribute Controller Registers
  473. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  474. # Lock Sequencer
  475. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  476. DAC_IDR, RUN, DAC_OPERATION, 0x02
  477. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  478. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  479. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  480. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  481. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  482. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  483. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  484. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  485. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  486.  
  487. [800,600,8]
  488. # Setting Line Pitch
  489. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  490. CRT,RUN,EXT_MODE,0x00
  491. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  492. # Setting Engine Pitch
  493. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  494. CRT,RUN,MEM_CONFIG,0x89
  495. # Setting Basic Mode Registers.The registers
  496. # below are neither Desktop or Viewport Regs
  497. # Unlock Sequencer
  498. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  499. # Dump Sequencer Registers
  500. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  501. # Dump Graphics Controller Registers
  502. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  503. # Dump Attribute Controller Registers
  504. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  505. # Lock Sequencer
  506. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  507. DAC_IDR, RUN, DAC_OPERATION, 0x02
  508. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  509. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  510. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  511. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  512. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  513. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  514. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  515. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  516. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  517.  
  518. [640,480,32]
  519. # Setting Line Pitch
  520. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  521. CRT,RUN,EXT_MODE,0x00
  522. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  523. # Setting Engine Pitch
  524. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  525. CRT,RUN,MEM_CONFIG,0x89
  526. # Setting Basic Mode Registers.The registers
  527. # below are neither Desktop or Viewport Regs
  528. # Unlock Sequencer
  529. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  530. # Dump Sequencer Registers
  531. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  532. # Dump Graphics Controller Registers
  533. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  534. # Dump Attribute Controller Registers
  535. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  536. # Lock Sequencer
  537. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  538. DAC_IDR, RUN, DAC_OPERATION, 0x02
  539. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  540. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  541. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  542. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  543. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  544. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  545. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  546. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  547. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  548.  
  549. [640,480,24]
  550. # Setting Line Pitch
  551. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  552. CRT,RUN,EXT_MODE,0x00
  553. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  554. # Setting Engine Pitch
  555. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  556. CRT,RUN,MEM_CONFIG,0x8b
  557. # Setting Basic Mode Registers.The registers
  558. # below are neither Desktop or Viewport Regs
  559. # Unlock Sequencer
  560. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  561. # Dump Sequencer Registers
  562. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  563. # Dump Graphics Controller Registers
  564. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  565. # Dump Attribute Controller Registers
  566. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  567. # Lock Sequencer
  568. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  569. DAC_IDR, RUN, DAC_OPERATION, 0x02
  570. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  571. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  572. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  573. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  574. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  575. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  576. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  577. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  578. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  579.  
  580. [640,480,16]
  581. # Setting Line Pitch
  582. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  583. CRT,RUN,EXT_MODE,0x00
  584. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  585. # Setting Engine Pitch
  586. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  587. CRT,RUN,MEM_CONFIG,0x89
  588. # Setting Basic Mode Registers.The registers
  589. # below are neither Desktop or Viewport Regs
  590. # Unlock Sequencer
  591. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  592. # Dump Sequencer Registers
  593. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  594. # Dump Graphics Controller Registers
  595. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  596. # Dump Attribute Controller Registers
  597. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  598. # Lock Sequencer
  599. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  600. DAC_IDR, RUN, DAC_OPERATION, 0x02
  601. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  602. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  603. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  604. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  605. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  606. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  607. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  608. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  609. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  610.  
  611. [640,480,8]
  612. # Setting Line Pitch
  613. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  614. CRT,RUN,EXT_MODE,0x00
  615. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  616. # Setting Engine Pitch
  617. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  618. CRT,RUN,MEM_CONFIG,0x89
  619. # Setting Basic Mode Registers.The registers
  620. # below are neither Desktop or Viewport Regs
  621. # Unlock Sequencer
  622. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  623. # Dump Sequencer Registers
  624. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  625. # Dump Graphics Controller Registers
  626. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  627. # Dump Attribute Controller Registers
  628. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  629. # Lock Sequencer
  630. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  631. DAC_IDR, RUN, DAC_OPERATION, 0x02
  632. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  633. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  634. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  635. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  636. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  637. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  638. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  639. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  640. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  641.  
  642. [1600,1200,8,95,76]
  643. # Unlock CRTC
  644. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  645. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  646. CRT,RUN,REG_LOCK_1,0x48,0xa5
  647. # Dump CRT Controller Registers
  648. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  649. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  650. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  651. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  652. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  653. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  654. CRT,RUN,MODE_CONTROL,0x02
  655. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  656. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  657. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  658. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  659. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  660. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  661. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  662. # Lock CRTC Reg 11 for compatibility
  663. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  664. # Dump ENG Register
  665. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  666. # Dump MISCOUT Register
  667. DIR,RUN,MISC_WRITE,0xef
  668. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  669. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  670. CLK_IND, RUN, FREQ_2, 0xe0
  671. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  672. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  673. CRT,RUN,LATCH_DATA, 0x08
  674.  
  675.  
  676. [1600,1200,8,94,75]
  677. # Unlock CRTC
  678. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  679. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  680. CRT,RUN,REG_LOCK_1,0x48,0xa5
  681. # Dump CRT Controller Registers
  682. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  683. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  684. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  685. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  686. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  687. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  688. CRT,RUN,MODE_CONTROL,0x02
  689. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  690. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  691. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  692. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  693. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  694. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  695. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  696. # Lock CRTC Reg 11 for compatibility
  697. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  698. # Dump ENG Register
  699. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  700. # Dump MISCOUT Register
  701. DIR,RUN,MISC_WRITE,0xef
  702. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  703. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  704. CLK_IND, RUN, FREQ_2, 0xe2
  705. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  706. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  707. CRT,RUN,LATCH_DATA, 0x08
  708.  
  709.  
  710. [1600,1200,8,82,66]
  711. # Unlock CRTC
  712. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  713. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  714. CRT,RUN,REG_LOCK_1,0x48,0xa5
  715. # Dump CRT Controller Registers
  716. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  717. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  718. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  719. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  720. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  721. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  722. CRT,RUN,MODE_CONTROL,0x02
  723. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  724. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  725. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  726. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  727. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  728. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  729. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  730. # Lock CRTC Reg 11 for compatibility
  731. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  732. # Dump ENG Register
  733. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  734. # Dump MISCOUT Register
  735. DIR,RUN,MISC_WRITE,0xef
  736. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  737. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  738. CLK_IND, RUN, FREQ_2, 0xd3
  739. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  740. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  741. CRT,RUN,LATCH_DATA, 0x08
  742.  
  743. [1600,1200,8,75,60]
  744. # Unlock CRTC
  745. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  746. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  747. CRT,RUN,REG_LOCK_1,0x48,0xa5
  748. # Dump CRT Controller Registers
  749. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  750. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  751. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  752. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  753. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  754. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  755. CRT,RUN,MODE_CONTROL,0x02
  756. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  757. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  758. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  759. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  760. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  761. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  762. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  763. # Lock CRTC Reg 11 for compatibility
  764. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  765. # Dump ENG Register
  766. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  767. # Dump MISCOUT Register
  768. DIR,RUN,MISC_WRITE,0xef
  769. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  770. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  771. CLK_IND, RUN, FREQ_2, 0xcd
  772. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  773. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  774. CRT,RUN,LATCH_DATA, 0x08
  775.  
  776. [1280,1024,8,95,90]
  777. # Unlock CRTC
  778. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  779. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  780. CRT,RUN,REG_LOCK_1,0x48,0xa5
  781. # Dump CRT Controller Registers
  782. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  783. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  784. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  785. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  786. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  787. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  788. CRT,RUN,MODE_CONTROL,0x02
  789. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  790. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  791. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  792. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  793. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  794. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  795. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  796. # Lock CRTC Reg 11 for compatibility
  797. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  798. # Dump ENG Register
  799. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  800. # Dump MISCOUT Register
  801. DIR,RUN,MISC_WRITE,0xef
  802. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  803. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  804. CLK_IND, RUN, FREQ_2, 0xd0
  805. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  806. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  807. CRT,RUN,LATCH_DATA, 0x08
  808.  
  809.  
  810. [1280,1024,8,79,75]
  811. # Unlock CRTC
  812. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  813. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  814. CRT,RUN,REG_LOCK_1,0x48,0xa5
  815. # Dump CRT Controller Registers
  816. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  817. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  818. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  819. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  820. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  821. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  822. CRT,RUN,MODE_CONTROL,0x02
  823. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  824. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  825. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  826. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  827. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  828. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  829. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  830. # Lock CRTC Reg 11 for compatibility
  831. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  832. # Dump ENG Register
  833. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  834. # Dump MISCOUT Register
  835. DIR,RUN,MISC_WRITE,0xef
  836. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  837. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  838. CLK_IND, RUN, FREQ_2, 0xc1
  839. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  840. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  841. CRT,RUN,LATCH_DATA, 0x08
  842.  
  843. [1280,1024,8,76,72]
  844. # Unlock CRTC
  845. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  846. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  847. CRT,RUN,REG_LOCK_1,0x48,0xa5
  848. # Dump CRT Controller Registers
  849. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  850. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  851. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  852. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  853. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  854. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  855. CRT,RUN,MODE_CONTROL,0x02
  856. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  857. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  858. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  859. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  860. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  861. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  862. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  863. # Lock CRTC Reg 11 for compatibility
  864. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  865. # Dump ENG Register
  866. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  867. # Dump MISCOUT Register
  868. DIR,RUN,MISC_WRITE,0xef
  869. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  870. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  871. CLK_IND, RUN, FREQ_2, 0xc1
  872. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  873. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  874. CRT,RUN,LATCH_DATA, 0x08
  875.  
  876. [1280,1024,8,74,70]
  877. # Unlock CRTC
  878. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  879. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  880. CRT,RUN,REG_LOCK_1,0x48,0xa5
  881. # Dump CRT Controller Registers
  882. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x82,0x28,0x52,0x00,0x40
  883. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  884. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  885. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  886. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  887. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  888. CRT,RUN,MODE_CONTROL,0x02
  889. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  890. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  891. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  892. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  893. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  894. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  895. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  896. # Lock CRTC Reg 11 for compatibility
  897. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  898. # Dump ENG Register
  899. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  900. # Dump MISCOUT Register
  901. DIR,RUN,MISC_WRITE,0xef
  902. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  903. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  904. CLK_IND, RUN, FREQ_2, 0xba
  905. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  906. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  907. CRT,RUN,LATCH_DATA, 0x08
  908.  
  909. [1280,1024,8,64,60]
  910. # Unlock CRTC
  911. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  912. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  913. CRT,RUN,REG_LOCK_1,0x48,0xa5
  914. # Dump CRT Controller Registers
  915. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  916. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  917. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  918. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  919. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  920. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  921. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  922. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  923. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  924. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  925. CRT,RUN,MODE_CONTROL,0x02
  926. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  927. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  928. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  929. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  930. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  931. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  932. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  933. # Lock CRTC Reg 11 for compatibility
  934. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  935. # Dump ENG Register
  936. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  937. # Dump MISCOUT Register
  938. DIR,RUN,MISC_WRITE,0xef
  939. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  940. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  941. ##CLK_IND, RUN, FREQ_2, 0xab
  942. CLK_IND, RUN, FREQ_2, 0xa9
  943. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  944. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  945. CRT,RUN,LATCH_DATA, 0x08
  946.  
  947. [1152,864,8,82,90]
  948. # Unlock CRTC
  949. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  950. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  951. CRT,RUN,REG_LOCK_1,0x48,0xa5
  952. # Dump CRT Controller Registers
  953. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4e,0x12,0x95,0xff,0x00,0x60
  954. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  955. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  956. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  957. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  958. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  959. CRT,RUN,MODE_CONTROL,0x02
  960. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  961. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  962. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  963. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  964. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  965. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  966. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  967. # Lock CRTC Reg 11 for compatibility
  968. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  969. # Dump ENG Register
  970. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  971. # Dump MISCOUT Register
  972. DIR,RUN,MISC_WRITE,0xef
  973. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  974. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  975. CLK_IND, RUN, FREQ_2, 0xb9
  976. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  977. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  978. CRT,RUN,LATCH_DATA, 0x08
  979.  
  980. [1152,864,8,71,75]
  981. # Unlock CRTC
  982. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  983. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  984. CRT,RUN,REG_LOCK_1,0x48,0xa5
  985. # Dump CRT Controller Registers
  986. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  987. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  988. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  989. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  990. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  991. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  992. CRT,RUN,MODE_CONTROL,0x02
  993. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  994. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  995. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  996. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  997. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  998. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  999. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1000. # Lock CRTC Reg 11 for compatibility
  1001. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1002. # Dump ENG Register
  1003. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1004. # Dump MISCOUT Register
  1005. DIR,RUN,MISC_WRITE,0xef
  1006. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1007. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1008. CLK_IND, RUN, FREQ_2, 0xa9
  1009. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1010. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1011. CRT,RUN,LATCH_DATA, 0x08
  1012.  
  1013. [1152,864,8,64,70]
  1014. # Unlock CRTC
  1015. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1016. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1017. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1018. # Dump CRT Controller Registers
  1019. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  1020. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1021. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1022. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1023. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1024. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1025. CRT,RUN,MODE_CONTROL,0x02
  1026. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1027. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1028. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1029. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1030. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1031. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1032. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1033. # Lock CRTC Reg 11 for compatibility
  1034. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1035. # Dump ENG Register
  1036. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1037. # Dump MISCOUT Register
  1038. DIR,RUN,MISC_WRITE,0xef
  1039. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1040. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1041. CLK_IND, RUN, FREQ_2, 0x9b
  1042. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1043. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1044. CRT,RUN,LATCH_DATA, 0x08
  1045.  
  1046. [1152,864,8,56,60]
  1047. # Unlock CRTC
  1048. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1049. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1050. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1051. # Dump CRT Controller Registers
  1052. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  1053. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1054. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1055. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1056. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1057. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1058. CRT,RUN,MODE_CONTROL,0x02
  1059. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1060. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1061. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1062. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1063. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1064. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1065. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1066. # Lock CRTC Reg 11 for compatibility
  1067. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1068. # Dump ENG Register
  1069. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1070. # Dump MISCOUT Register
  1071. DIR,RUN,MISC_WRITE,0xef
  1072. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1073. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1074. CLK_IND, RUN, FREQ_2, 0x90
  1075. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1076. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1077. CRT,RUN,LATCH_DATA, 0x08
  1078.  
  1079.  
  1080. [1152,864,16,82,90]
  1081. # Unlock CRTC
  1082. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1083. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1084. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1085. # Dump CRT Controller Registers
  1086. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1087. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1088. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1089. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1090. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1091. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1092. CRT,RUN,MODE_CONTROL,0x02
  1093. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1094. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1095. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1096. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1097. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1098. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1099. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1100. # Lock CRTC Reg 11 for compatibility
  1101. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1102. # Dump ENG Register
  1103. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1104. # Dump MISCOUT Register
  1105. DIR,RUN,MISC_WRITE,0xef
  1106. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1107. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1108. CLK_IND, RUN, FREQ_2, 0xb9
  1109. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1110. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1111. CRT,RUN,LATCH_DATA, 0x00
  1112.  
  1113.  
  1114. [1152,864,16,71,75]
  1115. # Unlock CRTC
  1116. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1117. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1118. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1119. # Dump CRT Controller Registers
  1120. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1121. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1122. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1123. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1124. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1125. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1126. CRT,RUN,MODE_CONTROL,0x02
  1127. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1128. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1129. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1130. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1131. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1132. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1133. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1134. # Lock CRTC Reg 11 for compatibility
  1135. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1136. # Dump ENG Register
  1137. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1138. # Dump MISCOUT Register
  1139. DIR,RUN,MISC_WRITE,0xef
  1140. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1141. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1142. CLK_IND, RUN, FREQ_2, 0xa9
  1143. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1144. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1145. CRT,RUN,LATCH_DATA, 0x00
  1146.  
  1147.  
  1148. [1152,864,16,64,70]
  1149. # Unlock CRTC
  1150. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1151. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1152. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1153. # Dump CRT Controller Registers
  1154. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1155. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1156. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1157. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1158. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1159. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1160. CRT,RUN,MODE_CONTROL,0x02
  1161. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1162. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1163. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1164. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1165. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1166. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1167. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1168. # Lock CRTC Reg 11 for compatibility
  1169. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1170. # Dump ENG Register
  1171. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1172. # Dump MISCOUT Register
  1173. DIR,RUN,MISC_WRITE,0xef
  1174. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1175. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1176. CLK_IND, RUN, FREQ_2, 0x9b
  1177. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1178. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1179. CRT,RUN,LATCH_DATA, 0x00
  1180.  
  1181. [1152,864,16,56,60]
  1182. # Unlock CRTC
  1183. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1184. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1185. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1186. # Dump CRT Controller Registers
  1187. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1188. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1189. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1190. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1191. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1192. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1193. CRT,RUN,MODE_CONTROL,0x02
  1194. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1195. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1196. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1197. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1198. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1199. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1200. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1201. # Lock CRTC Reg 11 for compatibility
  1202. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1203. # Dump ENG Register
  1204. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1205. # Dump MISCOUT Register
  1206. DIR,RUN,MISC_WRITE,0xef
  1207. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1208. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1209. CLK_IND, RUN, FREQ_2, 0x90
  1210. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1211. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1212. CRT,RUN,LATCH_DATA, 0x00
  1213.  
  1214. [1024,768,16,96,120]
  1215. # Unlock CRTC
  1216. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1217. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1218. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1219. # Dump CRT Controller Registers
  1220. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1221. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1222. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1223. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1224. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1225. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1226. CRT,RUN,MODE_CONTROL,0x02
  1227. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1228. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1229. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1230. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1231. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1232. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1233. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1234. # Lock CRTC Reg 11 for compatibility
  1235. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1236. # Dump ENG Register
  1237. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1238. # Dump MISCOUT Register
  1239. DIR,RUN,MISC_WRITE,0xef
  1240. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1241. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1242. CLK_IND, RUN, FREQ_2, 0xbd
  1243. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1244. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1245. CRT,RUN,LATCH_DATA, 0x00
  1246.  
  1247. [1024,768,16,81,100]
  1248. # Unlock CRTC
  1249. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1250. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1251. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1252. # Dump CRT Controller Registers
  1253. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1254. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1255. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1256. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1257. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1258. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1259. CRT,RUN,MODE_CONTROL,0x02
  1260. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1261. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1262. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1263. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1264. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1265. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1266. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1267. # Lock CRTC Reg 11 for compatibility
  1268. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1269. # Dump ENG Register
  1270. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1271. # Dump MISCOUT Register
  1272. DIR,RUN,MISC_WRITE,0xef
  1273. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1274. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1275. CLK_IND, RUN, FREQ_2, 0xa9
  1276. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1277. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1278. CRT,RUN,LATCH_DATA, 0x00
  1279.  
  1280. [1024,768,16,64,80]
  1281. # Unlock CRTC
  1282. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1283. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1284. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1285. # Dump CRT Controller Registers
  1286. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1287. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1288. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1289. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1290. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1291. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1292. CRT,RUN,MODE_CONTROL,0x02
  1293. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1294. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1295. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1296. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1297. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1298. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1299. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1300. # Lock CRTC Reg 11 for compatibility
  1301. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1302. # Dump ENG Register
  1303. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1304. # Dump MISCOUT Register
  1305. DIR,RUN,MISC_WRITE,0xef
  1306. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1307. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1308. CLK_IND, RUN, FREQ_2, 0x93
  1309. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1310. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1311. CRT,RUN,LATCH_DATA, 0x00
  1312.  
  1313. [1024,768,16,60,75]
  1314. # Unlock CRTC
  1315. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1316. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1317. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1318. # Dump CRT Controller Registers
  1319. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1320. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1321. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1322. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1323. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1324. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1325. CRT,RUN,MODE_CONTROL,0x02
  1326. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1327. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1328. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1329. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1330. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1331. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1332. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1333. # Lock CRTC Reg 11 for compatibility
  1334. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1335. # Dump ENG Register
  1336. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1337. # Dump MISCOUT Register
  1338. DIR,RUN,MISC_WRITE,0xef
  1339. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1340. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1341. CLK_IND, RUN, FREQ_2, 0x8c
  1342. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1343. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1344. CRT,RUN,LATCH_DATA, 0x00
  1345.  
  1346. [1024,768,16,58,72]
  1347. # Unlock CRTC
  1348. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1349. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1350. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1351. # Dump CRT Controller Registers
  1352. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1353. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1354. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1355. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1356. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1357. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1358. CRT,RUN,MODE_CONTROL,0x02
  1359. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1360. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1361. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1362. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1363. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1364. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1365. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1366. # Lock CRTC Reg 11 for compatibility
  1367. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1368. # Dump ENG Register
  1369. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1370. # Dump MISCOUT Register
  1371. DIR,RUN,MISC_WRITE,0xef
  1372. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1373. CLK_IND, RUN, FREQ_2,0x88
  1374. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1375. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1376. CLK_IND, RUN, FREQ_2, 0x88
  1377. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1378. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1379. CRT,RUN,LATCH_DATA, 0x00
  1380.  
  1381. [1024,768,16,56,70]
  1382. # Unlock CRTC
  1383. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1384. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1385. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1386. # Dump CRT Controller Registers
  1387. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1388. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1389. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1390. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1391. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1392. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1393. CRT,RUN,MODE_CONTROL,0x02
  1394. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1395. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1396. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1397. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1398. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1399. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1400. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1401. # Lock CRTC Reg 11 for compatibility
  1402. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1403. # Dump ENG Register
  1404. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1405. # Dump MISCOUT Register
  1406. DIR,RUN,MISC_WRITE,0xef
  1407. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1408. CLK_IND, RUN, FREQ_2,0x88
  1409. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1410. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1411. CLK_IND, RUN, FREQ_2, 0x88
  1412. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1413. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1414. CRT,RUN,LATCH_DATA, 0x00
  1415.  
  1416. [1024,768,16,48,60]
  1417. # Unlock CRTC
  1418. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1419. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1420. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1421. # Dump CRT Controller Registers
  1422. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1423. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1424. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1425. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1426. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1427. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1428. CRT,RUN,MODE_CONTROL,0x02
  1429. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1430. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1431. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1432. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1433. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1434. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1435. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1436. # Lock CRTC Reg 11 for compatibility
  1437. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1438. # Dump ENG Register
  1439. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1440. # Dump MISCOUT Register
  1441. DIR,RUN,MISC_WRITE,0xef
  1442. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1443. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1444. CLK_IND, RUN, FREQ_2, 0x7E
  1445. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1446. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1447. CRT,RUN,LATCH_DATA, 0x00
  1448.  
  1449. [1024,768,8,96,120]
  1450. # Unlock CRTC
  1451. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1452. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1453. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1454. # Dump CRT Controller Registers
  1455. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1456. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1457. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1458. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1459. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1460. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1461. CRT,RUN,MODE_CONTROL,0x02
  1462. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1463. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1464. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1465. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1466. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1467. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1468. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1469. # Lock CRTC Reg 11 for compatibility
  1470. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1471. # Dump ENG Register
  1472. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1473. # Dump MISCOUT Register
  1474. DIR,RUN,MISC_WRITE,0xef
  1475. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1476. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1477. CLK_IND, RUN, FREQ_2, 0xbd
  1478. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1479. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1480. CRT,RUN,LATCH_DATA, 0x08
  1481.  
  1482. [1024,768,8,81,100]
  1483. # Unlock CRTC
  1484. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1485. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1486. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1487. # Dump CRT Controller Registers
  1488. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1489. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1490. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1491. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1492. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1493. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1494. CRT,RUN,MODE_CONTROL,0x02
  1495. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1496. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1497. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1498. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1499. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1500. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1501. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1502. # Lock CRTC Reg 11 for compatibility
  1503. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1504. # Dump ENG Register
  1505. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1506. # Dump MISCOUT Register
  1507. DIR,RUN,MISC_WRITE,0xef
  1508. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1509. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1510. CLK_IND, RUN, FREQ_2, 0xa9
  1511. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1512. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1513. CRT,RUN,LATCH_DATA, 0x08
  1514.  
  1515.  
  1516. [1024,768,8,64,80]
  1517. # Unlock CRTC
  1518. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1519. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1520. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1521. # Dump CRT Controller Registers
  1522. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1523. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1524. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1525. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1526. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1527. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1528. CRT,RUN,MODE_CONTROL,0x02
  1529. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1530. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1531. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1532. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1533. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1534. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1535. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1536. # Lock CRTC Reg 11 for compatibility
  1537. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1538. # Dump ENG Register
  1539. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1540. # Dump MISCOUT Register
  1541. DIR,RUN,MISC_WRITE,0xef
  1542. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1543. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1544. CLK_IND, RUN, FREQ_2, 0x93
  1545. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1546. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1547. CRT,RUN,LATCH_DATA, 0x08
  1548.  
  1549. [1024,768,8,60,75]
  1550. # Unlock CRTC
  1551. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1552. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1553. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1554. # Dump CRT Controller Registers
  1555. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1556. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1557. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1558. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1559. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1560. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1561. CRT,RUN,MODE_CONTROL,0x02
  1562. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1563. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1564. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1565. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1566. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1567. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1568. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1569. # Lock CRTC Reg 11 for compatibility
  1570. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1571. # Dump ENG Register
  1572. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1573. # Dump MISCOUT Register
  1574. DIR,RUN,MISC_WRITE,0xef
  1575. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1576. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1577. CLK_IND, RUN, FREQ_2, 0x8c
  1578. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1579. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1580. CRT,RUN,LATCH_DATA, 0x08
  1581.  
  1582. [1024,768,8,58,72]
  1583. # Unlock CRTC
  1584. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1585. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1586. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1587. # Dump CRT Controller Registers
  1588. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1589. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1590. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1591. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1592. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1593. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1594. CRT,RUN,MODE_CONTROL,0x02
  1595. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1596. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1597. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1598. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1599. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1600. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1601. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1602. # Lock CRTC Reg 11 for compatibility
  1603. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1604. # Dump ENG Register
  1605. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1606. # Dump MISCOUT Register
  1607. DIR,RUN,MISC_WRITE,0xef
  1608. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1609. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1610. CLK_IND, RUN, FREQ_2, 0x88
  1611. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1612. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1613. CRT,RUN,LATCH_DATA, 0x08
  1614.  
  1615. [1024,768,8,56,70]
  1616. # Unlock CRTC
  1617. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1618. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1619. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1620. # Dump CRT Controller Registers
  1621. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1622. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1623. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1624. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1625. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1626. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1627. CRT,RUN,MODE_CONTROL,0x02
  1628. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1629. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1630. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1631. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1632. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1633. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1634. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1635. # Lock CRTC Reg 11 for compatibility
  1636. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1637. # Dump ENG Register
  1638. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1639. # Dump MISCOUT Register
  1640. DIR,RUN,MISC_WRITE,0xef
  1641. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1642. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1643. CLK_IND, RUN, FREQ_2, 0x88
  1644. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1645. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1646. CRT,RUN,LATCH_DATA, 0x08
  1647.  
  1648. [1024,768,8,48,60]
  1649. # Unlock CRTC
  1650. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1651. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1652. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1653. # Dump CRT Controller Registers
  1654. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1655. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1656. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1657. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1658. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1659. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1660. CRT,RUN,MODE_CONTROL,0x02
  1661. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1662. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1663. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1664. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1665. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1666. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1667. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1668. # Lock CRTC Reg 11 for compatibility
  1669. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1670. # Dump ENG Register
  1671. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1672. # Dump MISCOUT Register
  1673. DIR,RUN,MISC_WRITE,0xef
  1674. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1675. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1676. CLK_IND, RUN, FREQ_2, 0x7e
  1677. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1678. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1679. CRT,RUN,LATCH_DATA, 0x08
  1680.  
  1681. [800,600,32,75,120]
  1682. # Unlock CRTC
  1683. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1684. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1685. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1686. # Dump CRT Controller Registers
  1687. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1688. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1689. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1690. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1691. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1692. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1693. CRT,RUN,MODE_CONTROL,0x02
  1694. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1695. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1696. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1697. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1698. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1699. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1700. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1701. # Lock CRTC Reg 11 for compatibility
  1702. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1703. # Dump ENG Register
  1704. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1705. # Dump MISCOUT Register
  1706. DIR,RUN,MISC_WRITE,0xef
  1707. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1708. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1709. CLK_IND, RUN, FREQ_2, 0x8a
  1710. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1711. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1712. CRT,RUN,LATCH_DATA, 0x00
  1713.  
  1714. [800,600,32,64,100]
  1715. # Unlock CRTC
  1716. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1717. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1718. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1719. # Dump CRT Controller Registers
  1720. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1721. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1722. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1723. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1724. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1725. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1726. CRT,RUN,MODE_CONTROL,0x02
  1727. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1728. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1729. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1730. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1731. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1732. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1733. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1734. # Lock CRTC Reg 11 for compatibility
  1735. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1736. # Dump ENG Register
  1737. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1738. # Dump MISCOUT Register
  1739. DIR,RUN,MISC_WRITE,0xef
  1740. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1741. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1742. CLK_IND, RUN, FREQ_2, 0x7e
  1743. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1744. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1745. CRT,RUN,LATCH_DATA, 0x00
  1746.  
  1747. [800,600,32,56,90]
  1748. # Unlock CRTC
  1749. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1750. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1751. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1752. # Dump CRT Controller Registers
  1753. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1754. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1755. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1756. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1757. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1758. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1759. CRT,RUN,MODE_CONTROL,0x02
  1760. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1761. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1762. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1763. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1764. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1765. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1766. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1767. # Lock CRTC Reg 11 for compatibility
  1768. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1769. # Dump ENG Register
  1770. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1771. # Dump MISCOUT Register
  1772. DIR,RUN,MISC_WRITE,0xef
  1773. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1774. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1775. CLK_IND, RUN, FREQ_2, 0x70
  1776. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1777. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1778. CRT,RUN,LATCH_DATA, 0x00
  1779.  
  1780. [800,600,32,46,75]
  1781. # Unlock CRTC
  1782. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1783. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1784. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1785. # Dump CRT Controller Registers
  1786. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1787. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1788. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1789. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1790. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1791. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1792. CRT,RUN,MODE_CONTROL,0x02
  1793. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1794. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1795. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1796. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1797. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1798. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1799. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1800. # Lock CRTC Reg 11 for compatibility
  1801. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1802. # Dump ENG Register
  1803. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1804. # Dump MISCOUT Register
  1805. DIR,RUN,MISC_WRITE,0xef
  1806. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1807. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1808. CLK_IND, RUN, FREQ_2, 0x60
  1809. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1810. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1811. CRT,RUN,LATCH_DATA, 0x00
  1812.  
  1813. [800,600,32,48,72]
  1814. # Unlock CRTC
  1815. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1816. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1817. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1818. # Dump CRT Controller Registers
  1819. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1820. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1821. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1822. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1823. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1824. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1825. CRT,RUN,MODE_CONTROL,0x02
  1826. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1827. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1828. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1829. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1830. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1831. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1832. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1833. # Lock CRTC Reg 11 for compatibility
  1834. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1835. # Dump ENG Register
  1836. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1837. # Dump MISCOUT Register
  1838. DIR,RUN,MISC_WRITE,0xef
  1839. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1840. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1841. CLK_IND, RUN, FREQ_2, 0x61
  1842. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1843. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1844. CRT,RUN,LATCH_DATA, 0x00
  1845.  
  1846. [800,600,32,37,60]
  1847. # Unlock CRTC
  1848. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1849. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1850. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1851. # Dump CRT Controller Registers
  1852. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1853. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1854. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1855. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1856. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1857. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1858. CRT,RUN,MODE_CONTROL,0x02
  1859. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1860. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1861. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1862. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1863. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1864. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1865. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1866. # Lock CRTC Reg 11 for compatibility
  1867. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1868. # Dump ENG Register
  1869. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1870. # Dump MISCOUT Register
  1871. DIR,RUN,MISC_WRITE,0xef
  1872. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1873. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1874. CLK_IND, RUN, FREQ_2, 0x4D
  1875. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1876. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1877. CRT,RUN,LATCH_DATA, 0x00
  1878.  
  1879.  
  1880. [800,600,32,35,56]
  1881. # Unlock CRTC
  1882. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1883. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1884. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1885. # Dump CRT Controller Registers
  1886. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1887. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1888. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1889. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1890. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1891. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1892. CRT,RUN,MODE_CONTROL,0x02
  1893. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1894. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1895. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1896. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1897. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1898. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1899. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1900. # Lock CRTC Reg 11 for compatibility
  1901. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1902. # Dump ENG Register
  1903. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1904. # Dump MISCOUT Register
  1905. DIR,RUN,MISC_WRITE,0xef
  1906. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1907. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1908. CLK_IND, RUN, FREQ_2, 0x45
  1909. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1910. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1911. CRT,RUN,LATCH_DATA, 0x00
  1912.  
  1913. [800,600,24,75,120]
  1914. # Unlock CRTC
  1915. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1916. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1917. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1918. # Dump CRT Controller Registers
  1919. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1920. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1921. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1922. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1923. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1924. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1925. CRT,RUN,MODE_CONTROL,0x02
  1926. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1927. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1928. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1929. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1930. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1931. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1932. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1933. # Lock CRTC Reg 11 for compatibility
  1934. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1935. # Dump ENG Register
  1936. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1937. # Dump MISCOUT Register
  1938. DIR,RUN,MISC_WRITE,0xef
  1939. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1940. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1941. CLK_IND, RUN, FREQ_2, 0x8a
  1942. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1943. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1944. CRT,RUN,LATCH_DATA, 0x00
  1945.  
  1946.  
  1947. [800,600,24,64,100]
  1948. # Unlock CRTC
  1949. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1950. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1951. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1952. # Dump CRT Controller Registers
  1953. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  1954. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1955. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1956. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1957. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1958. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1959. CRT,RUN,MODE_CONTROL,0x02
  1960. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1961. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1962. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1963. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1964. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1965. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1966. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1967. # Lock CRTC Reg 11 for compatibility
  1968. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1969. # Dump ENG Register
  1970. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1971. # Dump MISCOUT Register
  1972. DIR,RUN,MISC_WRITE,0xef
  1973. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1974. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1975. CLK_IND, RUN, FREQ_2, 0x7e
  1976. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1977. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1978. CRT,RUN,LATCH_DATA, 0x00
  1979.  
  1980.  
  1981. [800,600,24,56,90]
  1982. # Unlock CRTC
  1983. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1984. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1985. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1986. # Dump CRT Controller Registers
  1987. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  1988. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1989. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1990. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1991. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1992. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1993. CRT,RUN,MODE_CONTROL,0x02
  1994. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1995. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1996. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1997. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1998. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1999. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2000. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2001. # Lock CRTC Reg 11 for compatibility
  2002. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2003. # Dump ENG Register
  2004. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2005. # Dump MISCOUT Register
  2006. DIR,RUN,MISC_WRITE,0xef
  2007. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2008. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2009. CLK_IND, RUN, FREQ_2, 0x70
  2010. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2011. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2012. CRT,RUN,LATCH_DATA, 0x00
  2013.  
  2014.  
  2015. [800,600,24,46,75]
  2016. # Unlock CRTC
  2017. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2018. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2019. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2020. # Dump CRT Controller Registers
  2021. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  2022. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2023. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2024. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2025. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2026. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2027. CRT,RUN,MODE_CONTROL,0x02
  2028. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2029. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2030. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2031. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2032. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2033. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2034. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2035. # Lock CRTC Reg 11 for compatibility
  2036. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2037. # Dump ENG Register
  2038. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2039. # Dump MISCOUT Register
  2040. DIR,RUN,MISC_WRITE,0xef
  2041. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2042. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2043. CLK_IND, RUN, FREQ_2, 0x60
  2044. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2045. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2046. CRT,RUN,LATCH_DATA, 0x00
  2047.  
  2048.  
  2049. [800,600,24,48,72]
  2050. # Unlock CRTC
  2051. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2052. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2053. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2054. # Dump CRT Controller Registers
  2055. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  2056. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  2057. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2058. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  2059. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  2060. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2061. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  2062. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2063. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2064. CRT,RUN,MODE_CONTROL,0x02
  2065. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2066. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2067. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2068. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2069. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2070. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2071. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2072. # Lock CRTC Reg 11 for compatibility
  2073. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2074. # Dump ENG Register
  2075. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2076. # Dump MISCOUT Register
  2077. DIR,RUN,MISC_WRITE,0xef
  2078. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2079. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2080. ##CLK_IND, RUN, FREQ_2, 0x61
  2081. CLK_IND, RUN, FREQ_2, 0x62
  2082. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2083. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2084. CRT,RUN,LATCH_DATA, 0x00
  2085.  
  2086. [800,600,24,37,60]
  2087. # Unlock CRTC
  2088. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2089. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2090. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2091. # Dump CRT Controller Registers
  2092. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  2093. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2094. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2095. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2096. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2097. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2098. CRT,RUN,MODE_CONTROL,0x02
  2099. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2100. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2101. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2102. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2103. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2104. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2105. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2106. # Lock CRTC Reg 11 for compatibility
  2107. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2108. # Dump ENG Register
  2109. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2110. # Dump MISCOUT Register
  2111. DIR,RUN,MISC_WRITE,0xef
  2112. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2113. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2114. CLK_IND, RUN, FREQ_2, 0x4d
  2115. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2116. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2117. CRT,RUN,LATCH_DATA, 0x00
  2118.  
  2119.  
  2120. [800,600,24,35,56]
  2121. # Unlock CRTC
  2122. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2123. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2124. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2125. # Dump CRT Controller Registers
  2126. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  2127. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2128. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2129. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2130. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2131. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2132. CRT,RUN,MODE_CONTROL,0x02
  2133. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2134. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2135. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2136. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2137. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2138. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2139. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2140. # Lock CRTC Reg 11 for compatibility
  2141. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2142. # Dump ENG Register
  2143. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2144. # Dump MISCOUT Register
  2145. DIR,RUN,MISC_WRITE,0xef
  2146. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2147. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2148. CLK_IND, RUN, FREQ_2, 0x45
  2149. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2150. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2151. CRT,RUN,LATCH_DATA, 0x00
  2152.  
  2153. [800,600,16,75,120]
  2154. # Unlock CRTC
  2155. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2156. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2157. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2158. # Dump CRT Controller Registers
  2159. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2160. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2161. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2162. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2163. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2164. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2165. CRT,RUN,MODE_CONTROL,0x02
  2166. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2167. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2168. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2169. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2170. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2171. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2172. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2173. # Lock CRTC Reg 11 for compatibility
  2174. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2175. # Dump ENG Register
  2176. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2177. # Dump MISCOUT Register
  2178. DIR,RUN,MISC_WRITE,0xef
  2179. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2180. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2181. CLK_IND, RUN, FREQ_2, 0x8a
  2182. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2183. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2184. CRT,RUN,LATCH_DATA, 0x00
  2185.  
  2186. [800,600,16,64,100]
  2187. # Unlock CRTC
  2188. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2189. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2190. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2191. # Dump CRT Controller Registers
  2192. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2193. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2194. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2195. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2196. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2197. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2198. CRT,RUN,MODE_CONTROL,0x02
  2199. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2200. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2201. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2202. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2203. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2204. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2205. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2206. # Lock CRTC Reg 11 for compatibility
  2207. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2208. # Dump ENG Register
  2209. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2210. # Dump MISCOUT Register
  2211. DIR,RUN,MISC_WRITE,0xef
  2212. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2213. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2214. CLK_IND, RUN, FREQ_2, 0x7e
  2215. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2216. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2217. CRT,RUN,LATCH_DATA, 0x00
  2218.  
  2219. [800,600,16,56,90]
  2220. # Unlock CRTC
  2221. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2222. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2223. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2224. # Dump CRT Controller Registers
  2225. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2226. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2227. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2228. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2229. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2230. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2231. CRT,RUN,MODE_CONTROL,0x02
  2232. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2233. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2234. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2235. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2236. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2237. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2238. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2239. # Lock CRTC Reg 11 for compatibility
  2240. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2241. # Dump ENG Register
  2242. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2243. # Dump MISCOUT Register
  2244. DIR,RUN,MISC_WRITE,0xef
  2245. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2246. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2247. CLK_IND, RUN, FREQ_2, 0x70
  2248. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2249. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2250. CRT,RUN,LATCH_DATA, 0x00
  2251.  
  2252. [800,600,16,46,75]
  2253. # Unlock CRTC
  2254. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2255. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2256. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2257. # Dump CRT Controller Registers
  2258. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2259. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2260. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2261. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2262. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2263. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2264. CRT,RUN,MODE_CONTROL,0x02
  2265. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2266. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2267. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2268. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2269. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2270. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2271. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2272. # Lock CRTC Reg 11 for compatibility
  2273. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2274. # Dump ENG Register
  2275. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2276. # Dump MISCOUT Register
  2277. DIR,RUN,MISC_WRITE,0xef
  2278. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2279. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2280. CLK_IND, RUN, FREQ_2, 0x60
  2281. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2282. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2283. CRT,RUN,LATCH_DATA, 0x00
  2284.  
  2285. [800,600,16,48,72]
  2286. # Unlock CRTC
  2287. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2288. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2289. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2290. # Dump CRT Controller Registers
  2291. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2292. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2293. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2294. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2295. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2296. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2297. CRT,RUN,MODE_CONTROL,0x02
  2298. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2299. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2300. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2301. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2302. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2303. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2304. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2305. # Lock CRTC Reg 11 for compatibility
  2306. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2307. # Dump ENG Register
  2308. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2309. # Dump MISCOUT Register
  2310. DIR,RUN,MISC_WRITE,0xef
  2311. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2312. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2313. CLK_IND, RUN, FREQ_2, 0x61
  2314. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2315. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2316. CRT,RUN,LATCH_DATA, 0x00
  2317.  
  2318. [800,600,16,37,60]
  2319. # Unlock CRTC
  2320. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2321. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2322. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2323. # Dump CRT Controller Registers
  2324. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2325. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2326. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2327. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2328. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2329. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2330. CRT,RUN,MODE_CONTROL,0x02
  2331. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2332. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2333. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2334. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2335. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2336. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2337. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2338. # Lock CRTC Reg 11 for compatibility
  2339. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2340. # Dump ENG Register
  2341. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2342. # Dump MISCOUT Register
  2343. DIR,RUN,MISC_WRITE,0xef
  2344. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2345. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2346. CLK_IND, RUN, FREQ_2, 0x4D
  2347. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2348. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2349. CRT,RUN,LATCH_DATA, 0x00
  2350.  
  2351.  
  2352. [800,600,16,35,56]
  2353. # Unlock CRTC
  2354. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2355. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2356. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2357. # Dump CRT Controller Registers
  2358. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2359. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2360. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2361. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2362. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2363. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2364. CRT,RUN,MODE_CONTROL,0x02
  2365. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2366. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2367. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2368. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2369. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2370. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2371. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2372. # Lock CRTC Reg 11 for compatibility
  2373. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2374. # Dump ENG Register
  2375. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2376. # Dump MISCOUT Register
  2377. DIR,RUN,MISC_WRITE,0xef
  2378. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2379. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2380. CLK_IND, RUN, FREQ_2, 0x45
  2381. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2382. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2383. CRT,RUN,LATCH_DATA, 0x00
  2384.  
  2385. [800,600,8,75,120]
  2386. # Unlock CRTC
  2387. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2388. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2389. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2390. # Dump CRT Controller Registers
  2391. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2392. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2393. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2394. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2395. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2396. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2397. CRT,RUN,MODE_CONTROL,0x02
  2398. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2399. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2400. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2401. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2402. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2403. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2404. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2405. # Lock CRTC Reg 11 for compatibility
  2406. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2407. # Dump ENG Register
  2408. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2409. # Dump MISCOUT Register
  2410. DIR,RUN,MISC_WRITE,0xef
  2411. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2412. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2413. CLK_IND, RUN, FREQ_2, 0x8a
  2414. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2415. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2416. CRT,RUN,LATCH_DATA, 0x08
  2417.  
  2418. [800,600,8,64,100]
  2419. # Unlock CRTC
  2420. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2421. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2422. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2423. # Dump CRT Controller Registers
  2424. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2425. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2426. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2427. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2428. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2429. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2430. CRT,RUN,MODE_CONTROL,0x02
  2431. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2432. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2433. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2434. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2435. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2436. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2437. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2438. # Lock CRTC Reg 11 for compatibility
  2439. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2440. # Dump ENG Register
  2441. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2442. # Dump MISCOUT Register
  2443. DIR,RUN,MISC_WRITE,0xef
  2444. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2445. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2446. CLK_IND, RUN, FREQ_2, 0x7e
  2447. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2448. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2449. CRT,RUN,LATCH_DATA, 0x08
  2450.  
  2451. [800,600,8,56,90]
  2452. # Unlock CRTC
  2453. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2454. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2455. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2456. # Dump CRT Controller Registers
  2457. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2458. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2459. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2460. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2461. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2462. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2463. CRT,RUN,MODE_CONTROL,0x02
  2464. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2465. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2466. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2467. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2468. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2469. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2470. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2471. # Lock CRTC Reg 11 for compatibility
  2472. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2473. # Dump ENG Register
  2474. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2475. # Dump MISCOUT Register
  2476. DIR,RUN,MISC_WRITE,0xef
  2477. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2478. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2479. CLK_IND, RUN, FREQ_2, 0x70
  2480. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2481. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2482. CRT,RUN,LATCH_DATA, 0x08
  2483.  
  2484. [800,600,8,46,75]
  2485. # Unlock CRTC
  2486. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2487. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2488. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2489. # Dump CRT Controller Registers
  2490. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2491. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2492. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2493. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2494. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2495. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2496. CRT,RUN,MODE_CONTROL,0x02
  2497. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2498. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2499. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2500. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2501. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2502. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2503. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2504. # Lock CRTC Reg 11 for compatibility
  2505. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2506. # Dump ENG Register
  2507. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2508. # Dump MISCOUT Register
  2509. DIR,RUN,MISC_WRITE,0xef
  2510. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2511. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2512. CLK_IND, RUN, FREQ_2, 0x60
  2513. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2514. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2515. CRT,RUN,LATCH_DATA, 0x08
  2516.  
  2517. [800,600,8,48,72]
  2518. # Unlock CRTC
  2519. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2520. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2521. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2522. # Dump CRT Controller Registers
  2523. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2524. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2525. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2526. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2527. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2528. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2529. CRT,RUN,MODE_CONTROL,0x02
  2530. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2531. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2532. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2533. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2534. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2535. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2536. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2537. # Lock CRTC Reg 11 for compatibility
  2538. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2539. # Dump ENG Register
  2540. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2541. # Dump MISCOUT Register
  2542. DIR,RUN,MISC_WRITE,0xef
  2543. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2544. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2545. CLK_IND, RUN, FREQ_2, 0x61
  2546. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2547. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2548. CRT,RUN,LATCH_DATA, 0x08
  2549.  
  2550. [800,600,8,37,60]
  2551. # Unlock CRTC
  2552. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2553. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2554. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2555. # Dump CRT Controller Registers
  2556. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2557. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2558. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2559. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2560. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2561. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2562. CRT,RUN,MODE_CONTROL,0x02
  2563. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2564. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2565. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2566. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2567. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2568. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2569. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2570. # Lock CRTC Reg 11 for compatibility
  2571. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2572. # Dump ENG Register
  2573. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2574. # Dump MISCOUT Register
  2575. DIR,RUN,MISC_WRITE,0xef
  2576. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2577. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2578. CLK_IND, RUN, FREQ_2, 0x4D
  2579. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2580. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2581. CRT,RUN,LATCH_DATA, 0x08
  2582.  
  2583. [800,600,8,35,56]
  2584. # Unlock CRTC
  2585. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2586. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2587. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2588. # Dump CRT Controller Registers
  2589. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2590. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2591. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2592. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2593. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2594. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2595. CRT,RUN,MODE_CONTROL,0x02
  2596. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2597. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2598. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2599. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2600. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2601. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2602. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2603. # Lock CRTC Reg 11 for compatibility
  2604. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2605. # Dump ENG Register
  2606. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2607. # Dump MISCOUT Register
  2608. DIR,RUN,MISC_WRITE,0xef
  2609. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2610. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2611. CLK_IND, RUN, FREQ_2, 0x45
  2612. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2613. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2614. CRT,RUN,LATCH_DATA, 0x08
  2615.  
  2616. [640,480,32,64,120]
  2617. # Unlock CRTC
  2618. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2619. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2620. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2621. # Dump CRT Controller Registers
  2622. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2623. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2624. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2625. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2626. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2627. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2628. CRT,RUN,MODE_CONTROL,0x02
  2629. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2630. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2631. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2632. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2633. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2634. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2635. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2636. # Lock CRTC Reg 11 for compatibility
  2637. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2638. # Dump ENG Register
  2639. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2640. # Dump MISCOUT Register
  2641. DIR,RUN,MISC_WRITE,0xef
  2642. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2643. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2644. CLK_IND, RUN, FREQ_2, 0x67
  2645. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2646. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2647. CRT,RUN,LATCH_DATA, 0x00
  2648.  
  2649. [640,480,32,52,100]
  2650. # Unlock CRTC
  2651. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2652. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2653. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2654. # Dump CRT Controller Registers
  2655. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2656. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2657. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2658. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2659. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2660. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2661. CRT,RUN,MODE_CONTROL,0x02
  2662. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2663. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2664. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2665. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2666. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2667. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2668. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2669. # Lock CRTC Reg 11 for compatibility
  2670. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2671. # Dump ENG Register
  2672. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2673. # Dump MISCOUT Register
  2674. DIR,RUN,MISC_WRITE,0xef
  2675. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2676. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2677. CLK_IND, RUN, FREQ_2, 0x50
  2678. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2679. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2680. CRT,RUN,LATCH_DATA, 0x00
  2681.  
  2682. [640,480,32,48,90]
  2683. # Unlock CRTC
  2684. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2685. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2686. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2687. # Dump CRT Controller Registers
  2688. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2689. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2690. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2691. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2692. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2693. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2694. CRT,RUN,MODE_CONTROL,0x02
  2695. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2696. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2697. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2698. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2699. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2700. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2701. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2702. # Lock CRTC Reg 11 for compatibility
  2703. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2704. # Dump ENG Register
  2705. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2706. # Dump MISCOUT Register
  2707. DIR,RUN,MISC_WRITE,0xef
  2708. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2709. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2710. CLK_IND, RUN, FREQ_2, 0x4d
  2711. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2712. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2713. CRT,RUN,LATCH_DATA, 0x00
  2714.  
  2715. [640,480,32,37,75]
  2716. # Unlock CRTC
  2717. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2718. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2719. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2720. # Dump CRT Controller Registers
  2721. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2722. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2723. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2724. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2725. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2726. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2727. CRT,RUN,MODE_CONTROL,0x02
  2728. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2729. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2730. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2731. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2732. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2733. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2734. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2735. # Lock CRTC Reg 11 for compatibility
  2736. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2737. # Dump ENG Register
  2738. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2739. # Dump MISCOUT Register
  2740. DIR,RUN,MISC_WRITE,0xef
  2741. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2742. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2743. CLK_IND, RUN, FREQ_2, 0x3a
  2744. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2745. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2746. CRT,RUN,LATCH_DATA, 0x00
  2747.  
  2748. [640,480,32,37,72]
  2749. # Unlock CRTC
  2750. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2751. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2752. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2753. # Dump CRT Controller Registers
  2754. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2755. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2756. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2757. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2758. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2759. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2760. CRT,RUN,MODE_CONTROL,0x02
  2761. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2762. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2763. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2764. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2765. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2766. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2767. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2768. # Lock CRTC Reg 11 for compatibility
  2769. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2770. # Dump ENG Register
  2771. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2772. # Dump MISCOUT Register
  2773. DIR,RUN,MISC_WRITE,0xef
  2774. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2775. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2776. CLK_IND, RUN, FREQ_2, 0x3a
  2777. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2778. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2779. CRT,RUN,LATCH_DATA, 0x00
  2780.  
  2781. [640,480,32,31,60]
  2782. # Unlock CRTC
  2783. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2784. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2785. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2786. # Dump CRT Controller Registers
  2787. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2788. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2789. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2790. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2791. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2792. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2793. CRT,RUN,MODE_CONTROL,0x02
  2794. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2795. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2796. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2797. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2798. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2799. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2800. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2801. # Lock CRTC Reg 11 for compatibility
  2802. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2803. # Dump ENG Register
  2804. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2805. # Dump MISCOUT Register
  2806. DIR,RUN,MISC_WRITE,0xef
  2807. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2808. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2809. CLK_IND, RUN, FREQ_2, 0x21
  2810. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2811. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2812. CRT,RUN,LATCH_DATA, 0x00
  2813.  
  2814. [640,480,24,64,120]
  2815. # Unlock CRTC
  2816. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2817. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2818. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2819. # Dump CRT Controller Registers
  2820. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  2821. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2822. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2823. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2824. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2825. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2826. CRT,RUN,MODE_CONTROL,0x02
  2827. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2828. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2829. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2830. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2831. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2832. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2833. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2834. # Lock CRTC Reg 11 for compatibility
  2835. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2836. # Dump ENG Register
  2837. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2838. # Dump MISCOUT Register
  2839. DIR,RUN,MISC_WRITE,0xef
  2840. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2841. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2842. CLK_IND, RUN, FREQ_2, 0x67
  2843. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2844. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2845. CRT,RUN,LATCH_DATA, 0x00
  2846.  
  2847.  
  2848. [640,480,24,52,100]
  2849. # Unlock CRTC
  2850. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2851. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2852. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2853. # Dump CRT Controller Registers
  2854. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2855. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2856. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2857. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2858. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2859. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2860. CRT,RUN,MODE_CONTROL,0x02
  2861. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2862. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2863. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2864. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2865. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2866. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2867. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2868. # Lock CRTC Reg 11 for compatibility
  2869. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2870. # Dump ENG Register
  2871. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2872. # Dump MISCOUT Register
  2873. DIR,RUN,MISC_WRITE,0xef
  2874. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2875. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2876. CLK_IND, RUN, FREQ_2, 0x50
  2877. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2878. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2879. CRT,RUN,LATCH_DATA, 0x00
  2880.  
  2881. [640,480,24,48,90]
  2882. # Unlock CRTC
  2883. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2884. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2885. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2886. # Dump CRT Controller Registers
  2887. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2888. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2889. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2890. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2891. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2892. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2893. CRT,RUN,MODE_CONTROL,0x02
  2894. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2895. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2896. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2897. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2898. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2899. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2900. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2901. # Lock CRTC Reg 11 for compatibility
  2902. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2903. # Dump ENG Register
  2904. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2905. # Dump MISCOUT Register
  2906. DIR,RUN,MISC_WRITE,0xef
  2907. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2908. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2909. CLK_IND, RUN, FREQ_2, 0x4d
  2910. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2911. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2912. CRT,RUN,LATCH_DATA, 0x00
  2913.  
  2914.  
  2915. [640,480,24,37,75]
  2916. # Unlock CRTC
  2917. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2918. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2919. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2920. # Dump CRT Controller Registers
  2921. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  2922. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2923. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2924. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  2925. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2926. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  2927. CRT,RUN,MODE_CONTROL,0x02
  2928. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2929. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2930. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2931. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2932. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2933. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2934. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2935. # Lock CRTC Reg 11 for compatibility
  2936. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2937. # Dump ENG Register
  2938. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2939. # Dump MISCOUT Register
  2940. DIR,RUN,MISC_WRITE,0xef
  2941. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2942. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2943. CLK_IND, RUN, FREQ_2, 0x39
  2944. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2945. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2946. CRT,RUN,LATCH_DATA, 0x00
  2947.  
  2948. [640,480,24,37,72]
  2949. # Unlock CRTC
  2950. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2951. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2952. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2953. # Dump CRT Controller Registers
  2954. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  2955. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2956. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2957. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2958. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2959. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2960. CRT,RUN,MODE_CONTROL,0x02
  2961. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2962. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2963. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2964. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2965. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2966. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2967. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2968. # Lock CRTC Reg 11 for compatibility
  2969. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2970. # Dump ENG Register
  2971. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2972. # Dump MISCOUT Register
  2973. DIR,RUN,MISC_WRITE,0xef
  2974. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2976. CLK_IND, RUN, FREQ_2, 0x3a
  2977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2979. CRT,RUN,LATCH_DATA, 0x00
  2980.  
  2981. [640,480,24,31,60]
  2982. # Unlock CRTC
  2983. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2984. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2985. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2986. # Dump CRT Controller Registers
  2987. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  2988. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2989. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2990. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  2991. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2992. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2993. CRT,RUN,MODE_CONTROL,0x02
  2994. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2995. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2996. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2997. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2998. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2999. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3000. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3001. # Lock CRTC Reg 11 for compatibility
  3002. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3003. # Dump ENG Register
  3004. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3005. # Dump MISCOUT Register
  3006. DIR,RUN,MISC_WRITE,0xef
  3007. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3008. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3009. CLK_IND, RUN, FREQ_2, 0x21
  3010. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3011. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3012. CRT,RUN,LATCH_DATA, 0x00
  3013.  
  3014. [640,480,16,64,120]
  3015. # Unlock CRTC
  3016. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3017. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3018. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3019. # Dump CRT Controller Registers
  3020. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3021. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3022. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3023. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3024. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3025. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3026. CRT,RUN,MODE_CONTROL,0x02
  3027. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3028. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3029. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3030. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3031. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3032. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3033. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3034. # Lock CRTC Reg 11 for compatibility
  3035. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3036. # Dump ENG Register
  3037. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3038. # Dump MISCOUT Register
  3039. DIR,RUN,MISC_WRITE,0xef
  3040. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3041. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3042. CLK_IND, RUN, FREQ_2, 0x67
  3043. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3044. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3045. CRT,RUN,LATCH_DATA, 0x00
  3046.  
  3047. [640,480,16,52,100]
  3048. # Unlock CRTC
  3049. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3050. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3051. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3052. # Dump CRT Controller Registers
  3053. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3054. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3055. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3056. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3057. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3058. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3059. CRT,RUN,MODE_CONTROL,0x02
  3060. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3061. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3062. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3063. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3064. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3065. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3066. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3067. # Lock CRTC Reg 11 for compatibility
  3068. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3069. # Dump ENG Register
  3070. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3071. # Dump MISCOUT Register
  3072. DIR,RUN,MISC_WRITE,0xef
  3073. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3074. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3075. CLK_IND, RUN, FREQ_2, 0x50
  3076. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3077. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3078. CRT,RUN,LATCH_DATA, 0x00
  3079.  
  3080. [640,480,16,48,90]
  3081. # Unlock CRTC
  3082. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3083. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3084. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3085. # Dump CRT Controller Registers
  3086. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3087. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3088. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3089. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3090. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3091. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3092. CRT,RUN,MODE_CONTROL,0x02
  3093. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3094. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3095. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3096. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3097. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3098. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3099. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3100. # Lock CRTC Reg 11 for compatibility
  3101. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3102. # Dump ENG Register
  3103. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3104. # Dump MISCOUT Register
  3105. DIR,RUN,MISC_WRITE,0xef
  3106. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3107. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3108. CLK_IND, RUN, FREQ_2, 0x4d
  3109. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3110. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3111. CRT,RUN,LATCH_DATA, 0x00
  3112.  
  3113. [640,480,16,37,75]
  3114. # Unlock CRTC
  3115. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3116. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3117. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3118. # Dump CRT Controller Registers
  3119. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3120. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3121. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3122. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3123. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3124. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3125. CRT,RUN,MODE_CONTROL,0x02
  3126. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3127. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3128. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3129. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3130. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3131. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3132. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3133. # Lock CRTC Reg 11 for compatibility
  3134. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3135. # Dump ENG Register
  3136. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3137. # Dump MISCOUT Register
  3138. DIR,RUN,MISC_WRITE,0xef
  3139. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3140. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3141. CLK_IND, RUN, FREQ_2, 0x3a
  3142. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3143. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3144. CRT,RUN,LATCH_DATA, 0x00
  3145.  
  3146. [640,480,16,37,72]
  3147. # Unlock CRTC
  3148. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3149. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3150. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3151. # Dump CRT Controller Registers
  3152. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3153. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3154. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3155. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3156. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3157. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3158. CRT,RUN,MODE_CONTROL,0x02
  3159. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3160. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3161. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3162. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3163. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3164. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3165. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3166. # Lock CRTC Reg 11 for compatibility
  3167. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3168. # Dump ENG Register
  3169. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3170. # Dump MISCOUT Register
  3171. DIR,RUN,MISC_WRITE,0xef
  3172. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3173. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3174. CLK_IND, RUN, FREQ_2, 0x3a
  3175. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3176. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3177. CRT,RUN,LATCH_DATA, 0x00
  3178.  
  3179. [640,480,16,31,60]
  3180. # Unlock CRTC
  3181. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3182. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3183. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3184. # Dump CRT Controller Registers
  3185. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3186. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3187. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3188. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3189. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3190. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3191. CRT,RUN,MODE_CONTROL,0x02
  3192. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3193. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3194. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3195. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3196. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3197. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3198. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3199. # Lock CRTC Reg 11 for compatibility
  3200. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3201. # Dump ENG Register
  3202. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3203. # Dump MISCOUT Register
  3204. DIR,RUN,MISC_WRITE,0xef
  3205. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3206. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3207. CLK_IND, RUN, FREQ_2, 0x21
  3208. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3209. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3210. CRT,RUN,LATCH_DATA, 0x00
  3211.  
  3212. [640,480,8,64,120]
  3213. # Unlock CRTC
  3214. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3215. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3216. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3217. # Dump CRT Controller Registers
  3218. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3219. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3220. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3221. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3222. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3223. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3224. CRT,RUN,MODE_CONTROL,0x02
  3225. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3226. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3227. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3228. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3229. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3230. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3231. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3232. # Lock CRTC Reg 11 for compatibility
  3233. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3234. # Dump ENG Register
  3235. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3236. # Dump MISCOUT Register
  3237. DIR,RUN,MISC_WRITE,0xef
  3238. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3239. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3240. CLK_IND, RUN, FREQ_2, 0x67
  3241. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3242. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3243. CRT,RUN,LATCH_DATA, 0x08
  3244.  
  3245. [640,480,8,52,100]
  3246. # Unlock CRTC
  3247. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3248. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3249. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3250. # Dump CRT Controller Registers
  3251. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3252. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3253. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3254. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3255. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3256. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3257. CRT,RUN,MODE_CONTROL,0x02
  3258. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3259. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3260. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3261. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3262. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3263. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3264. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3265. # Lock CRTC Reg 11 for compatibility
  3266. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3267. # Dump ENG Register
  3268. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3269. # Dump MISCOUT Register
  3270. DIR,RUN,MISC_WRITE,0xef
  3271. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3272. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3273. CLK_IND, RUN, FREQ_2, 0x50
  3274. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3275. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3276. CRT,RUN,LATCH_DATA, 0x08
  3277.  
  3278. [640,480,8,48,90]
  3279. # Unlock CRTC
  3280. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3281. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3282. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3283. # Dump CRT Controller Registers
  3284. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3285. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3286. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3287. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3288. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3289. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3290. CRT,RUN,MODE_CONTROL,0x02
  3291. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3292. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3293. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3294. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3295. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3296. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3297. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3298. # Lock CRTC Reg 11 for compatibility
  3299. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3300. # Dump ENG Register
  3301. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3302. # Dump MISCOUT Register
  3303. DIR,RUN,MISC_WRITE,0xef
  3304. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3305. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3306. CLK_IND, RUN, FREQ_2, 0x4d
  3307. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3308. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3309. CRT,RUN,LATCH_DATA, 0x08
  3310.  
  3311. [640,480,8,37,75]
  3312. # Unlock CRTC
  3313. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3314. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3315. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3316. # Dump CRT Controller Registers
  3317. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3318. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3319. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3320. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3321. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3322. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3323. CRT,RUN,MODE_CONTROL,0x02
  3324. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3325. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3326. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3327. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3328. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3329. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3330. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3331. # Lock CRTC Reg 11 for compatibility
  3332. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3333. # Dump ENG Register
  3334. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3335. # Dump MISCOUT Register
  3336. DIR,RUN,MISC_WRITE,0xef
  3337. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3338. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3339. CLK_IND, RUN, FREQ_2, 0x3a
  3340. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3341. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3342. CRT,RUN,LATCH_DATA, 0x08
  3343.  
  3344. [640,480,8,37,72]
  3345. # Unlock CRTC
  3346. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3347. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3348. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3349. # Dump CRT Controller Registers
  3350. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3351. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3352. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3353. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3354. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3355. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3356. CRT,RUN,MODE_CONTROL,0x02
  3357. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3358. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3359. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3360. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3361. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3362. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3363. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3364. # Lock CRTC Reg 11 for compatibility
  3365. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3366. # Dump ENG Register
  3367. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3368. # Dump MISCOUT Register
  3369. DIR,RUN,MISC_WRITE,0xef
  3370. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3371. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3372. CLK_IND, RUN, FREQ_2, 0x3a
  3373. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3374. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3375. CRT,RUN,LATCH_DATA, 0x08
  3376.  
  3377. [640,480,8,31,60]
  3378. # Unlock CRTC
  3379. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3380. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3381. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3382. # Dump CRT Controller Registers
  3383. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3384. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3385. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3386. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3387. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3388. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3389. CRT,RUN,MODE_CONTROL,0x02
  3390. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3391. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3392. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3393. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3394. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3395. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3396. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3397. # Lock CRTC Reg 11 for compatibility
  3398. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3399. # Dump ENG Register
  3400. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3401. # Dump MISCOUT Register
  3402. DIR,RUN,MISC_WRITE,0xef
  3403. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3404. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3405. CLK_IND, RUN, FREQ_2, 0x21
  3406. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3407. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3408. CRT,RUN,LATCH_DATA, 0x08
  3409.  
  3410.  
  3411.  
  3412.  
  3413.  
  3414.  
  3415.