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Text File  |  1996-05-28  |  155KB  |  4,481 lines
  1. #
  2. #    $Id: stl00017.da@ 2.18 1996/05/14 01:54:18 JIMK Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00017.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 4MB, IBM 526 175Mhz DAC.
  10. #
  11. #
  12.  
  13.  
  14.  
  15.  
  16. [Objects]
  17. Draweng32=s3x6832.drw
  18. Dac=ibm525.dac
  19. Cursor=ibm525.cur
  20. PixClk=ibm525.clk
  21. Draweng=s3x68.drw
  22.  
  23. [BoardInfo]
  24. wMinimumFormatBltWidth16bpp=8
  25. wMinimumFormatBltWidth32bpp=8
  26. bPixelFormatter=1
  27. bViewports=1
  28. bNewMMIO=1
  29. bTwoPtLine=1
  30. ValidateBAR=YES
  31. SwapVLA30A25=YES
  32.  
  33. [Desktops]
  34. 2048,1536,8
  35. 2048,768,8
  36. 1600,1200,16
  37. 1600,1200,8
  38. 1280,1024,24
  39. 1280,1024,16
  40. 1280,1024,8
  41. 1152,864,32
  42. 1152,864,24
  43. 1152,864,16
  44. 1152,864,8
  45. 1024,3072,8
  46. 1024,1536,16
  47. 1024,1536,8
  48. 1024,768,32
  49. 1024,768,24
  50. 1024,768,16
  51. 1024,768,8
  52. 800,600,32
  53. 800,600,24
  54. 800,600,16
  55. 800,600,8
  56. 640,480,32
  57. 640,480,24
  58. 640,480,16
  59. 640,480,8
  60.  
  61. [Viewports]
  62. 1600,1200,16,82,66
  63. 1600,1200,16,75,60
  64. 1600,1200,8,82,66
  65. 1600,1200,8,75,60
  66. 1280,1024,24,79,75
  67. 1280,1024,24,76,72
  68. 1280,1024,24,74,70
  69. 1280,1024,24,64,60
  70. 1280,1024,16,95,90
  71. 1280,1024,16,79,75
  72. 1280,1024,16,76,72
  73. 1280,1024,16,74,70
  74. 1280,1024,16,64,60
  75. 1280,1024,8,95,90
  76. 1280,1024,8,79,75
  77. 1280,1024,8,76,72
  78. 1280,1024,8,74,70
  79. 1280,1024,8,64,60
  80. 1152,864,32,64,70
  81. 1152,864,32,56,60
  82. 1152,864,24,64,70
  83. 1152,864,24,56,60
  84. 1152,864,16,82,90
  85. 1152,864,16,71,75
  86. 1152,864,16,64,70
  87. 1152,864,16,56,60
  88. 1152,864,8,82,90
  89. 1152,864,8,71,75
  90. 1152,864,8,64,70
  91. 1152,864,8,56,60
  92. 1024,768,32,64,80
  93. 1024,768,32,60,75
  94. 1024,768,32,58,72
  95. 1024,768,32,56,70
  96. 1024,768,32,48,60
  97. 1024,768,24,64,80
  98. 1024,768,24,60,75
  99. 1024,768,24,58,72
  100. 1024,768,24,56,70
  101. 1024,768,24,48,60
  102. 1024,768,16,96,120
  103. 1024,768,16,81,100
  104. 1024,768,16,64,80
  105. 1024,768,16,60,75
  106. 1024,768,16,58,72
  107. 1024,768,16,56,70
  108. 1024,768,16,48,60
  109. 1024,768,8,96,120
  110. 1024,768,8,81,100
  111. 1024,768,8,64,80
  112. 1024,768,8,60,75
  113. 1024,768,8,58,72
  114. 1024,768,8,56,70
  115. 1024,768,8,48,60
  116. 800,600,32,75,120
  117. 800,600,32,64,100
  118. 800,600,32,56,90
  119. 800,600,32,46,75
  120. 800,600,32,48,72
  121. 800,600,32,37,60
  122. 800,600,32,35,56
  123. 800,600,24,75,120
  124. 800,600,24,64,100
  125. 800,600,24,56,90
  126. 800,600,24,46,75
  127. 800,600,24,48,72
  128. 800,600,24,37,60
  129. 800,600,24,35,56
  130. 800,600,16,75,120
  131. 800,600,16,64,100
  132. 800,600,16,56,90
  133. 800,600,16,46,75
  134. 800,600,16,48,72
  135. 800,600,16,37,60
  136. 800,600,16,35,56
  137. 800,600,8,75,120
  138. 800,600,8,64,100
  139. 800,600,8,56,90
  140. 800,600,8,46,75
  141. 800,600,8,48,72
  142. 800,600,8,37,60
  143. 800,600,8,35,56
  144. 640,480,32,64,120
  145. 640,480,32,52,100
  146. 640,480,32,48,90
  147. 640,480,32,37,75
  148. 640,480,32,37,72
  149. 640,480,32,31,60
  150. 640,480,24,64,120
  151. 640,480,24,52,100
  152. 640,480,24,48,90
  153. 640,480,24,37,75
  154. 640,480,24,37,72
  155. 640,480,24,31,60
  156. 640,480,16,64,120
  157. 640,480,16,52,100
  158. 640,480,16,48,90
  159. 640,480,16,37,75
  160. 640,480,16,37,72
  161. 640,480,16,31,60
  162. 640,480,8,64,120
  163. 640,480,8,52,100
  164. 640,480,8,48,90
  165. 640,480,8,37,75
  166. 640,480,8,37,72
  167. 640,480,8,31,60
  168.  
  169. [TextMode]
  170. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  171. SHELL, I10, 0x0003,  0x0000
  172. CRT, RUN, REG_LOCK_1, 0x48
  173. CRT, RUN, REG_LOCK_2, 0xA5
  174.  
  175. [GraphicsEnable]
  176. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  177. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  178.  
  179. [GraphicsDisable]
  180. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  181. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  182.  
  183. [2048,1536,8]
  184. # Setting Line Pitch
  185. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  186. CRT,RUN,EXT_MODE,0x00
  187. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  188. # Setting Engine Pitch
  189. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  190. CRT,RUN,MEM_CONFIG,0x8f
  191. # Setting Basic Mode Registers.The registers
  192. # below are neither Desktop or Viewport Regs
  193. # Unlock Sequencer
  194. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  195. # Dump Sequencer Registers
  196. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  197. # Dump Graphics Controller Registers
  198. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  199. # Dump Attribute Controller Registers
  200. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  201. # Lock Sequencer
  202. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  203. DAC_IDR, RUN, DAC_OPERATION, 0x02
  204. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  205. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  206. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  207. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  208. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  209. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  210. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  211. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  212. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  213.  
  214. [2048,768,8]
  215. # Setting Line Pitch
  216. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  217. CRT,RUN,EXT_MODE,0x00
  218. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  219. # Setting Engine Pitch
  220. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  221. CRT,RUN,MEM_CONFIG,0x8f
  222. # Setting Basic Mode Registers.The registers
  223. # below are neither Desktop or Viewport Regs
  224. # Unlock Sequencer
  225. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  226. # Dump Sequencer Registers
  227. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  228. # Dump Graphics Controller Registers
  229. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  230. # Dump Attribute Controller Registers
  231. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  232. # Lock Sequencer
  233. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  234. DAC_IDR, RUN, DAC_OPERATION, 0x02
  235. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  236. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  237. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  238. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  239. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  240. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  241. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  242. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  243. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  244.  
  245. [1024,3072,8]
  246. # Setting Line Pitch
  247. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  248. CRT,RUN,EXT_MODE,0x00
  249. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  250. # Setting Engine Pitch
  251. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  252. CRT,RUN,MEM_CONFIG,0x09
  253. # Setting Basic Mode Registers.The registers
  254. # below are neither Desktop or Viewport Regs
  255. # Unlock Sequencer
  256. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  257. # Dump Sequencer Registers
  258. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  259. # Dump Graphics Controller Registers
  260. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  261. # Dump Attribute Controller Registers
  262. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  263. # Lock Sequencer
  264. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  265. DAC_IDR, RUN, DAC_OPERATION, 0x02
  266. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  267. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  268. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  269. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  270. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  271. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  272. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  273. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  274. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  275.  
  276. [1024,1536,8]
  277. # Setting Line Pitch
  278. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  279. CRT,RUN,EXT_MODE,0x00
  280. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  281. # Setting Engine Pitch
  282. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  283. CRT,RUN,MEM_CONFIG,0x09
  284. # Setting Basic Mode Registers.The registers
  285. # below are neither Desktop or Viewport Regs
  286. # Unlock Sequencer
  287. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  288. # Dump Sequencer Registers
  289. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  290. # Dump Graphics Controller Registers
  291. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  292. # Dump Attribute Controller Registers
  293. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  294. # Lock Sequencer
  295. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  296. DAC_IDR, RUN, DAC_OPERATION, 0x02
  297. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  298. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  299. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  300. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  301. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  302. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  303. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  304. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  305. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  306.  
  307. [1024,1536,16]
  308. # Setting Line Pitch
  309. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  310. CRT,RUN,EXT_MODE,0x00
  311. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  312. # Setting Engine Pitch
  313. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  314. CRT,RUN,MEM_CONFIG,0x89
  315. # Setting Basic Mode Registers.The registers
  316. # below are neither Desktop or Viewport Regs
  317. # Unlock Sequencer
  318. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  319. # Dump Sequencer Registers
  320. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  321. # Dump Graphics Controller Registers
  322. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  323. # Dump Attribute Controller Registers
  324. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  325. # Lock Sequencer
  326. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  327. DAC_IDR, RUN, DAC_OPERATION, 0x02
  328. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  329. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  330. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  331. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  332. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  333. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  334. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  335. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  336. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  337.  
  338. [1600,1200,16]
  339. # Setting Line Pitch
  340. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  341. CRT,RUN,EXT_MODE,0x00
  342. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  343. # Setting Engine Pitch
  344. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x91
  345. CRT,RUN,MEM_CONFIG,0x8b
  346. # Setting Basic Mode Registers.The registers
  347. # below are neither Desktop or Viewport Regs
  348. # Unlock Sequencer
  349. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  350. # Dump Sequencer Registers
  351. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  352. # Dump Graphics Controller Registers
  353. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  354. # Dump Attribute Controller Registers
  355. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  356. # Lock Sequencer
  357. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  358. DAC_IDR, RUN, DAC_OPERATION, 0x02
  359. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  360. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  361. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  362. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  363. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  364. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  365. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  366. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  367. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  368.  
  369. [1600,1200,8]
  370. # Setting Line Pitch
  371. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  372. CRT,RUN,EXT_MODE,0x00
  373. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  374. # Setting Engine Pitch
  375. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  376. CRT,RUN,MEM_CONFIG,0x8b
  377. # Setting Basic Mode Registers.The registers
  378. # below are neither Desktop or Viewport Regs
  379. # Unlock Sequencer
  380. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  381. # Dump Sequencer Registers
  382. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  383. # Dump Graphics Controller Registers
  384. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  385. # Dump Attribute Controller Registers
  386. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  387. # Lock Sequencer
  388. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  389. DAC_IDR, RUN, DAC_OPERATION, 0x02
  390. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  391. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  392. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  393. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  394. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  395. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  396. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  397. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  398. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  399.  
  400. [1280,1024,24]
  401. # Setting Line Pitch
  402. CRT,RUN,LOGICAL_LINE_LENGTH,0xe0
  403. CRT,RUN,EXT_MODE,0x00
  404. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  405. # Setting Engine Pitch
  406. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xe0
  407. CRT,RUN,MEM_CONFIG,0x8b
  408. # Setting Basic Mode Registers.The registers
  409. # below are neither Desktop or Viewport Regs
  410. # Unlock Sequencer
  411. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  412. # Dump Sequencer Registers
  413. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  414. # Dump Graphics Controller Registers
  415. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  416. # Dump Attribute Controller Registers
  417. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  418. # Lock Sequencer
  419. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  420. DAC_IDR, RUN, DAC_OPERATION, 0x02
  421. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  422. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  423. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  424. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  425. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  426. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  427. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  428. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  429. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  430.  
  431. [1280,1024,16]
  432. # Setting Line Pitch
  433. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  434. CRT,RUN,EXT_MODE,0x00
  435. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  436. # Setting Engine Pitch
  437. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xd0
  438. CRT,RUN,MEM_CONFIG,0x8b
  439. # Setting Basic Mode Registers.The registers
  440. # below are neither Desktop or Viewport Regs
  441. # Unlock Sequencer
  442. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  443. # Dump Sequencer Registers
  444. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  445. # Dump Graphics Controller Registers
  446. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  447. # Dump Attribute Controller Registers
  448. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  449. # Lock Sequencer
  450. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  451. DAC_IDR, RUN, DAC_OPERATION, 0x02
  452. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  453. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  454. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  455. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  456. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  457. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  458. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  459. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  460. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  461.  
  462. [1280,1024,8]
  463. # Setting Line Pitch
  464. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  465. CRT,RUN,EXT_MODE,0x00
  466. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  467. # Setting Engine Pitch
  468. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  469. CRT,RUN,MEM_CONFIG,0x0b
  470. # Setting Basic Mode Registers.The registers
  471. # below are neither Desktop or Viewport Regs
  472. # Unlock Sequencer
  473. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  474. # Dump Sequencer Registers
  475. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  476. # Dump Graphics Controller Registers
  477. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  478. # Dump Attribute Controller Registers
  479. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  480. # Lock Sequencer
  481. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  482. DAC_IDR, RUN, DAC_OPERATION, 0x02
  483. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  484. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  485. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  486. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  487. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  488. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  489. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  490. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  491. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  492.  
  493. [1152,864,32]
  494. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  495. CRT,RUN,EXT_MODE,0x00
  496. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  497. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x31
  498. CRT,RUN,MEM_CONFIG,0x89
  499. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  500. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  501. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  502. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  503. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  504. DAC_IDR, RUN, DAC_OPERATION, 0x02
  505. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  506. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  507. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  508. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  509. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  510. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  511. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  512. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  513. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  514.  
  515. [1152,864,24]
  516. # Setting Line Pitch
  517. CRT,RUN,LOGICAL_LINE_LENGTH,0xb0
  518. CRT,RUN,EXT_MODE,0x00
  519. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  520. # Setting Engine Pitch
  521. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x21
  522. CRT,RUN,MEM_CONFIG,0x8b
  523. # Setting Basic Mode Registers.The registers
  524. # below are neither Desktop or Viewport Regs
  525. # Unlock Sequencer
  526. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  527. # Dump Sequencer Registers
  528. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  529. # Dump Graphics Controller Registers
  530. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  531. # Dump Attribute Controller Registers
  532. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  533. # Lock Sequencer
  534. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  535. DAC_IDR, RUN, DAC_OPERATION, 0x02
  536. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  537. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  538. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  539. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  540. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  541. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  542. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  543. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  544. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  545.  
  546. [1152,864,16]
  547. # Setting Line Pitch
  548. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  549. CRT,RUN,EXT_MODE,0x00
  550. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  551. # Setting Engine Pitch
  552. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  553. CRT,RUN,MEM_CONFIG,0x8b
  554. # Setting Basic Mode Registers.The registers
  555. # below are neither Desktop or Viewport Regs
  556. # Unlock Sequencer
  557. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  558. # Dump Sequencer Registers
  559. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  560. # Dump Graphics Controller Registers
  561. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  562. # Dump Attribute Controller Registers
  563. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  564. # Lock Sequencer
  565. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  566. DAC_IDR, RUN, DAC_OPERATION, 0x02
  567. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  568. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  569. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  570. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  571. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  572. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  573. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  574. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  575. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  576.  
  577. [1152,864,8]
  578. # Setting Line Pitch
  579. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  580. CRT,RUN,EXT_MODE,0x00
  581. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  582. # Setting Engine Pitch
  583. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  584. CRT,RUN,MEM_CONFIG,0x89
  585. # Setting Basic Mode Registers.The registers
  586. # below are neither Desktop or Viewport Regs
  587. # Unlock Sequencer
  588. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  589. # Dump Sequencer Registers
  590. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  591. # Dump Graphics Controller Registers
  592. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  593. # Dump Attribute Controller Registers
  594. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  595. # Lock Sequencer
  596. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  597. DAC_IDR, RUN, DAC_OPERATION, 0x02
  598. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  599. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  600. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  601. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  602. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  603. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  604. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  605. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  606. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  607.  
  608. [1024,768,32]
  609. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  610. CRT,RUN,EXT_MODE,0x00
  611. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  612. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x30
  613. CRT,RUN,MEM_CONFIG,0x89
  614. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  615. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  616. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  617. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  618. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  619. DAC_IDR, RUN, DAC_OPERATION, 0x02
  620. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  621. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  622. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  623. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  624. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  625. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  626. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  627. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  628. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  629.  
  630. [1024,768,24]
  631. # Setting Line Pitch
  632. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  633. CRT,RUN,EXT_MODE,0x00
  634. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  635. # Setting Engine Pitch
  636. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x20
  637. CRT,RUN,MEM_CONFIG,0x89
  638. # Setting Basic Mode Registers.The registers
  639. # below are neither Desktop or Viewport Regs
  640. # Unlock Sequencer
  641. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  642. # Dump Sequencer Registers
  643. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  644. # Dump Graphics Controller Registers
  645. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  646. # Dump Attribute Controller Registers
  647. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  648. # Lock Sequencer
  649. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  650. DAC_IDR, RUN, DAC_OPERATION, 0x02
  651. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  652. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  653. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  654. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  655. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  656. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  657. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  658. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  659. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  660.  
  661. [1024,768,16]
  662. # Setting Line Pitch
  663. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  664. CRT,RUN,EXT_MODE,0x00
  665. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  666. # Setting Engine Pitch
  667. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  668. CRT,RUN,MEM_CONFIG,0x89
  669. # Setting Basic Mode Registers.The registers
  670. # below are neither Desktop or Viewport Regs
  671. # Unlock Sequencer
  672. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  673. # Dump Sequencer Registers
  674. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  675. # Dump Graphics Controller Registers
  676. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  677. # Dump Attribute Controller Registers
  678. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  679. # Lock Sequencer
  680. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  681. DAC_IDR, RUN, DAC_OPERATION, 0x02
  682. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  683. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  684. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  685. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  686. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  687. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  688. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  689. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  690. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  691.  
  692. [1024,768,8]
  693. # Setting Line Pitch
  694. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  695. CRT,RUN,EXT_MODE,0x00
  696. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  697. # Setting Engine Pitch
  698. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  699. CRT,RUN,MEM_CONFIG,0x09
  700. # Setting Basic Mode Registers.The registers
  701. # below are neither Desktop or Viewport Regs
  702. # Unlock Sequencer
  703. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  704. # Dump Sequencer Registers
  705. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  706. # Dump Graphics Controller Registers
  707. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  708. # Dump Attribute Controller Registers
  709. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  710. # Lock Sequencer
  711. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  712. DAC_IDR, RUN, DAC_OPERATION, 0x02
  713. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  714. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  715. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  716. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  717. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  718. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  719. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  720. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  721. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  722.  
  723. [800,600,32]
  724. # Setting Line Pitch
  725. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  726. CRT,RUN,EXT_MODE,0x00
  727. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  728. # Setting Engine Pitch
  729. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  730. CRT,RUN,MEM_CONFIG,0x8b
  731. # Setting Basic Mode Registers.The registers
  732. # below are neither Desktop or Viewport Regs
  733. # Unlock Sequencer
  734. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  735. # Dump Sequencer Registers
  736. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  737. # Dump Graphics Controller Registers
  738. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  739. # Dump Attribute Controller Registers
  740. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  741. # Lock Sequencer
  742. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  743. DAC_IDR, RUN, DAC_OPERATION, 0x02
  744. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  745. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  746. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  747. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  748. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  749. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  750. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  751. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  752. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  753.  
  754. [800,600,24]
  755. # Setting Line Pitch
  756. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  757. CRT,RUN,EXT_MODE,0x00
  758. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  759. # Setting Engine Pitch
  760. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  761. CRT,RUN,MEM_CONFIG,0x8b
  762. # Setting Basic Mode Registers.The registers
  763. # below are neither Desktop or Viewport Regs
  764. # Unlock Sequencer
  765. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  766. # Dump Sequencer Registers
  767. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  768. # Dump Graphics Controller Registers
  769. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  770. # Dump Attribute Controller Registers
  771. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  772. # Lock Sequencer
  773. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  774. DAC_IDR, RUN, DAC_OPERATION, 0x02
  775. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  776. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  777. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  778. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  779. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  780. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  781. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  782. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  783. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  784.  
  785. [800,600,16]
  786. # Setting Line Pitch
  787. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  788. CRT,RUN,EXT_MODE,0x00
  789. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  790. # Setting Engine Pitch
  791. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  792. CRT,RUN,MEM_CONFIG,0x8b
  793. # Setting Basic Mode Registers.The registers
  794. # below are neither Desktop or Viewport Regs
  795. # Unlock Sequencer
  796. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  797. # Dump Sequencer Registers
  798. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  799. # Dump Graphics Controller Registers
  800. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  801. # Dump Attribute Controller Registers
  802. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  803. # Lock Sequencer
  804. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  805. DAC_IDR, RUN, DAC_OPERATION, 0x02
  806. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  807. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  808. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  809. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  810. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  811. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  812. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  813. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  814. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  815.  
  816. [800,600,8]
  817. # Setting Line Pitch
  818. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  819. CRT,RUN,EXT_MODE,0x00
  820. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  821. # Setting Engine Pitch
  822. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  823. CRT,RUN,MEM_CONFIG,0x8b
  824. # Setting Basic Mode Registers.The registers
  825. # below are neither Desktop or Viewport Regs
  826. # Unlock Sequencer
  827. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  828. # Dump Sequencer Registers
  829. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  830. # Dump Graphics Controller Registers
  831. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  832. # Dump Attribute Controller Registers
  833. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  834. # Lock Sequencer
  835. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  836. DAC_IDR, RUN, DAC_OPERATION, 0x02
  837. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  838. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  839. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  840. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  841. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  842. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  843. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  844. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  845. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  846.  
  847. [640,480,32]
  848. # Setting Line Pitch
  849. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  850. CRT,RUN,EXT_MODE,0x00
  851. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  852. # Setting Engine Pitch
  853. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  854. CRT,RUN,MEM_CONFIG,0x8b
  855. # Setting Basic Mode Registers.The registers
  856. # below are neither Desktop or Viewport Regs
  857. # Unlock Sequencer
  858. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  859. # Dump Sequencer Registers
  860. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  861. # Dump Graphics Controller Registers
  862. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  863. # Dump Attribute Controller Registers
  864. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  865. # Lock Sequencer
  866. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  867. DAC_IDR, RUN, DAC_OPERATION, 0x02
  868. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  869. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  870. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  871. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  872. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  873. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  874. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  875. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  876. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  877.  
  878. [640,480,24]
  879. # Setting Line Pitch
  880. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  881. CRT,RUN,EXT_MODE,0x00
  882. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  883. # Setting Engine Pitch
  884. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  885. CRT,RUN,MEM_CONFIG,0x8b
  886. # Setting Basic Mode Registers.The registers
  887. # below are neither Desktop or Viewport Regs
  888. # Unlock Sequencer
  889. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  890. # Dump Sequencer Registers
  891. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  892. # Dump Graphics Controller Registers
  893. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  894. # Dump Attribute Controller Registers
  895. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  896. # Lock Sequencer
  897. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  898. DAC_IDR, RUN, DAC_OPERATION, 0x02
  899. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  900. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  901. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  902. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  903. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  904. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  905. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  906. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  907. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  908.  
  909.  
  910.  
  911. [640,480,16]
  912. # Setting Line Pitch
  913. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  914. CRT,RUN,EXT_MODE,0x00
  915. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  916. # Setting Engine Pitch
  917. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  918. CRT,RUN,MEM_CONFIG,0x8b
  919. # Setting Basic Mode Registers.The registers
  920. # below are neither Desktop or Viewport Regs
  921. # Unlock Sequencer
  922. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  923. # Dump Sequencer Registers
  924. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  925. # Dump Graphics Controller Registers
  926. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  927. # Dump Attribute Controller Registers
  928. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  929. # Lock Sequencer
  930. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  931. DAC_IDR, RUN, DAC_OPERATION, 0x02
  932. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  933. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  934. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  935. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  936. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  937. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  938. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  939. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  940. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  941.  
  942. [640,480,8]
  943. # Setting Line Pitch
  944. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  945. CRT,RUN,EXT_MODE,0x00
  946. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  947. # Setting Engine Pitch
  948. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  949. CRT,RUN,MEM_CONFIG,0x8b
  950. # Setting Basic Mode Registers.The registers
  951. # below are neither Desktop or Viewport Regs
  952. # Unlock Sequencer
  953. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  954. # Dump Sequencer Registers
  955. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  956. # Dump Graphics Controller Registers
  957. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  958. # Dump Attribute Controller Registers
  959. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  960. # Lock Sequencer
  961. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  962. DAC_IDR, RUN, DAC_OPERATION, 0x02
  963. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  964. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  965. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  966. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  967. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  968. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  969. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  970. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  971. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  972.  
  973.  
  974. [1600,1200,16,82,66]
  975. # Unlock CRTC
  976. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  977. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  978. CRT,RUN,REG_LOCK_1,0x48,0xa5
  979. # Dump CRT Controller Registers
  980. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  981. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  982. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  983. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  984. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  985. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  986. CRT,RUN,MODE_CONTROL,0x02
  987. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  988. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  989. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  990. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  991. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  992. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  993. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  994. # Lock CRTC Reg 11 for compatibility
  995. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  996. # Dump ENG Register
  997. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  998. # Dump MISCOUT Register
  999. DIR,RUN,MISC_WRITE,0xef
  1000. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1001. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1002. CLK_IND, RUN, FREQ_2, 0xd3
  1003. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1004. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1005. CRT,RUN,LATCH_DATA, 0x00
  1006.  
  1007. [1600,1200,16,75,60]
  1008. # Unlock CRTC
  1009. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1010. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1011. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1012. # Dump CRT Controller Registers
  1013. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1014. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1015. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1016. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1017. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1018. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1019. CRT,RUN,MODE_CONTROL,0x02
  1020. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1021. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1022. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1023. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1024. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1025. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1026. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1027. # Lock CRTC Reg 11 for compatibility
  1028. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1029. # Dump ENG Register
  1030. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1031. # Dump MISCOUT Register
  1032. DIR,RUN,MISC_WRITE,0xef
  1033. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1034. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1035. CLK_IND, RUN, FREQ_2, 0xcd
  1036. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1037. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1038. CRT,RUN,LATCH_DATA, 0x00
  1039.  
  1040.  
  1041. [1600,1200,8,82,66]
  1042. # Unlock CRTC
  1043. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1044. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1045. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1046. # Dump CRT Controller Registers
  1047. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1048. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1049. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1050. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1051. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1052. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1053. CRT,RUN,MODE_CONTROL,0x02
  1054. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1055. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1056. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1057. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1058. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1059. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1060. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1061. # Lock CRTC Reg 11 for compatibility
  1062. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1063. # Dump ENG Register
  1064. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1065. # Dump MISCOUT Register
  1066. DIR,RUN,MISC_WRITE,0xef
  1067. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1068. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1069. CLK_IND, RUN, FREQ_2, 0xd3
  1070. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1071. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1072. CRT,RUN,LATCH_DATA, 0x08
  1073.  
  1074. [1600,1200,8,75,60]
  1075. # Unlock CRTC
  1076. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1077. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1078. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1079. # Dump CRT Controller Registers
  1080. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1081. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1082. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1083. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1084. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1085. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1086. CRT,RUN,MODE_CONTROL,0x02
  1087. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1088. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1089. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1090. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1091. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1092. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1093. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1094. # Lock CRTC Reg 11 for compatibility
  1095. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1096. # Dump ENG Register
  1097. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1098. # Dump MISCOUT Register
  1099. DIR,RUN,MISC_WRITE,0xef
  1100. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1101. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1102. CLK_IND, RUN, FREQ_2, 0xcd
  1103. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1104. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1105. CRT,RUN,LATCH_DATA, 0x08
  1106.  
  1107. [1280,1024,24,79,75]
  1108. # Unlock CRTC
  1109. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1110. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1111. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1112. # Dump CRT Controller Registers
  1113. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7b,0x03,0x29,0x42,0x00,0x40
  1114. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1115. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1116. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x03,0xe3,0xff
  1117. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1118. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1119. CRT,RUN,MODE_CONTROL,0x02
  1120. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1121. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1122. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1123. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1124. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1125. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1126. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1127. # Lock CRTC Reg 11 for compatibility
  1128. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1129. # Dump ENG Register
  1130. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1131. # Dump MISCOUT Register
  1132. DIR,RUN,MISC_WRITE,0xef
  1133. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1134. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1135. CLK_IND, RUN, FREQ_2, 0xc1
  1136. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1137. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1138. CRT,RUN,LATCH_DATA, 0x00
  1139.  
  1140. [1280,1024,24,76,72]
  1141. # Unlock CRTC
  1142. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1143. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1144. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1145. # Dump CRT Controller Registers
  1146. CRT,RUN,HORZ_TOTAL,0xa0,0x77,0x78,0x84,0x7c,0x04,0x2c,0x42,0x00,0x40
  1147. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1148. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1149. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x06,0xe3,0xff
  1150. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1151. CRT,RUN,MISC_1,0x15,0x9a,0x28,0x11
  1152. CRT,RUN,MODE_CONTROL,0x02
  1153. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1154. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1155. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1156. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1157. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1158. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1159. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1160. # Lock CRTC Reg 11 for compatibility
  1161. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1162. # Dump ENG Register
  1163. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1164. # Dump MISCOUT Register
  1165. DIR,RUN,MISC_WRITE,0xef
  1166. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1167. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1168. CLK_IND, RUN, FREQ_2, 0xc1
  1169. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1170. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1171. CRT,RUN,LATCH_DATA, 0x00
  1172.  
  1173. [1280,1024,24,74,70]
  1174. # Unlock CRTC
  1175. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1176. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1177. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1178. # Dump CRT Controller Registers
  1179. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x80,0x0a,0x28,0x52,0x00,0x40
  1180. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1181. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1182. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1183. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1184. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1185. CRT,RUN,MODE_CONTROL,0x02
  1186. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1187. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1188. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1189. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1190. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1191. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1192. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1193. # Lock CRTC Reg 11 for compatibility
  1194. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1195. # Dump ENG Register
  1196. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1197. # Dump MISCOUT Register
  1198. DIR,RUN,MISC_WRITE,0xef
  1199. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1200. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1201. CLK_IND, RUN, FREQ_2, 0xba
  1202. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1203. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1204. CRT,RUN,LATCH_DATA, 0x00
  1205.  
  1206. [1280,1024,24,64,60]
  1207. # Unlock CRTC
  1208. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1209. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1210. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1211. # Dump CRT Controller Registers
  1212. ##CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x05,0x34,0x42,0x00,0x40
  1213. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x08,0x28,0x52,0x00,0x40
  1214. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1215. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1216. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1217. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1218. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1219. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1220. CRT,RUN,MISC_1,0x15,0x95,0x28,0x11
  1221. CRT,RUN,MODE_CONTROL,0x02
  1222. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1223. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1224. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1225. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1226. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1227. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1228. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1229. # Lock CRTC Reg 11 for compatibility
  1230. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1231. # Dump ENG Register
  1232. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1233. # Dump MISCOUT Register
  1234. DIR,RUN,MISC_WRITE,0xef
  1235. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1236. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1237. ##CLK_IND, RUN, FREQ_2, 0xab
  1238. CLK_IND, RUN, FREQ_2, 0xa9
  1239. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1240. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1241. CRT,RUN,LATCH_DATA, 0x00
  1242.  
  1243. [1280,1024,16,95,90]
  1244. # Unlock CRTC
  1245. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1246. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1247. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1248. # Dump CRT Controller Registers
  1249. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1250. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1251. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1252. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1253. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1254. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1255. CRT,RUN,MODE_CONTROL,0x02
  1256. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1257. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1258. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1259. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1260. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1261. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1262. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1263. # Lock CRTC Reg 11 for compatibility
  1264. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1265. # Dump ENG Register
  1266. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1267. # Dump MISCOUT Register
  1268. DIR,RUN,MISC_WRITE,0xef
  1269. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1270. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1271. CLK_IND, RUN, FREQ_2, 0xd0
  1272. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1273. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1274. CRT,RUN,LATCH_DATA, 0x00
  1275.  
  1276. [1280,1024,16,79,75]
  1277. # Unlock CRTC
  1278. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1279. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1280. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1281. # Dump CRT Controller Registers
  1282. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1283. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1284. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1285. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1286. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1287. CRT,RUN,MISC_1,0x15,0x5e,0x33,0x11
  1288. CRT,RUN,MODE_CONTROL,0x02
  1289. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1290. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1291. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1292. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1293. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1294. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1295. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1296. # Lock CRTC Reg 11 for compatibility
  1297. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1298. # Dump ENG Register
  1299. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1300. # Dump MISCOUT Register
  1301. DIR,RUN,MISC_WRITE,0xef
  1302. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1303. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1304. CLK_IND, RUN, FREQ_2, 0xc1
  1305. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1306. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1307. CRT,RUN,LATCH_DATA, 0x00
  1308.  
  1309. [1280,1024,16,76,72]
  1310. # Unlock CRTC
  1311. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1312. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1313. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1314. # Dump CRT Controller Registers
  1315. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1316. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1317. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1318. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1319. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1320. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1321. CRT,RUN,MODE_CONTROL,0x02
  1322. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1323. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1324. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1325. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1326. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1327. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1328. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1329. # Lock CRTC Reg 11 for compatibility
  1330. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1331. # Dump ENG Register
  1332. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1333. # Dump MISCOUT Register
  1334. DIR,RUN,MISC_WRITE,0xef
  1335. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1336. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1337. CLK_IND, RUN, FREQ_2, 0xc1
  1338. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1339. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1340. CRT,RUN,LATCH_DATA, 0x00
  1341.  
  1342. [1280,1024,16,74,70]
  1343. # Unlock CRTC
  1344. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1345. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1346. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1347. # Dump CRT Controller Registers
  1348. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x56,0x9d,0x28,0x52,0x00,0x40
  1349. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1350. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1351. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1352. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1353. CRT,RUN,MISC_1,0x15,0x60,0x33,0x11
  1354. CRT,RUN,MODE_CONTROL,0x02
  1355. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1356. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1357. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1358. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1359. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1360. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1361. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1362. # Lock CRTC Reg 11 for compatibility
  1363. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1364. # Dump ENG Register
  1365. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1366. # Dump MISCOUT Register
  1367. DIR,RUN,MISC_WRITE,0xef
  1368. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1369. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1370. CLK_IND, RUN, FREQ_2, 0xba
  1371. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1372. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1373. CRT,RUN,LATCH_DATA, 0x00
  1374.  
  1375. [1280,1024,16,64,60]
  1376. # Unlock CRTC
  1377. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1378. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1379. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1380. # Dump CRT Controller Registers
  1381. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1382. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x53,0x9a,0x28,0x52,0x00,0x40
  1383. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1384. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1385. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1386. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1387. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1388. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1389. ##CRT,RUN,MISC_1,0x15,0x5f,0x33,0x11
  1390. CRT,RUN,MISC_1,0x15,0x60,0x33,0x11
  1391. CRT,RUN,MODE_CONTROL,0x02
  1392. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1393. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1394. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1395. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1396. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1397. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1398. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1399. # Lock CRTC Reg 11 for compatibility
  1400. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1401. # Dump ENG Register
  1402. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1403. # Dump MISCOUT Register
  1404. DIR,RUN,MISC_WRITE,0xef
  1405. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1406. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1407. ##CLK_IND, RUN, FREQ_2, 0xab
  1408. CLK_IND, RUN, FREQ_2, 0xa9
  1409. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1410. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1411. CRT,RUN,LATCH_DATA, 0x00
  1412.  
  1413. [1280,1024,8,95,90]
  1414. # Unlock CRTC
  1415. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1416. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1417. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1418. # Dump CRT Controller Registers
  1419. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  1420. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1421. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1422. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1423. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1424. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1425. CRT,RUN,MODE_CONTROL,0x02
  1426. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1427. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1428. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1429. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1430. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1431. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1432. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1433. # Lock CRTC Reg 11 for compatibility
  1434. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1435. # Dump ENG Register
  1436. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1437. # Dump MISCOUT Register
  1438. DIR,RUN,MISC_WRITE,0xef
  1439. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1440. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1441. CLK_IND, RUN, FREQ_2, 0xd0
  1442. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1443. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1444. CRT,RUN,LATCH_DATA, 0x08
  1445.  
  1446. [1280,1024,8,79,75]
  1447. # Unlock CRTC
  1448. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1449. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1450. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1451. # Dump CRT Controller Registers
  1452. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  1453. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1454. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1455. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1456. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1457. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  1458. CRT,RUN,MODE_CONTROL,0x02
  1459. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1460. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1461. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1462. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1463. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1464. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1465. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1466. # Lock CRTC Reg 11 for compatibility
  1467. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1468. # Dump ENG Register
  1469. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1470. # Dump MISCOUT Register
  1471. DIR,RUN,MISC_WRITE,0xef
  1472. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1473. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1474. CLK_IND, RUN, FREQ_2, 0xc1
  1475. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1476. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1477. CRT,RUN,LATCH_DATA, 0x08
  1478.  
  1479. [1280,1024,8,76,72]
  1480. # Unlock CRTC
  1481. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1482. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1483. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1484. # Dump CRT Controller Registers
  1485. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  1486. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1487. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1488. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1489. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1490. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1491. CRT,RUN,MODE_CONTROL,0x02
  1492. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1493. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1494. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1495. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1496. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1497. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1498. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1499. # Lock CRTC Reg 11 for compatibility
  1500. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1501. # Dump ENG Register
  1502. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1503. # Dump MISCOUT Register
  1504. DIR,RUN,MISC_WRITE,0xef
  1505. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1506. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1507. CLK_IND, RUN, FREQ_2, 0xc1
  1508. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1509. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1510. CRT,RUN,LATCH_DATA, 0x08
  1511.  
  1512. [1280,1024,8,74,70]
  1513. # Unlock CRTC
  1514. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1515. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1516. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1517. # Dump CRT Controller Registers
  1518. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x81,0x28,0x52,0x00,0x40
  1519. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1520. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1521. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1522. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1523. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  1524. CRT,RUN,MODE_CONTROL,0x02
  1525. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1526. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1527. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1528. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1529. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1530. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1531. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1532. # Lock CRTC Reg 11 for compatibility
  1533. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1534. # Dump ENG Register
  1535. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1536. # Dump MISCOUT Register
  1537. DIR,RUN,MISC_WRITE,0xef
  1538. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1539. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1540. CLK_IND, RUN, FREQ_2, 0xba
  1541. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1542. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1543. CRT,RUN,LATCH_DATA, 0x08
  1544.  
  1545. [1280,1024,8,64,60]
  1546. # Unlock CRTC
  1547. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1548. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1549. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1550. # Dump CRT Controller Registers
  1551. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  1552. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1553. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1554. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1555. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1556. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1557. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1558. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  1559. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  1560. CRT,RUN,MODE_CONTROL,0x02
  1561. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1562. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1563. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1564. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1565. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1566. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1567. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1568. # Lock CRTC Reg 11 for compatibility
  1569. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1570. # Dump ENG Register
  1571. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1572. # Dump MISCOUT Register
  1573. DIR,RUN,MISC_WRITE,0xef
  1574. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1575. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1576. ##CLK_IND, RUN, FREQ_2, 0xab
  1577. CLK_IND, RUN, FREQ_2, 0xa9
  1578. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1579. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1580. CRT,RUN,LATCH_DATA, 0x08
  1581.  
  1582. [1152,864,32,64,70]
  1583. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1584. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1585. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1586. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1587. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1588. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1589. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1590. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1591. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1592. CRT,RUN,MODE_CONTROL,0x02
  1593. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1594. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1595. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1596. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1597. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1598. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1599. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1600. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1601. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1602. DIR,RUN,MISC_WRITE,0x2f
  1603. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1604. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1605. CLK_IND, RUN, FREQ_2, 0x9b
  1606. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1607. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1608. CRT,RUN,LATCH_DATA, 0x00
  1609.  
  1610. [1152,864,32,56,60]
  1611. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1612. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1613. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1614. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1615. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1616. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1617. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1618. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1619. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1620. CRT,RUN,MODE_CONTROL,0x02
  1621. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1622. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1623. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1624. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1625. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1626. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1627. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1628. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1629. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1630. DIR,RUN,MISC_WRITE,0x2f
  1631. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1632. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1633. CLK_IND, RUN, FREQ_2, 0x90
  1634. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1635. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1636. CRT,RUN,LATCH_DATA, 0x00
  1637.  
  1638.  
  1639.  
  1640. [1152,864,24,64,70]
  1641. # Unlock CRTC
  1642. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1643. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1644. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1645. # Dump CRT Controller Registers
  1646. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x16,0x92,0xff,0x00,0x60
  1647. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1648. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1649. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x7d,0xeb,0xff
  1650. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1651. CRT,RUN,MISC_1,0x15,0x7f,0x9f,0x11
  1652. CRT,RUN,MODE_CONTROL,0x02
  1653. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1654. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1655. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1656. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1657. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1658. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1659. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1660. # Lock CRTC Reg 11 for compatibility
  1661. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1662. # Dump ENG Register
  1663. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1664. # Dump MISCOUT Register
  1665. DIR,RUN,MISC_WRITE,0xef
  1666. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1667. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1668. CLK_IND, RUN, FREQ_2, 0x9b
  1669. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1670. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1671. CRT,RUN,LATCH_DATA, 0x00
  1672.  
  1673. [1152,864,24,56,60]
  1674. # Unlock CRTC
  1675. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1676. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1677. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1678. # Dump CRT Controller Registers
  1679. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6e,0x14,0xac,0xff,0x00,0x60
  1680. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1681. CRT,RUN,VERT_RETRACE_START,0x77,0x00,0x5f
  1682. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x99,0xeb,0xff
  1683. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1684. CRT,RUN,MISC_1,0x15,0x7f,0x3d,0x11
  1685. CRT,RUN,MODE_CONTROL,0x02
  1686. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1687. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1688. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1689. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1690. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1691. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1692. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1693. # Lock CRTC Reg 11 for compatibility
  1694. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1695. # Dump ENG Register
  1696. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1697. # Dump MISCOUT Register
  1698. DIR,RUN,MISC_WRITE,0xef
  1699. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1700. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1701. CLK_IND, RUN, FREQ_2, 0x90
  1702. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1703. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1704. CRT,RUN,LATCH_DATA, 0x00
  1705.  
  1706. [1152,864,16,82,90]
  1707. # Unlock CRTC
  1708. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1709. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1710. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1711. # Dump CRT Controller Registers
  1712. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1713. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1714. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1715. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1716. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1717. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1718. CRT,RUN,MODE_CONTROL,0x02
  1719. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1720. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1721. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1722. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1723. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1724. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1725. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1726. # Lock CRTC Reg 11 for compatibility
  1727. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1728. # Dump ENG Register
  1729. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1730. # Dump MISCOUT Register
  1731. DIR,RUN,MISC_WRITE,0xef
  1732. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1733. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1734. CLK_IND, RUN, FREQ_2, 0xb9
  1735. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1736. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1737. CRT,RUN,LATCH_DATA, 0x00
  1738.  
  1739. [1152,864,16,71,75]
  1740. # Unlock CRTC
  1741. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1742. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1743. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1744. # Dump CRT Controller Registers
  1745. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1746. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1747. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1748. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1749. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1750. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1751. CRT,RUN,MODE_CONTROL,0x02
  1752. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1753. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1754. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1755. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1756. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1757. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1758. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1759. # Lock CRTC Reg 11 for compatibility
  1760. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1761. # Dump ENG Register
  1762. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1763. # Dump MISCOUT Register
  1764. DIR,RUN,MISC_WRITE,0xef
  1765. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1766. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1767. CLK_IND, RUN, FREQ_2, 0xa9
  1768. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1769. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1770. CRT,RUN,LATCH_DATA, 0x00
  1771.  
  1772. [1152,864,16,64,70]
  1773. # Unlock CRTC
  1774. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1775. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1776. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1777. # Dump CRT Controller Registers
  1778. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1779. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1780. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1781. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1782. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1783. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1784. CRT,RUN,MODE_CONTROL,0x02
  1785. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1786. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1787. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1788. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1789. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1790. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1791. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1792. # Lock CRTC Reg 11 for compatibility
  1793. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1794. # Dump ENG Register
  1795. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1796. # Dump MISCOUT Register
  1797. DIR,RUN,MISC_WRITE,0xef
  1798. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1799. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1800. CLK_IND, RUN, FREQ_2, 0x9b
  1801. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1802. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1803. CRT,RUN,LATCH_DATA, 0x00
  1804.  
  1805. [1152,864,16,56,60]
  1806. # Unlock CRTC
  1807. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1808. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1809. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1810. # Dump CRT Controller Registers
  1811. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1812. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1813. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1814. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1815. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1816. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1817. CRT,RUN,MODE_CONTROL,0x02
  1818. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1819. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1820. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1821. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1822. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1823. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1824. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1825. # Lock CRTC Reg 11 for compatibility
  1826. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1827. # Dump ENG Register
  1828. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1829. # Dump MISCOUT Register
  1830. DIR,RUN,MISC_WRITE,0xef
  1831. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1832. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1833. CLK_IND, RUN, FREQ_2, 0x90
  1834. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1835. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1836. CRT,RUN,LATCH_DATA, 0x00
  1837.  
  1838. [1152,864,8,82,90]
  1839. # Unlock CRTC
  1840. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1841. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1842. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1843. # Dump CRT Controller Registers
  1844. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4f,0x13,0x95,0xff,0x00,0x60
  1845. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1846. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1847. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1848. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1849. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1850. CRT,RUN,MODE_CONTROL,0x02
  1851. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1852. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1853. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1854. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1855. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1856. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1857. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1858. # Lock CRTC Reg 11 for compatibility
  1859. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1860. # Dump ENG Register
  1861. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1862. # Dump MISCOUT Register
  1863. DIR,RUN,MISC_WRITE,0xef
  1864. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1865. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1866. CLK_IND, RUN, FREQ_2, 0xb9
  1867. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1868. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1869. CRT,RUN,LATCH_DATA, 0x08
  1870.  
  1871. [1152,864,8,71,75]
  1872. # Unlock CRTC
  1873. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1874. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1875. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1876. # Dump CRT Controller Registers
  1877. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  1878. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1879. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1880. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1881. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1882. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1883. CRT,RUN,MODE_CONTROL,0x02
  1884. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1885. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1886. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1887. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1888. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1889. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1890. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1891. # Lock CRTC Reg 11 for compatibility
  1892. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1893. # Dump ENG Register
  1894. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1895. # Dump MISCOUT Register
  1896. DIR,RUN,MISC_WRITE,0xef
  1897. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1898. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1899. CLK_IND, RUN, FREQ_2, 0xa9
  1900. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1901. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1902. CRT,RUN,LATCH_DATA, 0x08
  1903.  
  1904. [1152,864,8,64,70]
  1905. # Unlock CRTC
  1906. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1907. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1908. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1909. # Dump CRT Controller Registers
  1910. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  1911. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1912. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1913. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1914. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1915. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1916. CRT,RUN,MODE_CONTROL,0x02
  1917. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1918. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1919. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1920. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1921. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1922. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1923. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1924. # Lock CRTC Reg 11 for compatibility
  1925. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1926. # Dump ENG Register
  1927. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1928. # Dump MISCOUT Register
  1929. DIR,RUN,MISC_WRITE,0xef
  1930. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1931. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1932. CLK_IND, RUN, FREQ_2, 0x9b
  1933. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1934. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1935. CRT,RUN,LATCH_DATA, 0x08
  1936.  
  1937. [1152,864,8,56,60]
  1938. # Unlock CRTC
  1939. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1940. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1941. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1942. # Dump CRT Controller Registers
  1943. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  1944. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1945. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1946. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1947. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1948. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1949. CRT,RUN,MODE_CONTROL,0x02
  1950. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1951. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1952. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1953. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1954. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1955. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1956. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1957. # Lock CRTC Reg 11 for compatibility
  1958. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1959. # Dump ENG Register
  1960. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1961. # Dump MISCOUT Register
  1962. DIR,RUN,MISC_WRITE,0xef
  1963. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1964. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1965. CLK_IND, RUN, FREQ_2, 0x90
  1966. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1967. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1968. CRT,RUN,LATCH_DATA, 0x08
  1969.  
  1970.  
  1971. [1024,768,32,64,80]
  1972. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1973. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1974. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1975. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1976. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1977. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1978. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1979. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1980. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1981. CRT,RUN,MODE_CONTROL,0x02
  1982. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1983. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1984. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1985. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1986. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1987. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1988. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1989. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1990. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1991. DIR,RUN,MISC_WRITE,0x2f
  1992. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1993. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1994. CLK_IND, RUN, FREQ_2, 0x93
  1995. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1996. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1997. CRT,RUN,LATCH_DATA, 0x00
  1998.  
  1999. [1024,768,32,60,75]
  2000. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2001. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2002. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2003. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2004. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2005. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2006. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2007. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2008. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2009. CRT,RUN,MODE_CONTROL,0x02
  2010. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2011. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2012. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2013. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2014. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2015. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2016. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2017. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2018. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2019. DIR,RUN,MISC_WRITE,0x2f
  2020. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2021. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2022. CLK_IND, RUN, FREQ_2, 0x8c
  2023. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2024. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2025. CRT,RUN,LATCH_DATA, 0x00
  2026.  
  2027. [1024,768,32,58,72]
  2028. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2029. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2030. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2031. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2032. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2033. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2034. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2035. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2036. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2037. CRT,RUN,MODE_CONTROL,0x02
  2038. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2039. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2040. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2041. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2042. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2043. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2044. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2045. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2046. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2047. DIR,RUN,MISC_WRITE,0x2f
  2048. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2049. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2050. CLK_IND, RUN, FREQ_2, 0x88
  2051. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2052. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2053. CRT,RUN,LATCH_DATA, 0x00
  2054.  
  2055. [1024,768,32,56,70]
  2056. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2057. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2058. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2059. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2060. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2061. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2062. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2063. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2064. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2065. CRT,RUN,MODE_CONTROL,0x02
  2066. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2067. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2068. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2069. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2070. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2071. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2072. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2073. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2074. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2075. DIR,RUN,MISC_WRITE,0x2f
  2076. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2077. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2078. CLK_IND, RUN, FREQ_2, 0x88
  2079. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2080. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2081. CRT,RUN,LATCH_DATA, 0x00
  2082.  
  2083. [1024,768,32,48,60]
  2084. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2085. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2086. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2087. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2088. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2089. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2090. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2091. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2092. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2093. CRT,RUN,MODE_CONTROL,0x02
  2094. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2095. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2096. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2097. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2098. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2099. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2100. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2101. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2102. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2103. DIR,RUN,MISC_WRITE,0x2f
  2104. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2105. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2106. CLK_IND, RUN, FREQ_2, 0x7e
  2107. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2108. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2109. CRT,RUN,LATCH_DATA, 0x00
  2110.  
  2111. [1024,768,24,64,80]
  2112. # Unlock CRTC
  2113. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2114. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2115. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2116. # Dump CRT Controller Registers
  2117. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x68,0x91,0x1f,0xf5,0x00,0x60
  2118. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2119. CRT,RUN,VERT_RETRACE_START,0x00,0x0e,0xff
  2120. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xeb,0xff
  2121. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2122. CRT,RUN,MISC_1,0x15,0x70,0x3d,0x11
  2123. CRT,RUN,MODE_CONTROL,0x02
  2124. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2125. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2126. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2127. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2128. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2129. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2130. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2131. # Lock CRTC Reg 11 for compatibility
  2132. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2133. # Dump ENG Register
  2134. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2135. # Dump MISCOUT Register
  2136. DIR,RUN,MISC_WRITE,0xef
  2137. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2138. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2139. CLK_IND, RUN, FREQ_2, 0x93
  2140. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2141. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2142. CRT,RUN,LATCH_DATA, 0x00
  2143.  
  2144. [1024,768,24,60,75]
  2145. # Unlock CRTC
  2146. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2147. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2148. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2149. # Dump CRT Controller Registers
  2150. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x99,0x62,0x8f,0x1e,0xf1,0x00,0x60
  2151. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2152. CRT,RUN,VERT_RETRACE_START,0xff,0x05,0xff
  2153. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xeb,0xff
  2154. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2155. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2156. CRT,RUN,MODE_CONTROL,0x02
  2157. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2158. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2159. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2160. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2161. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2162. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2163. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2164. # Lock CRTC Reg 11 for compatibility
  2165. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2166. # Dump ENG Register
  2167. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2168. # Dump MISCOUT Register
  2169. DIR,RUN,MISC_WRITE,0xef
  2170. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2171. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2172. CLK_IND, RUN, FREQ_2, 0x8c
  2173. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2174. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2175. CRT,RUN,LATCH_DATA, 0x00
  2176.  
  2177.  
  2178. [1024,768,24,58,72]
  2179. # Unlock CRTC
  2180. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2181. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2182. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2183. # Dump CRT Controller Registers
  2184. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x9a,0x63,0x8c,0x19,0xf5,0x00,0x60
  2185. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2186. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2187. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x11,0xeb,0xff
  2188. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2189. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2190. CRT,RUN,MODE_CONTROL,0x02
  2191. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2192. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2193. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2194. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2195. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2196. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2197. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2198. # Lock CRTC Reg 11 for compatibility
  2199. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2200. # Dump ENG Register
  2201. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2202. # Dump MISCOUT Register
  2203. DIR,RUN,MISC_WRITE,0xef
  2204. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2205. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2206. CLK_IND, RUN, FREQ_2, 0x88
  2207. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2208. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2209. CRT,RUN,LATCH_DATA, 0x00
  2210.  
  2211. [1024,768,24,56,70]
  2212. # Unlock CRTC
  2213. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2214. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2215. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2216. # Dump CRT Controller Registers
  2217. ##CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x1b,0x61,0x8e,0x2a,0xf5,0x00,0x60
  2218. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x63,0x90,0x24,0xfd,0x00,0x60
  2219. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2220. ##CRT,RUN,VERT_RETRACE_START,0x03,0x09,0xff
  2221. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2222. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x2a,0xeb,0xff
  2223. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x25,0xeb,0xff
  2224. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2225. ##CRT,RUN,MISC_1,0x15,0x71,0x21,0x11
  2226. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2227. CRT,RUN,MODE_CONTROL,0x02
  2228. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2229. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2230. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2231. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2232. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2233. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2234. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2235. # Lock CRTC Reg 11 for compatibility
  2236. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2237. # Dump ENG Register
  2238. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2239. # Dump MISCOUT Register
  2240. DIR,RUN,MISC_WRITE,0xef
  2241. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2242. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2243. ##CLK_IND, RUN, FREQ_2, 0x88
  2244. CLK_IND, RUN, FREQ_2, 0x89
  2245. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2246. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2247. CRT,RUN,LATCH_DATA, 0x00
  2248.  
  2249. [1024,768,24,48,60]
  2250. # Unlock CRTC
  2251. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2252. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2253. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2254. # Dump CRT Controller Registers
  2255. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x62,0x8f,0x24,0xf5,0x00,0x60
  2256. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2257. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2258. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xeb,0xff
  2259. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2260. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2261. CRT,RUN,MODE_CONTROL,0x02
  2262. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2263. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2264. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2265. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2266. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2267. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2268. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2269. # Lock CRTC Reg 11 for compatibility
  2270. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2271. # Dump ENG Register
  2272. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2273. # Dump MISCOUT Register
  2274. DIR,RUN,MISC_WRITE,0xef
  2275. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2276. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2277. CLK_IND, RUN, FREQ_2, 0x7e
  2278. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2279. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2280. CRT,RUN,LATCH_DATA, 0x00
  2281.  
  2282. [1024,768,16,96,120]
  2283. # Unlock CRTC
  2284. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2285. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2286. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2287. # Dump CRT Controller Registers
  2288. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2289. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2290. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2291. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2292. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2293. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2294. CRT,RUN,MODE_CONTROL,0x02
  2295. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2296. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2297. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2298. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2299. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2300. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2301. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2302. # Lock CRTC Reg 11 for compatibility
  2303. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2304. # Dump ENG Register
  2305. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2306. # Dump MISCOUT Register
  2307. DIR,RUN,MISC_WRITE,0xef
  2308. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2309. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2310. CLK_IND, RUN, FREQ_2, 0xbd
  2311. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2312. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2313. CRT,RUN,LATCH_DATA, 0x00
  2314.  
  2315. [1024,768,16,81,100]
  2316. # Unlock CRTC
  2317. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2318. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2319. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2320. # Dump CRT Controller Registers
  2321. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2322. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2323. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2324. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2325. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2326. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2327. CRT,RUN,MODE_CONTROL,0x02
  2328. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2329. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2330. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2331. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2332. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2333. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2334. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2335. # Lock CRTC Reg 11 for compatibility
  2336. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2337. # Dump ENG Register
  2338. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2339. # Dump MISCOUT Register
  2340. DIR,RUN,MISC_WRITE,0xef
  2341. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2342. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2343. CLK_IND, RUN, FREQ_2, 0xa9
  2344. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2345. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2346. CRT,RUN,LATCH_DATA, 0x00
  2347.  
  2348. [1024,768,16,64,80]
  2349. # Unlock CRTC
  2350. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2351. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2352. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2353. # Dump CRT Controller Registers
  2354. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2355. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2356. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2357. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2358. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2359. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2360. CRT,RUN,MODE_CONTROL,0x02
  2361. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2362. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2363. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2364. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2365. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2366. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2367. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2368. # Lock CRTC Reg 11 for compatibility
  2369. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2370. # Dump ENG Register
  2371. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2372. # Dump MISCOUT Register
  2373. DIR,RUN,MISC_WRITE,0xef
  2374. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2375. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2376. CLK_IND, RUN, FREQ_2, 0x93
  2377. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2378. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2379. CRT,RUN,LATCH_DATA, 0x00
  2380.  
  2381. [1024,768,16,60,75]
  2382. # Unlock CRTC
  2383. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2384. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2385. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2386. # Dump CRT Controller Registers
  2387. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2388. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2389. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2390. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2391. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2392. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2393. CRT,RUN,MODE_CONTROL,0x02
  2394. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2395. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2396. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2397. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2398. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2399. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2400. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2401. # Lock CRTC Reg 11 for compatibility
  2402. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2403. # Dump ENG Register
  2404. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2405. # Dump MISCOUT Register
  2406. DIR,RUN,MISC_WRITE,0xef
  2407. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2408. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2409. CLK_IND, RUN, FREQ_2, 0x8c
  2410. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2411. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2412. CRT,RUN,LATCH_DATA, 0x00
  2413.  
  2414. [1024,768,16,58,72]
  2415. # Unlock CRTC
  2416. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2417. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2418. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2419. # Dump CRT Controller Registers
  2420. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2421. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2422. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2423. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2424. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2425. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  2426. CRT,RUN,MODE_CONTROL,0x02
  2427. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2428. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2429. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2430. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2431. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2432. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2433. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2434. # Lock CRTC Reg 11 for compatibility
  2435. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2436. # Dump ENG Register
  2437. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2438. # Dump MISCOUT Register
  2439. DIR,RUN,MISC_WRITE,0xef
  2440. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2441. CLK_IND, RUN, FREQ_2,0x88
  2442. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2443. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2444. CLK_IND, RUN, FREQ_2, 0x88
  2445. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2446. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2447. CRT,RUN,LATCH_DATA, 0x00
  2448.  
  2449.  
  2450.  
  2451. [1024,768,16,56,70]
  2452. # Unlock CRTC
  2453. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2454. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2455. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2456. # Dump CRT Controller Registers
  2457. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2458. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2459. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2460. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2461. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2462. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2463. CRT,RUN,MODE_CONTROL,0x02
  2464. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2465. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2466. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2467. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2468. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2469. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2470. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2471. # Lock CRTC Reg 11 for compatibility
  2472. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2473. # Dump ENG Register
  2474. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2475. # Dump MISCOUT Register
  2476. DIR,RUN,MISC_WRITE,0xef
  2477. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2478. CLK_IND, RUN, FREQ_2,0x88
  2479. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2480. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2481. CLK_IND, RUN, FREQ_2, 0x88
  2482. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2483. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2484. CRT,RUN,LATCH_DATA, 0x00
  2485.  
  2486. [1024,768,16,48,60]
  2487. # Unlock CRTC
  2488. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2489. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2490. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2491. # Dump CRT Controller Registers
  2492. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2493. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2494. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2495. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2496. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2497. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  2498. CRT,RUN,MODE_CONTROL,0x02
  2499. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2500. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2501. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2502. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2503. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2504. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2505. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2506. # Lock CRTC Reg 11 for compatibility
  2507. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2508. # Dump ENG Register
  2509. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2510. # Dump MISCOUT Register
  2511. DIR,RUN,MISC_WRITE,0xef
  2512. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2513. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2514. CLK_IND, RUN, FREQ_2, 0x7E
  2515. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2516. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2517. CRT,RUN,LATCH_DATA, 0x00
  2518.  
  2519. [1024,768,8,96,120]
  2520. # Unlock CRTC
  2521. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2522. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2523. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2524. # Dump CRT Controller Registers
  2525. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2526. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2527. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2528. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2529. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2530. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2531. CRT,RUN,MODE_CONTROL,0x02
  2532. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2533. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2534. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2535. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2536. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2537. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2538. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2539. # Lock CRTC Reg 11 for compatibility
  2540. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2541. # Dump ENG Register
  2542. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2543. # Dump MISCOUT Register
  2544. DIR,RUN,MISC_WRITE,0xef
  2545. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2546. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2547. CLK_IND, RUN, FREQ_2, 0xbd
  2548. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2549. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2550. CRT,RUN,LATCH_DATA, 0x08
  2551.  
  2552. [1024,768,8,81,100]
  2553. # Unlock CRTC
  2554. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2555. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2556. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2557. # Dump CRT Controller Registers
  2558. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2559. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2560. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2561. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2562. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2563. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2564. CRT,RUN,MODE_CONTROL,0x02
  2565. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2566. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2567. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2568. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2569. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2570. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2571. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2572. # Lock CRTC Reg 11 for compatibility
  2573. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2574. # Dump ENG Register
  2575. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2576. # Dump MISCOUT Register
  2577. DIR,RUN,MISC_WRITE,0xef
  2578. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2579. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2580. CLK_IND, RUN, FREQ_2, 0xa9
  2581. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2582. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2583. CRT,RUN,LATCH_DATA, 0x08
  2584.  
  2585. [1024,768,8,64,80]
  2586. # Unlock CRTC
  2587. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2588. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2589. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2590. # Dump CRT Controller Registers
  2591. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2592. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2593. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2594. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2595. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2596. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2597. CRT,RUN,MODE_CONTROL,0x02
  2598. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2599. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2600. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2601. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2602. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2603. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2604. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2605. # Lock CRTC Reg 11 for compatibility
  2606. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2607. # Dump ENG Register
  2608. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2609. # Dump MISCOUT Register
  2610. DIR,RUN,MISC_WRITE,0xef
  2611. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2612. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2613. CLK_IND, RUN, FREQ_2, 0x93
  2614. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2615. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2616. CRT,RUN,LATCH_DATA, 0x08
  2617.  
  2618. [1024,768,8,60,75]
  2619. # Unlock CRTC
  2620. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2621. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2622. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2623. # Dump CRT Controller Registers
  2624. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2625. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2626. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2627. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2628. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2629. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2630. CRT,RUN,MODE_CONTROL,0x02
  2631. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2632. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2633. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2634. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2635. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2636. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2637. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2638. # Lock CRTC Reg 11 for compatibility
  2639. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2640. # Dump ENG Register
  2641. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2642. # Dump MISCOUT Register
  2643. DIR,RUN,MISC_WRITE,0xef
  2644. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2645. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2646. CLK_IND, RUN, FREQ_2, 0x8c
  2647. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2648. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2649. CRT,RUN,LATCH_DATA, 0x08
  2650.  
  2651. [1024,768,8,58,72]
  2652. # Unlock CRTC
  2653. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2654. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2655. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2656. # Dump CRT Controller Registers
  2657. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2658. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2659. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2660. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2661. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2662. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2663. CRT,RUN,MODE_CONTROL,0x02
  2664. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2665. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2666. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2667. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2668. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2669. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2670. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2671. # Lock CRTC Reg 11 for compatibility
  2672. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2673. # Dump ENG Register
  2674. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2675. # Dump MISCOUT Register
  2676. DIR,RUN,MISC_WRITE,0xef
  2677. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2678. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2679. CLK_IND, RUN, FREQ_2, 0x88
  2680. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2681. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2682. CRT,RUN,LATCH_DATA, 0x08
  2683.  
  2684. [1024,768,8,56,70]
  2685. # Unlock CRTC
  2686. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2687. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2688. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2689. # Dump CRT Controller Registers
  2690. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2691. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2692. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2693. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2694. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2695. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2696. CRT,RUN,MODE_CONTROL,0x02
  2697. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2698. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2699. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2700. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2701. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2702. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2703. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2704. # Lock CRTC Reg 11 for compatibility
  2705. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2706. # Dump ENG Register
  2707. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2708. # Dump MISCOUT Register
  2709. DIR,RUN,MISC_WRITE,0xef
  2710. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2711. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2712. CLK_IND, RUN, FREQ_2, 0x88
  2713. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2714. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2715. CRT,RUN,LATCH_DATA, 0x08
  2716.  
  2717. [1024,768,8,48,60]
  2718. # Unlock CRTC
  2719. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2720. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2721. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2722. # Dump CRT Controller Registers
  2723. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2724. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2725. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2726. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2727. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2728. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2729. CRT,RUN,MODE_CONTROL,0x02
  2730. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2731. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2732. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2733. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2734. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2735. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2736. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2737. # Lock CRTC Reg 11 for compatibility
  2738. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2739. # Dump ENG Register
  2740. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2741. # Dump MISCOUT Register
  2742. DIR,RUN,MISC_WRITE,0xef
  2743. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2744. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2745. CLK_IND, RUN, FREQ_2, 0x7e
  2746. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2747. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2748. CRT,RUN,LATCH_DATA, 0x08
  2749.  
  2750. [800,600,32,75,120]
  2751. # Unlock CRTC
  2752. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2753. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2754. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2755. # Dump CRT Controller Registers
  2756. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2757. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2758. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2759. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2760. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2761. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2762. CRT,RUN,MODE_CONTROL,0x02
  2763. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2764. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2765. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2766. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2767. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2768. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2769. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2770. # Lock CRTC Reg 11 for compatibility
  2771. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2772. # Dump ENG Register
  2773. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2774. # Dump MISCOUT Register
  2775. DIR,RUN,MISC_WRITE,0xef
  2776. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2777. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2778. CLK_IND, RUN, FREQ_2, 0x8a
  2779. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2780. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2781. CRT,RUN,LATCH_DATA, 0x00
  2782.  
  2783. [800,600,32,64,100]
  2784. # Unlock CRTC
  2785. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2786. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2787. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2788. # Dump CRT Controller Registers
  2789. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2790. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2791. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2792. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2793. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2794. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2795. CRT,RUN,MODE_CONTROL,0x02
  2796. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2797. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2798. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2799. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2800. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2801. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2802. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2803. # Lock CRTC Reg 11 for compatibility
  2804. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2805. # Dump ENG Register
  2806. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2807. # Dump MISCOUT Register
  2808. DIR,RUN,MISC_WRITE,0xef
  2809. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2810. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2811. CLK_IND, RUN, FREQ_2, 0x7e
  2812. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2813. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2814. CRT,RUN,LATCH_DATA, 0x00
  2815.  
  2816. [800,600,32,56,90]
  2817. # Unlock CRTC
  2818. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2819. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2820. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2821. # Dump CRT Controller Registers
  2822. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2823. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2824. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2825. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2826. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2827. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2828. CRT,RUN,MODE_CONTROL,0x02
  2829. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2830. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2831. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2832. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2833. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2834. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2835. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2836. # Lock CRTC Reg 11 for compatibility
  2837. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2838. # Dump ENG Register
  2839. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2840. # Dump MISCOUT Register
  2841. DIR,RUN,MISC_WRITE,0xef
  2842. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2843. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2844. CLK_IND, RUN, FREQ_2, 0x70
  2845. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2846. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2847. CRT,RUN,LATCH_DATA, 0x00
  2848.  
  2849. [800,600,32,46,75]
  2850. # Unlock CRTC
  2851. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2852. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2853. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2854. # Dump CRT Controller Registers
  2855. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2856. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2857. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2858. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2859. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2860. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2861. CRT,RUN,MODE_CONTROL,0x02
  2862. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2863. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2864. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2865. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2866. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2867. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2868. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2869. # Lock CRTC Reg 11 for compatibility
  2870. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2871. # Dump ENG Register
  2872. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2873. # Dump MISCOUT Register
  2874. DIR,RUN,MISC_WRITE,0xef
  2875. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2876. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2877. CLK_IND, RUN, FREQ_2, 0x60
  2878. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2879. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2880. CRT,RUN,LATCH_DATA, 0x00
  2881.  
  2882. [800,600,32,48,72]
  2883. # Unlock CRTC
  2884. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2885. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2886. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2887. # Dump CRT Controller Registers
  2888. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2889. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2890. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2891. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2892. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2893. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2894. CRT,RUN,MODE_CONTROL,0x02
  2895. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2896. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2897. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2898. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2899. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2900. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2901. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2902. # Lock CRTC Reg 11 for compatibility
  2903. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2904. # Dump ENG Register
  2905. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2906. # Dump MISCOUT Register
  2907. DIR,RUN,MISC_WRITE,0xef
  2908. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2909. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2910. CLK_IND, RUN, FREQ_2, 0x61
  2911. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2912. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2913. CRT,RUN,LATCH_DATA, 0x00
  2914.  
  2915.  
  2916.  
  2917. [800,600,32,35,56]
  2918. # Unlock CRTC
  2919. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2920. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2921. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2922. # Dump CRT Controller Registers
  2923. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2924. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2925. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2926. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2927. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2928. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2929. CRT,RUN,MODE_CONTROL,0x02
  2930. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2931. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2932. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2933. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2934. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2935. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2936. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2937. # Lock CRTC Reg 11 for compatibility
  2938. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2939. # Dump ENG Register
  2940. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2941. # Dump MISCOUT Register
  2942. DIR,RUN,MISC_WRITE,0xef
  2943. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2944. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2945. CLK_IND, RUN, FREQ_2, 0x45
  2946. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2947. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2948. CRT,RUN,LATCH_DATA, 0x00
  2949.  
  2950. [800,600,32,37,60]
  2951. # Unlock CRTC
  2952. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2953. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2954. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2955. # Dump CRT Controller Registers
  2956. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2957. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2958. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2959. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2960. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2961. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2962. CRT,RUN,MODE_CONTROL,0x02
  2963. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2964. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2965. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2966. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2967. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2968. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2969. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2970. # Lock CRTC Reg 11 for compatibility
  2971. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2972. # Dump ENG Register
  2973. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2974. # Dump MISCOUT Register
  2975. DIR,RUN,MISC_WRITE,0xef
  2976. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2977. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2978. CLK_IND, RUN, FREQ_2, 0x4D
  2979. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2980. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2981. CRT,RUN,LATCH_DATA, 0x00
  2982.  
  2983. [800,600,24,75,120]
  2984. # Unlock CRTC
  2985. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2986. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2987. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2988. # Dump CRT Controller Registers
  2989. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  2990. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2991. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  2992. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2993. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2994. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2995. CRT,RUN,MODE_CONTROL,0x02
  2996. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2997. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2998. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2999. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3000. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3001. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3002. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3003. # Lock CRTC Reg 11 for compatibility
  3004. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3005. # Dump ENG Register
  3006. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3007. # Dump MISCOUT Register
  3008. DIR,RUN,MISC_WRITE,0xef
  3009. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3010. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3011. CLK_IND, RUN, FREQ_2, 0x8a
  3012. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3013. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3014. CRT,RUN,LATCH_DATA, 0x00
  3015.  
  3016.  
  3017. [800,600,24,64,100]
  3018. # Unlock CRTC
  3019. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3020. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3021. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3022. # Dump CRT Controller Registers
  3023. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  3024. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3025. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  3026. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3027. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3028. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3029. CRT,RUN,MODE_CONTROL,0x02
  3030. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3031. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3032. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3033. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3034. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3035. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3036. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3037. # Lock CRTC Reg 11 for compatibility
  3038. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3039. # Dump ENG Register
  3040. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3041. # Dump MISCOUT Register
  3042. DIR,RUN,MISC_WRITE,0xef
  3043. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3044. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3045. CLK_IND, RUN, FREQ_2, 0x7e
  3046. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3047. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3048. CRT,RUN,LATCH_DATA, 0x00
  3049.  
  3050.  
  3051. [800,600,24,56,90]
  3052. # Unlock CRTC
  3053. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3054. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3055. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3056. # Dump CRT Controller Registers
  3057. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  3058. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3059. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  3060. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3061. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3062. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  3063. CRT,RUN,MODE_CONTROL,0x02
  3064. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3065. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3066. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3067. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3068. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3069. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3070. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3071. # Lock CRTC Reg 11 for compatibility
  3072. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3073. # Dump ENG Register
  3074. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3075. # Dump MISCOUT Register
  3076. DIR,RUN,MISC_WRITE,0xef
  3077. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3078. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3079. CLK_IND, RUN, FREQ_2, 0x70
  3080. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3081. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3082. CRT,RUN,LATCH_DATA, 0x00
  3083.  
  3084.  
  3085. [800,600,24,46,75]
  3086. # Unlock CRTC
  3087. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3088. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3089. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3090. # Dump CRT Controller Registers
  3091. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  3092. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3093. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3094. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3095. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3096. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3097. CRT,RUN,MODE_CONTROL,0x02
  3098. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3099. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3100. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3101. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3102. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3103. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3104. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3105. # Lock CRTC Reg 11 for compatibility
  3106. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3107. # Dump ENG Register
  3108. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3109. # Dump MISCOUT Register
  3110. DIR,RUN,MISC_WRITE,0xef
  3111. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3112. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3113. CLK_IND, RUN, FREQ_2, 0x60
  3114. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3115. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3116. CRT,RUN,LATCH_DATA, 0x00
  3117.  
  3118.  
  3119. [800,600,24,48,72]
  3120. # Unlock CRTC
  3121. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3122. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3123. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3124. # Dump CRT Controller Registers
  3125. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  3126. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  3127. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3128. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  3129. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  3130. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3131. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  3132. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3133. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3134. CRT,RUN,MODE_CONTROL,0x02
  3135. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3136. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3137. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3138. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3139. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3140. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3141. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3142. # Lock CRTC Reg 11 for compatibility
  3143. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3144. # Dump ENG Register
  3145. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3146. # Dump MISCOUT Register
  3147. DIR,RUN,MISC_WRITE,0xef
  3148. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3149. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3150. ##CLK_IND, RUN, FREQ_2, 0x61
  3151. CLK_IND, RUN, FREQ_2, 0x62
  3152. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3153. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3154. CRT,RUN,LATCH_DATA, 0x00
  3155.  
  3156. [800,600,24,37,60]
  3157. # Unlock CRTC
  3158. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3159. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3160. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3161. # Dump CRT Controller Registers
  3162. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  3163. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3164. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3165. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3166. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3167. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3168. CRT,RUN,MODE_CONTROL,0x02
  3169. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3170. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3171. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3172. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3173. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3174. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3175. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3176. # Lock CRTC Reg 11 for compatibility
  3177. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3178. # Dump ENG Register
  3179. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3180. # Dump MISCOUT Register
  3181. DIR,RUN,MISC_WRITE,0xef
  3182. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3183. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3184. CLK_IND, RUN, FREQ_2, 0x4d
  3185. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3186. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3187. CRT,RUN,LATCH_DATA, 0x00
  3188.  
  3189.  
  3190. [800,600,24,35,56]
  3191. # Unlock CRTC
  3192. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3193. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3194. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3195. # Dump CRT Controller Registers
  3196. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  3197. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3198. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3199. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3200. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3201. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3202. CRT,RUN,MODE_CONTROL,0x02
  3203. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3204. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3205. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3206. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3207. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3208. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3209. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3210. # Lock CRTC Reg 11 for compatibility
  3211. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3212. # Dump ENG Register
  3213. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3214. # Dump MISCOUT Register
  3215. DIR,RUN,MISC_WRITE,0xef
  3216. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3217. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3218. CLK_IND, RUN, FREQ_2, 0x45
  3219. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3220. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3221. CRT,RUN,LATCH_DATA, 0x00
  3222.  
  3223.  
  3224.  
  3225. [800,600,16,75,120]
  3226. # Unlock CRTC
  3227. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3228. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3229. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3230. # Dump CRT Controller Registers
  3231. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3232. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3233. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3234. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3235. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3236. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3237. CRT,RUN,MODE_CONTROL,0x02
  3238. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3239. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3240. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3241. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3242. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3243. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3244. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3245. # Lock CRTC Reg 11 for compatibility
  3246. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3247. # Dump ENG Register
  3248. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3249. # Dump MISCOUT Register
  3250. DIR,RUN,MISC_WRITE,0xef
  3251. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3252. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3253. CLK_IND, RUN, FREQ_2, 0x8a
  3254. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3255. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3256. CRT,RUN,LATCH_DATA, 0x00
  3257.  
  3258. [800,600,16,64,100]
  3259. # Unlock CRTC
  3260. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3261. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3262. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3263. # Dump CRT Controller Registers
  3264. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3265. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3266. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3267. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3268. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3269. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3270. CRT,RUN,MODE_CONTROL,0x02
  3271. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3272. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3273. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3274. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3275. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3276. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3277. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3278. # Lock CRTC Reg 11 for compatibility
  3279. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3280. # Dump ENG Register
  3281. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3282. # Dump MISCOUT Register
  3283. DIR,RUN,MISC_WRITE,0xef
  3284. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3285. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3286. CLK_IND, RUN, FREQ_2, 0x7e
  3287. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3288. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3289. CRT,RUN,LATCH_DATA, 0x00
  3290.  
  3291. [800,600,16,56,90]
  3292. # Unlock CRTC
  3293. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3294. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3295. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3296. # Dump CRT Controller Registers
  3297. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3298. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3299. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3300. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3301. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3302. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3303. CRT,RUN,MODE_CONTROL,0x02
  3304. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3305. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3306. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3307. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3308. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3309. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3310. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3311. # Lock CRTC Reg 11 for compatibility
  3312. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3313. # Dump ENG Register
  3314. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3315. # Dump MISCOUT Register
  3316. DIR,RUN,MISC_WRITE,0xef
  3317. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3318. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3319. CLK_IND, RUN, FREQ_2, 0x70
  3320. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3321. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3322. CRT,RUN,LATCH_DATA, 0x00
  3323.  
  3324. [800,600,16,46,75]
  3325. # Unlock CRTC
  3326. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3327. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3328. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3329. # Dump CRT Controller Registers
  3330. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3331. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3332. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3333. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3334. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3335. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3336. CRT,RUN,MODE_CONTROL,0x02
  3337. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3338. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3339. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3340. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3341. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3342. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3343. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3344. # Lock CRTC Reg 11 for compatibility
  3345. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3346. # Dump ENG Register
  3347. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3348. # Dump MISCOUT Register
  3349. DIR,RUN,MISC_WRITE,0xef
  3350. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3351. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3352. CLK_IND, RUN, FREQ_2, 0x60
  3353. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3354. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3355. CRT,RUN,LATCH_DATA, 0x00
  3356.  
  3357. [800,600,16,48,72]
  3358. # Unlock CRTC
  3359. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3360. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3361. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3362. # Dump CRT Controller Registers
  3363. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3364. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3365. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3366. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3367. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3368. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3369. CRT,RUN,MODE_CONTROL,0x02
  3370. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3371. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3372. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3373. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3374. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3375. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3376. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3377. # Lock CRTC Reg 11 for compatibility
  3378. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3379. # Dump ENG Register
  3380. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3381. # Dump MISCOUT Register
  3382. DIR,RUN,MISC_WRITE,0xef
  3383. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3384. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3385. CLK_IND, RUN, FREQ_2, 0x61
  3386. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3387. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3388. CRT,RUN,LATCH_DATA, 0x00
  3389.  
  3390. [800,600,16,35,56]
  3391. # Unlock CRTC
  3392. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3393. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3394. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3395. # Dump CRT Controller Registers
  3396. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3397. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3398. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3399. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3400. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3401. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3402. CRT,RUN,MODE_CONTROL,0x02
  3403. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3404. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3405. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3406. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3407. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3408. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3409. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3410. # Lock CRTC Reg 11 for compatibility
  3411. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3412. # Dump ENG Register
  3413. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3414. # Dump MISCOUT Register
  3415. DIR,RUN,MISC_WRITE,0xef
  3416. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3417. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3418. CLK_IND, RUN, FREQ_2, 0x45
  3419. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3420. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3421. CRT,RUN,LATCH_DATA, 0x00
  3422.  
  3423. [800,600,16,37,60]
  3424. # Unlock CRTC
  3425. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3426. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3427. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3428. # Dump CRT Controller Registers
  3429. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3430. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3431. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3432. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3433. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3434. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3435. CRT,RUN,MODE_CONTROL,0x02
  3436. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3437. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3438. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3439. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3440. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3441. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3442. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3443. # Lock CRTC Reg 11 for compatibility
  3444. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3445. # Dump ENG Register
  3446. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3447. # Dump MISCOUT Register
  3448. DIR,RUN,MISC_WRITE,0xef
  3449. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3450. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3451. CLK_IND, RUN, FREQ_2, 0x4D
  3452. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3453. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3454. CRT,RUN,LATCH_DATA, 0x00
  3455.  
  3456. [800,600,8,75,120]
  3457. # Unlock CRTC
  3458. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3459. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3460. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3461. # Dump CRT Controller Registers
  3462. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3463. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3464. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3465. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3466. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3467. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3468. CRT,RUN,MODE_CONTROL,0x02
  3469. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3470. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3471. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3472. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3473. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3474. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3475. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3476. # Lock CRTC Reg 11 for compatibility
  3477. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3478. # Dump ENG Register
  3479. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3480. # Dump MISCOUT Register
  3481. DIR,RUN,MISC_WRITE,0xef
  3482. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3483. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3484. CLK_IND, RUN, FREQ_2, 0x8a
  3485. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3486. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3487. CRT,RUN,LATCH_DATA, 0x08
  3488.  
  3489. [800,600,8,64,100]
  3490. # Unlock CRTC
  3491. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3492. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3493. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3494. # Dump CRT Controller Registers
  3495. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3496. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3497. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3498. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3499. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3500. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3501. CRT,RUN,MODE_CONTROL,0x02
  3502. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3503. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3504. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3505. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3506. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3507. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3508. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3509. # Lock CRTC Reg 11 for compatibility
  3510. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3511. # Dump ENG Register
  3512. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3513. # Dump MISCOUT Register
  3514. DIR,RUN,MISC_WRITE,0xef
  3515. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3516. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3517. CLK_IND, RUN, FREQ_2, 0x7e
  3518. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3519. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3520. CRT,RUN,LATCH_DATA, 0x08
  3521.  
  3522. [800,600,8,56,90]
  3523. # Unlock CRTC
  3524. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3525. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3526. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3527. # Dump CRT Controller Registers
  3528. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3529. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3530. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3531. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3532. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3533. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3534. CRT,RUN,MODE_CONTROL,0x02
  3535. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3536. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3537. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3538. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3539. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3540. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3541. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3542. # Lock CRTC Reg 11 for compatibility
  3543. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3544. # Dump ENG Register
  3545. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3546. # Dump MISCOUT Register
  3547. DIR,RUN,MISC_WRITE,0xef
  3548. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3549. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3550. CLK_IND, RUN, FREQ_2, 0x70
  3551. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3552. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3553. CRT,RUN,LATCH_DATA, 0x08
  3554.  
  3555. [800,600,8,46,75]
  3556. # Unlock CRTC
  3557. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3558. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3559. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3560. # Dump CRT Controller Registers
  3561. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3562. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3563. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3564. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3565. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3566. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3567. CRT,RUN,MODE_CONTROL,0x02
  3568. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3569. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3570. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3571. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3572. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3573. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3574. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3575. # Lock CRTC Reg 11 for compatibility
  3576. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3577. # Dump ENG Register
  3578. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3579. # Dump MISCOUT Register
  3580. DIR,RUN,MISC_WRITE,0xef
  3581. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3582. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3583. CLK_IND, RUN, FREQ_2, 0x60
  3584. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3585. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3586. CRT,RUN,LATCH_DATA, 0x08
  3587.  
  3588. [800,600,8,48,72]
  3589. # Unlock CRTC
  3590. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3591. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3592. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3593. # Dump CRT Controller Registers
  3594. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3595. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3596. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3597. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3598. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3599. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3600. CRT,RUN,MODE_CONTROL,0x02
  3601. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3602. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3603. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3604. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3605. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3606. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3607. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3608. # Lock CRTC Reg 11 for compatibility
  3609. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3610. # Dump ENG Register
  3611. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3612. # Dump MISCOUT Register
  3613. DIR,RUN,MISC_WRITE,0xef
  3614. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3615. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3616. CLK_IND, RUN, FREQ_2, 0x61
  3617. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3618. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3619. CRT,RUN,LATCH_DATA, 0x08
  3620.  
  3621. [800,600,8,37,60]
  3622. # Unlock CRTC
  3623. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3624. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3625. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3626. # Dump CRT Controller Registers
  3627. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3628. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3629. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3630. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3631. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3632. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3633. CRT,RUN,MODE_CONTROL,0x02
  3634. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3635. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3636. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3637. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3638. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3639. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3640. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3641. # Lock CRTC Reg 11 for compatibility
  3642. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3643. # Dump ENG Register
  3644. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3645. # Dump MISCOUT Register
  3646. DIR,RUN,MISC_WRITE,0xef
  3647. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3648. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3649. CLK_IND, RUN, FREQ_2, 0x4D
  3650. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3651. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3652. CRT,RUN,LATCH_DATA, 0x08
  3653.  
  3654. [800,600,8,35,56]
  3655. # Unlock CRTC
  3656. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3657. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3658. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3659. # Dump CRT Controller Registers
  3660. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3661. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3662. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3663. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3664. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3665. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3666. CRT,RUN,MODE_CONTROL,0x02
  3667. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3668. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3669. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3670. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3671. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3672. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3673. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3674. # Lock CRTC Reg 11 for compatibility
  3675. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3676. # Dump ENG Register
  3677. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3678. # Dump MISCOUT Register
  3679. DIR,RUN,MISC_WRITE,0xef
  3680. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3681. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3682. CLK_IND, RUN, FREQ_2, 0x45
  3683. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3684. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3685. CRT,RUN,LATCH_DATA, 0x08
  3686.  
  3687. [640,480,32,64,120]
  3688. # Unlock CRTC
  3689. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3690. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3691. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3692. # Dump CRT Controller Registers
  3693. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3694. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3695. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3696. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3697. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3698. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3699. CRT,RUN,MODE_CONTROL,0x02
  3700. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3701. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3702. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3703. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3704. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3705. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3706. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3707. # Lock CRTC Reg 11 for compatibility
  3708. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3709. # Dump ENG Register
  3710. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3711. # Dump MISCOUT Register
  3712. DIR,RUN,MISC_WRITE,0xef
  3713. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3714. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3715. CLK_IND, RUN, FREQ_2, 0x67
  3716. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3717. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3718. CRT,RUN,LATCH_DATA, 0x00
  3719.  
  3720. [640,480,32,52,100]
  3721. # Unlock CRTC
  3722. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3723. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3724. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3725. # Dump CRT Controller Registers
  3726. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3727. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3728. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3729. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3730. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3731. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3732. CRT,RUN,MODE_CONTROL,0x02
  3733. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3734. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3735. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3736. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3737. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3738. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3739. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3740. # Lock CRTC Reg 11 for compatibility
  3741. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3742. # Dump ENG Register
  3743. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3744. # Dump MISCOUT Register
  3745. DIR,RUN,MISC_WRITE,0xef
  3746. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3747. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3748. CLK_IND, RUN, FREQ_2, 0x50
  3749. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3750. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3751. CRT,RUN,LATCH_DATA, 0x00
  3752.  
  3753. [640,480,32,48,90]
  3754. # Unlock CRTC
  3755. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3756. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3757. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3758. # Dump CRT Controller Registers
  3759. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3760. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3761. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3762. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3763. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3764. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3765. CRT,RUN,MODE_CONTROL,0x02
  3766. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3767. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3768. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3769. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3770. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3771. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3772. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3773. # Lock CRTC Reg 11 for compatibility
  3774. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3775. # Dump ENG Register
  3776. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3777. # Dump MISCOUT Register
  3778. DIR,RUN,MISC_WRITE,0xef
  3779. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3780. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3781. CLK_IND, RUN, FREQ_2, 0x4d
  3782. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3783. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3784. CRT,RUN,LATCH_DATA, 0x00
  3785.  
  3786. [640,480,32,37,75]
  3787. # Unlock CRTC
  3788. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3789. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3790. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3791. # Dump CRT Controller Registers
  3792. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3793. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3794. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3795. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3796. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3797. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3798. CRT,RUN,MODE_CONTROL,0x02
  3799. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3800. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3801. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3802. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3803. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3804. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3805. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3806. # Lock CRTC Reg 11 for compatibility
  3807. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3808. # Dump ENG Register
  3809. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3810. # Dump MISCOUT Register
  3811. DIR,RUN,MISC_WRITE,0xef
  3812. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3813. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3814. CLK_IND, RUN, FREQ_2, 0x3a
  3815. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3816. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3817. CRT,RUN,LATCH_DATA, 0x00
  3818.  
  3819. [640,480,32,37,72]
  3820. # Unlock CRTC
  3821. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3822. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3823. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3824. # Dump CRT Controller Registers
  3825. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3826. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3827. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3828. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3829. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3830. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3831. CRT,RUN,MODE_CONTROL,0x02
  3832. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3833. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3834. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3835. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3836. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3837. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3838. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3839. # Lock CRTC Reg 11 for compatibility
  3840. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3841. # Dump ENG Register
  3842. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3843. # Dump MISCOUT Register
  3844. DIR,RUN,MISC_WRITE,0xef
  3845. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3846. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3847. CLK_IND, RUN, FREQ_2, 0x3a
  3848. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3849. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3850. CRT,RUN,LATCH_DATA, 0x00
  3851.  
  3852. [640,480,32,31,60]
  3853. # Unlock CRTC
  3854. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3855. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3856. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3857. # Dump CRT Controller Registers
  3858. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3859. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3860. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3861. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3862. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3863. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3864. CRT,RUN,MODE_CONTROL,0x02
  3865. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3866. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3867. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3868. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3869. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3870. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3871. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3872. # Lock CRTC Reg 11 for compatibility
  3873. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3874. # Dump ENG Register
  3875. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3876. # Dump MISCOUT Register
  3877. DIR,RUN,MISC_WRITE,0xef
  3878. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3879. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3880. CLK_IND, RUN, FREQ_2, 0x21
  3881. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3882. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3883. CRT,RUN,LATCH_DATA, 0x00
  3884.  
  3885. [640,480,24,64,120]
  3886. # Unlock CRTC
  3887. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3888. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3889. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3890. # Dump CRT Controller Registers
  3891. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  3892. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3893. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3894. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  3895. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3896. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  3897. CRT,RUN,MODE_CONTROL,0x02
  3898. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3899. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3900. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3901. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3902. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3903. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3904. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3905. # Lock CRTC Reg 11 for compatibility
  3906. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3907. # Dump ENG Register
  3908. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3909. # Dump MISCOUT Register
  3910. DIR,RUN,MISC_WRITE,0xef
  3911. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3912. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3913. CLK_IND, RUN, FREQ_2, 0x67
  3914. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3915. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3916. CRT,RUN,LATCH_DATA, 0x00
  3917.  
  3918.  
  3919. [640,480,24,52,100]
  3920. # Unlock CRTC
  3921. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3922. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3923. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3924. # Dump CRT Controller Registers
  3925. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  3926. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3927. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3928. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  3929. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3930. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3931. CRT,RUN,MODE_CONTROL,0x02
  3932. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3933. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3934. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3935. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3936. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3937. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3938. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3939. # Lock CRTC Reg 11 for compatibility
  3940. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3941. # Dump ENG Register
  3942. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3943. # Dump MISCOUT Register
  3944. DIR,RUN,MISC_WRITE,0xef
  3945. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3946. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3947. CLK_IND, RUN, FREQ_2, 0x50
  3948. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3949. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3950. CRT,RUN,LATCH_DATA, 0x00
  3951.  
  3952. [640,480,24,48,90]
  3953. # Unlock CRTC
  3954. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3955. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3956. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3957. # Dump CRT Controller Registers
  3958. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  3959. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3960. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3961. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3962. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3963. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3964. CRT,RUN,MODE_CONTROL,0x02
  3965. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3966. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3967. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3968. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3969. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3970. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3971. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3972. # Lock CRTC Reg 11 for compatibility
  3973. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3974. # Dump ENG Register
  3975. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3976. # Dump MISCOUT Register
  3977. DIR,RUN,MISC_WRITE,0xef
  3978. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3979. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3980. CLK_IND, RUN, FREQ_2, 0x4d
  3981. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3982. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3983. CRT,RUN,LATCH_DATA, 0x00
  3984.  
  3985.  
  3986. [640,480,24,37,75]
  3987. # Unlock CRTC
  3988. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3989. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3990. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3991. # Dump CRT Controller Registers
  3992. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  3993. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3994. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3995. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  3996. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3997. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  3998. CRT,RUN,MODE_CONTROL,0x02
  3999. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4000. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4001. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4002. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4003. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4004. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4005. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4006. # Lock CRTC Reg 11 for compatibility
  4007. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4008. # Dump ENG Register
  4009. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4010. # Dump MISCOUT Register
  4011. DIR,RUN,MISC_WRITE,0xef
  4012. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4013. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4014. CLK_IND, RUN, FREQ_2, 0x39
  4015. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4016. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4017. CRT,RUN,LATCH_DATA, 0x00
  4018.  
  4019.  
  4020. [640,480,24,37,72]
  4021. # Unlock CRTC
  4022. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4023. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4024. CRT,RUN,REG_LOCK_1,0x48,0xa0
  4025. # Dump CRT Controller Registers
  4026. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  4027. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4028. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4029. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4030. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4031. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  4032. CRT,RUN,MODE_CONTROL,0x02
  4033. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4034. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4035. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4036. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4037. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4038. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4039. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4040. # Lock CRTC Reg 11 for compatibility
  4041. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4042. # Dump ENG Register
  4043. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4044. # Dump MISCOUT Register
  4045. DIR,RUN,MISC_WRITE,0xef
  4046. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4047. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4048. CLK_IND, RUN, FREQ_2, 0x3a
  4049. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4050. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4051. CRT,RUN,LATCH_DATA, 0x00
  4052.  
  4053. [640,480,24,31,60]
  4054. # Unlock CRTC
  4055. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4056. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4057. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4058. # Dump CRT Controller Registers
  4059. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  4060. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4061. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4062. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  4063. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4064. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  4065. CRT,RUN,MODE_CONTROL,0x02
  4066. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4067. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4068. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4069. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4070. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4071. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4072. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4073. # Lock CRTC Reg 11 for compatibility
  4074. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4075. # Dump ENG Register
  4076. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4077. # Dump MISCOUT Register
  4078. DIR,RUN,MISC_WRITE,0xef
  4079. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4080. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4081. CLK_IND, RUN, FREQ_2, 0x21
  4082. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4083. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4084. CRT,RUN,LATCH_DATA, 0x00
  4085.  
  4086. [640,480,16,64,120]
  4087. # Unlock CRTC
  4088. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4089. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4090. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4091. # Dump CRT Controller Registers
  4092. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4093. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4094. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4095. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4096. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4097. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4098. CRT,RUN,MODE_CONTROL,0x02
  4099. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4100. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4101. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4102. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4103. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4104. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4105. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4106. # Lock CRTC Reg 11 for compatibility
  4107. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4108. # Dump ENG Register
  4109. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4110. # Dump MISCOUT Register
  4111. DIR,RUN,MISC_WRITE,0xef
  4112. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4113. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4114. CLK_IND, RUN, FREQ_2, 0x67
  4115. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4116. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4117. CRT,RUN,LATCH_DATA, 0x00
  4118.  
  4119. [640,480,16,52,100]
  4120. # Unlock CRTC
  4121. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4122. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4123. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4124. # Dump CRT Controller Registers
  4125. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4126. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4127. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4128. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4129. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4130. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  4131. CRT,RUN,MODE_CONTROL,0x02
  4132. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4133. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4134. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4135. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4136. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4137. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4138. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4139. # Lock CRTC Reg 11 for compatibility
  4140. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4141. # Dump ENG Register
  4142. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4143. # Dump MISCOUT Register
  4144. DIR,RUN,MISC_WRITE,0xef
  4145. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4146. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4147. CLK_IND, RUN, FREQ_2, 0x50
  4148. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4149. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4150. CRT,RUN,LATCH_DATA, 0x00
  4151.  
  4152. [640,480,16,48,90]
  4153. # Unlock CRTC
  4154. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4155. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4156. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4157. # Dump CRT Controller Registers
  4158. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4159. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4160. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4161. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4162. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4163. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4164. CRT,RUN,MODE_CONTROL,0x02
  4165. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4166. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4167. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4168. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4169. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4170. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4171. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4172. # Lock CRTC Reg 11 for compatibility
  4173. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4174. # Dump ENG Register
  4175. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4176. # Dump MISCOUT Register
  4177. DIR,RUN,MISC_WRITE,0xef
  4178. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4179. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4180. CLK_IND, RUN, FREQ_2, 0x4d
  4181. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4182. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4183. CRT,RUN,LATCH_DATA, 0x00
  4184.  
  4185. [640,480,16,37,75]
  4186. # Unlock CRTC
  4187. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4188. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4189. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4190. # Dump CRT Controller Registers
  4191. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4192. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4193. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4194. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4195. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4196. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4197. CRT,RUN,MODE_CONTROL,0x02
  4198. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4199. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4200. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4201. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4202. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4203. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4204. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4205. # Lock CRTC Reg 11 for compatibility
  4206. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4207. # Dump ENG Register
  4208. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4209. # Dump MISCOUT Register
  4210. DIR,RUN,MISC_WRITE,0xef
  4211. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4212. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4213. CLK_IND, RUN, FREQ_2, 0x3a
  4214. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4215. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4216. CRT,RUN,LATCH_DATA, 0x00
  4217.  
  4218. [640,480,16,37,72]
  4219. # Unlock CRTC
  4220. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4221. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4222. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4223. # Dump CRT Controller Registers
  4224. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4225. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4226. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4227. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4228. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4229. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4230. CRT,RUN,MODE_CONTROL,0x02
  4231. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4232. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4233. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4234. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4235. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4236. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4237. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4238. # Lock CRTC Reg 11 for compatibility
  4239. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4240. # Dump ENG Register
  4241. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4242. # Dump MISCOUT Register
  4243. DIR,RUN,MISC_WRITE,0xef
  4244. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4245. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4246. CLK_IND, RUN, FREQ_2, 0x3a
  4247. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4248. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4249. CRT,RUN,LATCH_DATA, 0x00
  4250.  
  4251. [640,480,16,31,60]
  4252. # Unlock CRTC
  4253. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4254. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4255. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4256. # Dump CRT Controller Registers
  4257. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4258. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4259. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4260. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4261. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4262. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4263. CRT,RUN,MODE_CONTROL,0x02
  4264. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4265. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4266. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4267. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4268. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4269. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4270. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4271. # Lock CRTC Reg 11 for compatibility
  4272. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4273. # Dump ENG Register
  4274. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4275. # Dump MISCOUT Register
  4276. DIR,RUN,MISC_WRITE,0xef
  4277. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4278. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4279. CLK_IND, RUN, FREQ_2, 0x21
  4280. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4281. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4282. CRT,RUN,LATCH_DATA, 0x00
  4283.  
  4284. [640,480,8,64,120]
  4285. # Unlock CRTC
  4286. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4287. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4288. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4289. # Dump CRT Controller Registers
  4290. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4291. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4292. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4293. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4294. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4295. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4296. CRT,RUN,MODE_CONTROL,0x02
  4297. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4298. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4299. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4300. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4301. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4302. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4303. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4304. # Lock CRTC Reg 11 for compatibility
  4305. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4306. # Dump ENG Register
  4307. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4308. # Dump MISCOUT Register
  4309. DIR,RUN,MISC_WRITE,0xef
  4310. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4311. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4312. CLK_IND, RUN, FREQ_2, 0x67
  4313. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4314. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4315. CRT,RUN,LATCH_DATA, 0x08
  4316.  
  4317. [640,480,8,52,100]
  4318. # Unlock CRTC
  4319. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4320. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4321. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4322. # Dump CRT Controller Registers
  4323. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4324. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4325. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4326. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4327. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4328. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  4329. CRT,RUN,MODE_CONTROL,0x02
  4330. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4331. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4332. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4333. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4334. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4335. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4336. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4337. # Lock CRTC Reg 11 for compatibility
  4338. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4339. # Dump ENG Register
  4340. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4341. # Dump MISCOUT Register
  4342. DIR,RUN,MISC_WRITE,0xef
  4343. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4344. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4345. CLK_IND, RUN, FREQ_2, 0x50
  4346. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4347. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4348. CRT,RUN,LATCH_DATA, 0x08
  4349.  
  4350. [640,480,8,48,90]
  4351. # Unlock CRTC
  4352. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4353. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4354. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4355. # Dump CRT Controller Registers
  4356. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4357. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4358. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4359. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4360. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4361. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4362. CRT,RUN,MODE_CONTROL,0x02
  4363. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4364. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4365. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4366. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4367. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4368. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4369. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4370. # Lock CRTC Reg 11 for compatibility
  4371. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4372. # Dump ENG Register
  4373. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4374. # Dump MISCOUT Register
  4375. DIR,RUN,MISC_WRITE,0xef
  4376. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4377. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4378. CLK_IND, RUN, FREQ_2, 0x4d
  4379. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4380. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4381. CRT,RUN,LATCH_DATA, 0x08
  4382.  
  4383. [640,480,8,37,75]
  4384. # Unlock CRTC
  4385. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4386. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4387. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4388. # Dump CRT Controller Registers
  4389. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4390. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4391. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4392. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4393. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4394. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4395. CRT,RUN,MODE_CONTROL,0x02
  4396. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4397. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4398. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4399. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4400. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4401. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4402. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4403. # Lock CRTC Reg 11 for compatibility
  4404. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4405. # Dump ENG Register
  4406. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4407. # Dump MISCOUT Register
  4408. DIR,RUN,MISC_WRITE,0xef
  4409. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4410. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4411. CLK_IND, RUN, FREQ_2, 0x3a
  4412. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4413. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4414. CRT,RUN,LATCH_DATA, 0x08
  4415.  
  4416. [640,480,8,37,72]
  4417. # Unlock CRTC
  4418. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4419. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4420. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4421. # Dump CRT Controller Registers
  4422. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4423. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4424. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4425. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4426. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4427. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4428. CRT,RUN,MODE_CONTROL,0x02
  4429. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4430. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4431. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4432. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4433. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4434. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4435. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4436. # Lock CRTC Reg 11 for compatibility
  4437. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4438. # Dump ENG Register
  4439. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4440. # Dump MISCOUT Register
  4441. DIR,RUN,MISC_WRITE,0xef
  4442. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4443. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4444. CLK_IND, RUN, FREQ_2, 0x3a
  4445. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4446. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4447. CRT,RUN,LATCH_DATA, 0x08
  4448.  
  4449. [640,480,8,31,60]
  4450. # Unlock CRTC
  4451. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4452. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4453. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4454. # Dump CRT Controller Registers
  4455. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4456. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4457. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4458. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4459. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4460. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4461. CRT,RUN,MODE_CONTROL,0x02
  4462. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4463. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4464. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4465. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4466. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4467. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4468. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4469. # Lock CRTC Reg 11 for compatibility
  4470. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4471. # Dump ENG Register
  4472. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4473. # Dump MISCOUT Register
  4474. DIR,RUN,MISC_WRITE,0xef
  4475. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4476. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4477. CLK_IND, RUN, FREQ_2, 0x21
  4478. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4479. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4480. CRT,RUN,LATCH_DATA, 0x08
  4481.