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1994-01-31
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APPENDIX E - COMPARISON OF LENA WITH 'BBS' LINEAR CIRCUIT ANALYZERS
===================================================================
AVAILABLE PROGRAM PACKAGES FOR AC ANALYSIS
The following available-on-BBSs have been evaluated:
NOVA - Robert Stanton (Shareware)
15 Church St.
Oneonta, NY 13820
PC-ECAP - PETER VOLPA (Shareware)
Circuit Systems
418 Church Road
Sicklerville, NJ 08081
SPICE - [port to PC from Berkely SPICE TR3e2; requires 4 MB RAM]
Howard LeFevre (Shareware)
22 Santa Bella Rd
Rolling Hills Estates, CA 90274
PSpice - [Design Center - System 2; Evaluation version 5.3]
(version 5.4 is now available)
MicroSim Corporation
20 Fairbanks
Irvine, CA 92718
(800) 245-3022 (info, 8:30 AM - 5:00 PM, PDT)
(714) 455-0554 (FAX only)
(714) 454-7611 (BBS, 1200-9600 Baud, info)
Top SPICE - [Mixed Mode Analog/Digital Demo version 2.13]
PENZAR Development
P.O.Box 10358
Canoga Park, CA 91309
(818) 594-0363
(818) 340-6316 (FAX only)
Note: Electronics Workbench from Interactive Image Technologies Ltd. is
available for PC or Macintosh for $199 and up, free demo available from
the publisher. This was not tried. See advertisements in Electronics
Now magazine for details.
NOVA
Passive components are limited to the basic R, C, and L single devices
with only one source (stimulus, fixed at 1 V). Has some models for
transistors, FETs, Operational amplifiers (no internal breakpoint
frequency), transformers (coefficient of coupling fixed at unity),
transmission line (lossless), plus S-parameters (describeable as two-
ports). No other independent or dependent sources. Output is magnitude,
phase, group delay, impedance at selected node. Frequency sweep is
linear or logarithmic. Time stimulus is limited to a square-wave,
harmonics from 101 to 1001. Numeric co-processor version available.
Executable program file size: 190,032 bytes.
LENA Appendix E - Page 1 of 6
.
PC-ECAP
Analyzes magnitude, phase, group delay, impedance, VSWR and return loss
at a specified node, linear or logarithmic frequency sweep. Maximum
node number is 40, component quantity "unlimited." Component repertoire
has individual R, L, C, transformers (apparently at coupling coefficient
unity), Bipolar transistors (hybrid-pi model), FETs, operational
amplifiers (no internal breakpoint frequency), and voltage-controlled
current sources. Transistors are input via a "model maker" sub-menu.
Number of frequencies is selectable to 35, 70, 140, 280, or 560 points,
no variations. No time-related stimulus available.
Internal calculation is claimed as "15 digits, double precision." If a
numeric co-processor is available, PC-ECAP will use it. Frequency limits
must be put in the Net List; frequency change requires bringing up the
Net List and editing it (built-in list editor). Tabulates and graphs (on
CGA, EGA, or VGA) output at selected node. Executable program file size:
179,342 bytes.
Note: Phase information output will exceed plus/minus 180 degrees up to
720 degrees; some auto-scaling in frequency control causes an overshoot
in the number of frequencies beyond the upper frequency limit.
SPICE (TR3e2)
This one was not examined due to needing 4 Megabytes of RAM (the author
runs his 386SX-20 with only 2 MB). This direct port from SPICE 3
apparently runs mostly in Extended memory. While basic instructions are
given, users are referred to the University of California at Berkeley SPICE
3 User's Manual (address given).
The BBS-distributed program is in 3 ZIPped files and will fit on two high-
density 5 1/4" floppy disks.
PSpice (evaluation)
MicroSim's PSpice is available as an evaluation program set, along with
Probe, the graphical output screen plotter, working with nearly all
standard "Design Center - System 2" features. The evaluation program set
allows circuits of up to 64 nodes and with 10 models; supplied model
library is limited to more common devices. This is a _fully_working_
program within its limitations and is free for distribution on BBSs.
The evaluation version from MicroSim has a nice set of abbreviated
instructions, including a necessary modification of AUTOEXEC.BAT to
enable access to the supplied model library. Graphical display is very
well done for VGA and printer choice is wide, including even the old
Epson MX-80; graphics printing with dot-matrix printers is clear and
comprehensive, inserting plot marking symbols to make up for black-and-
white printing. Full instruction manuals are available for purchase
direct from MicroSim and may be ordered via an 800 number or over their
own BBS.
LENA Appendix E - Page 2 of 6
PSpice, like all SPICE derivatives, is concerned mainly with time domain
stimulus and response. As such, PSpice is excellent. While it does do
small-signal AC analysis, the evaluation version would only output-to-
file phase information, not allowing phase display via Probe.
In PSpice, _every_ node voltage is solved at one pass, then all are
written to a data file. That data file may be read by Probe (a separate
program) and desired output selected there. PSpice will require as much
of 632 KB main memory space as one can afford.
The Net List controls all ranges and output types. While a frequency
sweep may be selected via the main control program, it will be written to
the Net List file or request made to update the file at the end of a
session. Since all control is specified in that Net List, _everything_
is available to the designer: Comprehensive DC analysis, including
stable bias points of semiconductors; Monte Carlo analysis of specified-
percentage components; operating temperature; even a task time breakdown
in seconds, perhaps a left-over from old Batch process days on mainframes.
The PSpice packages are designed for the _professional_ electronics
engineer who _must_ know all these things.
Top SPICE (evaluation)
From a relatively new company in the SPICE business, Top SPICE looks very
much like PSpice. Their graphical screen display is better than PSpice in
the author's opinion, and several of the main program functions are easier
to manipulate. The graphical screen display _does_ show phase.
The evaluation package found on BBSs lacks textual documentation, even the
barest essentials of which program does what and to whom. It is close
enough to PSpice that the functions could be discovered without too much
trouble. Unfortunately, the evaluation package has fewer nodes available
compared to PSpice and the selected comparison could not be performed.
THE COMPARISON CIRCUIT MODEL
PHASER.LIN out of the LENA Program Set was chosen to compare NOVA, PC-
ECAP, PSpice, with LENA. At 28 nodes minimum, it is a medium-sized
circuit model containing no specific active devices. The particular
interconnection scheme fairly well fills most program analysis matrices
after the tenth to twelfth node. This circuit was analyzed independently
on RCA Spectra 70 and XDS Sigma 9 mainframes in 1974, as well as being
built in hardware; previous analyses and working hardware agreed.
The comparison computer was a 386SX running at 20 MHz clock, 387SX numeric
co-processor installed, 2 MB RAM, VGA display, 17 millisecond average
access time IDE hard disk. 200 frequencies in sweep. Time to complete is
in seconds:
NOVA 348 (answers disregarded due to sources; see 1)
PC-ECAP 112 (interpolated from 280-frequency run; see 3)
PSpice 49/130 (49 to complete run, 81 to load data file; see 2)
LENA 168 (no coprocessor version)
LENA 31 (numeric coprocessor version)
LENA Appendix E - Page 3 of 6
Notes -
1. NOVA is limited to one, and only one source. The phasing circuit
requires four, one pair in opposite phase to the other pair. All
others except the LENAs used dependent sources to simulate three
of the inputs. Solution could not be accurately done without four
signal sources so time given is merely the time to analyze.
2. PSpice is fast, solving ALL nodes at one pass, but reading out the
desired nodes requires loading in an ".OUT" file taking nearly
twice as long as the internal analysis. Top SPICE loads an .OUT
file faster, but the evaluation version would not run with 29 nodes.
3. Actual time to complete 280 frequencies in PC-ECAP was 156 seconds;
figure for 200 calculated by 5/7ths of 280-frequency time.
4. Analysis of all except NOVA agree on phase and magnitude.
ODD AND SUNDRY CONCLUSIONS FROM THE TEST...
The executable program sizes of all except the LENAs were much larger.
PSpice and Top SPICE use and create large files, probably using at least
part of Extended memory. SPICE3 needs Extended memory. The created .DAT
file of PSpice's PHASER circuit analysis was 142,278 bytes in size, the
.OUT file 30,638 bytes. LENA's variable storage area in RAM does not
exceed 64 KB beyond the program sizes and can run in 139 KB contiguous
free RAM.
The SPICE derivatives all use the 'batch program' Net List organization of
over a decade ago. While this can be a benefit to program I/O structure,
it is a bit "foreign" to many, especially with many descriptions for a
component or model. The Net List contains all the various stimulus
descriptions but remains the same Net List for recordskeeping purposes; it
can turn out a bit cryptic if viewed weeks or months after a run (but may
be freely commented with an asterisk starting the comment line). As a
circuit and systems designer/engineer, the author likens Net Lists with as
much favor as filling out requisitions for parts and doesn't like having to
look up manufacturer's specific part numbers (akin to the "translation"
sometimes needed with the SPICE Net Lists). Program control commands are
done directly from the Main level in LENA with the circuit list containing
only circuit components.
Pull-down menus are excellent when there are many function choices.
LENA, concentrating on linear/small-signal analysis, has fewer choices
than combination frequency and time-domain analysis programs. For that
reason, the direct command and function control, with only one sub-level
(for circuit changes) was considered more flexible.
SPICE NET LIST TRANSLATION
The following is an abbreviated glossary of common Net List statements in
SPICE files. A beginning-character period or symbol denotes a command or
function while an alphabetic beginning-character generally denotes a
component. Depending on the version, component names are 4 to 8 characters
maximum, only the left-most character denoting the type of component. Most
SPICE versions allow naming of nodes. SPICE convention is to delimit items
LENA Appendix E - Page 4 of 6
with one or more spaces. Component Type is capitalized here for emphasis.
An asterisk here identifies functional equivalents to LENA (for linear
analysis only).
Passive Components
* Rname node1 node2 value Single Resistor
* Cname node1 node2 value Single Capacitor
* Lname node1 node2 value Single Inductor
* Kname Lname1 Lname2 coefficient_of_coupling Transformer; "nodes"
replaced by names of
inductors of primary
and secondary.
Tname node1 node2 node3 node4 <values> Lossless transmission line;
<values> having two choices
ZO=value TD=value -or-
ZO=value F=frequency NL=normalized_length
Dependent Sources
* Gname +node_out -node_out +node_in -node_in value Voltage-controlled
Current source
("GMS" in LENA)
Ename +node_out -node_out +node_in -node_in value Voltage-controlled
Voltage source
* Fname +node_out -node_out +node_in -node_in value Current-controlled
# # Current source
("HFS" in LENA)
Hname +node_out -node_out +node_in -node_in value Current-controlled
# # Voltage source
# current-controlled sources may use Name of
component having control current as single item
replacing input nodes.
Bname +node_out -node_out <I=expression><V=expression> Non-linear I or
V source
Independent Sources
Vname +node -node [DC value][AC value][transient value] Voltage
* Iname +node -node [DC value][AC value][transient value] Current
("SIG" in LENA)
[transient value] in either is one of three choices:
SIN (offset_voltage amplitude frequency [start_delay damping_coef])
* PULSE (V1 V2 pulse_delay [rise fall width period])
PWL (time_pt1 volt_or_ampl1 [time_pt2 volt_or_ampl2 ... ])
LENA Appendix E - Page 5 of 6
Models (first-character identification only)
* S switch D diode
* Q transistor J junction-FET or FET
* O lossy transmission line
X further identification in sub-circuit description
Notes: Gummel-Poon model for transistor is more common in SPICE due to
better simulation in transient analysis than Hybrid-Pi model.
Transmission line model in LENA may be lossy or lossless. In PSpice,
PNP and NPN may be used for transistors in place of Q, also MOSFET in
place of J.
Command or Function description (typical, most common)
.TRAN <conditions> do a transient (time-domain) analysis
.DC <conditions> does a voltage step from low limit to high limit
in increments to see DC transfer characteristics
.TF <node1> <node2> transfer function between two nodes
* .AC DEC <steps_per_decade> <lo_limit> <hi_limit> Logarithmic frequency
range, AC analysis
* .AC LIN <increment> <lo_limit> <hi_limit> Linear frequency range
.AC OCT <steps_per_octave> <lo_limit> <hi_limit> Semi-logarithmic freq.
range by octaves
.NOISE <nodes> [every nth frequency] component noise generation
.TEMP <degrees_C> set operating temperature
.FOUR <node(s)> Fourier coefficients (shows non-linearity effects)
.MC <conditions> Monte Carlo test for specified-tolerance devices
.SUBCKT -or-
.MODEL name begins description of model, description stops at
.END end statement
* .PRINT <node(s)> command to make line-printer tabulation at node(s)
* .PLOT <node(s)> command to make line-printer plot equivalent at
node(s)
LENA Appendix E - Page 6 of 6
.1/31/94