OSAtomic.h |
Includes: |
<libkern/OSBase.h>
|
This header declares the OSAtomic group of functions for atomic reading and updating of values.
Note: This is the kernel-space version of this header. The
user-space functions (in /usr/include/libkern
)
are different. For the user-space version of this header,
see OSAtomic.h (Usesr space)
32-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
16-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
64-bit atomic add operation.
8-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
32-bit logical and operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
16-bit logical and operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
8-bit logical and operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
32-bit logical or operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
16-bit logical or operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
8-bit logical or operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
32-bit logical xor operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
16-bit logical xor operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
8-bit logical xor operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
Compare and swap operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
64-bit compare and swap operation.
Compare and swap operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
32-bit decrement operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
16-bit decrement operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
64-bit decrement.
8-bit decrement operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
Singly linked list element head removal, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
Singly linked list head insertion, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
32-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
16-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
64-bit increment.
8-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
The OSSynchronizeIO routine ensures orderly load and store operations to noncached memory mapped I/O devices.
Bit test and clear operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
Bit test and set operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSAddAtomic |
32-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt32 OSAddAtomic( SInt32 amount, volatile SInt32 *address);
amount
The amount to add.
address
The 4-byte aligned address of the value to update atomically.
The value before the addition
The OSAddAtomic function adds the specified amount to the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSAddAtomic16 |
16-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt16 OSAddAtomic16( SInt32 amount, volatile SInt16 *address);
amount
The amount to add.
address
The 2-byte aligned address of the value to update atomically.
The value before the addition
The OSAddAtomic16 function adds the specified amount to the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSAddAtomic64 |
64-bit atomic add operation.
extern SInt64 OSAddAtomic64( SInt64 theAmount, volatile SInt64 *address);
See OSAddAtomic.
OSAddAtomic8 |
8-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt8 OSAddAtomic8( SInt32 amount, volatile SInt8 *address);
amount
The amount to add.
address
The address of the value to update atomically.
The value before the addition.
The OSAddAtomic8 function adds the specified amount to the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitAndAtomic |
32-bit logical and operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern UInt32 OSBitAndAtomic( UInt32 mask, volatile UInt32 *address);
mask
The mask to logically and with the value.
address
The 4-byte aligned address of the value to update atomically.
The value before the bitwise operation
The OSBitAndAtomic function logically ands the bits of the specified mask into the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitAndAtomic16 |
16-bit logical and operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern UInt16 OSBitAndAtomic16( UInt32 mask, volatile UInt16 *address);
mask
The mask to logically and with the value.
address
The 2-byte aligned address of the value to update atomically.
The value before the bitwise operation.
The OSBitAndAtomic16 function logically ands the bits of the specified mask into the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitAndAtomic8 |
8-bit logical and operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern UInt8 OSBitAndAtomic8( UInt32 mask, volatile UInt8 *address);
mask
The mask to logically and with the value.
address
The address of the value to update atomically.
The value before the bitwise operation.
The OSBitAndAtomic8 function logically ands the bits of the specified mask into the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitOrAtomic |
32-bit logical or operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern UInt32 OSBitOrAtomic( UInt32 mask, volatile UInt32 *address);
mask
The mask to logically or with the value.
address
The 4-byte aligned address of the value to update atomically.
The value before the bitwise operation.
The OSBitOrAtomic function logically ors the bits of the specified mask into the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitOrAtomic16 |
16-bit logical or operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern UInt16 OSBitOrAtomic16( UInt32 mask, volatile UInt16 *address);
mask
The mask to logically or with the value.
address
The 2-byte aligned address of the value to update atomically.
The value before the bitwise operation.
The OSBitOrAtomic16 function logically ors the bits of the specified mask into the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitOrAtomic8 |
8-bit logical or operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
extern UInt8 OSBitOrAtomic8( UInt32 mask, volatile UInt8 *address);
mask
The mask to logically or with the value.
address
The address of the value to update atomically.
The value before the bitwise operation.
The OSBitOrAtomic8 function logically ors the bits of the specified mask into the value at the specified address and returns the original value.
OSBitXorAtomic |
32-bit logical xor operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
extern UInt32 OSBitXorAtomic( UInt32 mask, volatile UInt32 *address);
mask
The mask to logically or with the value.
address
The 4-byte aligned address of the value to update atomically.
The value before the bitwise operation.
The OSBitXorAtomic function logically xors the bits of the specified mask into the value at the specified address and returns the original value.
OSBitXorAtomic16 |
16-bit logical xor operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern UInt16 OSBitXorAtomic16( UInt32 mask, volatile UInt16 *address);
mask
The mask to logically or with the value.
address
The 2-byte aligned address of the value to update atomically.
The value before the bitwise operation.
The OSBitXorAtomic16 function logically xors the bits of the specified mask into the value at the specified address and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSBitXorAtomic8 |
8-bit logical xor operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
extern UInt8 OSBitXorAtomic8( UInt32 mask, volatile UInt8 *address);
mask
The mask to logically or with the value.
address
The address of the value to update atomically.
The value before the bitwise operation.
The OSBitXorAtomic8 function logically xors the bits of the specified mask into the value at the specified address and returns the original value.
OSCompareAndSwap |
Compare and swap operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern Boolean OSCompareAndSwap( UInt32 oldValue, UInt32 newValue, volatile UInt32 *address);
oldValue
The value to compare at address.
newValue
The value to write to address if oldValue compares true.
address
The 4-byte aligned address of the data to update atomically.
true if newValue was written to the address.
The OSCompareAndSwap function compares the value at the specified address with oldVal. The value of newValue is written to the address only if oldValue and the value at the address are equal. OSCompareAndSwap returns true if newValue is written to the address; otherwise, it returns false.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSCompareAndSwap64 |
64-bit compare and swap operation.
extern Boolean OSCompareAndSwap64( UInt64 oldValue, UInt64 newValue, volatile UInt64 *address);
See OSCompareAndSwap.
OSCompareAndSwapPtr |
Compare and swap operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern Boolean OSCompareAndSwapPtr( void *oldValue, void *newValue, void *volatile * address);
oldValue
The pointer value to compare at address.
newValue
The pointer value to write to address if oldValue compares true.
address
The pointer-size aligned address of the data to update atomically.
true if newValue was written to the address.
The OSCompareAndSwapPtr function compares the pointer-sized value at the specified address with oldVal. The value of newValue is written to the address only if oldValue and the value at the address are equal. OSCompareAndSwapPtr returns true if newValue is written to the address; otherwise, it returns false.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSDecrementAtomic |
32-bit decrement operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt32 OSDecrementAtomic( volatile SInt32 *address);
address
The 4-byte aligned address of the value to update atomically.
The value before the decrement.
The OSDecrementAtomic function decrements the value at the specified address by one and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSDecrementAtomic16 |
16-bit decrement operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt16 OSDecrementAtomic16( volatile SInt16 *address);
address
The 2-byte aligned address of the value to update atomically.
The value before the decrement.
The OSDecrementAtomic16 function decrements the value at the specified address by one and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSDecrementAtomic64 |
64-bit decrement.
inline static SInt64 OSDecrementAtomic64( volatile SInt64 *address)
See OSDecrementAtomic.
OSDecrementAtomic8 |
8-bit decrement operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt8 OSDecrementAtomic8( volatile SInt8 *address);
address
The address of the value to update atomically.
The value before the decrement.
The OSDecrementAtomic8 function decrements the value at the specified address by one and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSDequeueAtomic |
Singly linked list element head removal, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern void * OSDequeueAtomic( void *volatile * listHead, SInt32 elementNextFieldOffset);
listHead
The address of a head pointer for the list .
elementNextFieldOffset
The byte offset into the element where a pointer to the next element in the list is stored.
A removed element, or zero if the list is empty.
The OSDequeueAtomic function removes an element from the head of a single linked list, which is specified with the address of a head pointer, listHead. The element structure has a next field whose offset is specified.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSEnqueueAtomic |
Singly linked list head insertion, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern void OSEnqueueAtomic( void *volatile * listHead, void *element, SInt32 elementNextFieldOffset);
listHead
The address of a head pointer for the list .
element
The list element to insert at the head of the list.
elementNextFieldOffset
The byte offset into the element where a pointer to the next element in the list is stored.
The OSEnqueueAtomic function places an element at the head of a single linked list, which is specified with the address of a head pointer, listHead. The element structure has a next field whose offset is specified.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSIncrementAtomic |
32-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt32 OSIncrementAtomic( volatile SInt32 *address);
address
The 4-byte aligned address of the value to update atomically.
The value before the increment.
The OSIncrementAtomic function increments the value at the specified address by one and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device.
OSIncrementAtomic16 |
16-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt16 OSIncrementAtomic16( volatile SInt16 *address);
address
The 2-byte aligned address of the value to update atomically.
The value before the increment.
The OSIncrementAtomic16 function increments the value at the specified address by one and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSIncrementAtomic64 |
64-bit increment.
inline static SInt64 OSIncrementAtomic64( volatile SInt64 *address)
See OSIncrementAtomic.
OSIncrementAtomic8 |
8-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern SInt8 OSIncrementAtomic8( volatile SInt8 *address);
address
The address of the value to update atomically.
The value before the increment.
The OSIncrementAtomic8 function increments the value at the specified address by one and returns the original value.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSSynchronizeIO |
The OSSynchronizeIO routine ensures orderly load and store operations to noncached memory mapped I/O devices.
#if defined(__arm__) extern void OSSynchronizeIO( void); #else static __inline__ void OSSynchronizeIO( void) __asm__ ("eieio") #endif
The OSSynchronizeIO routine ensures orderly load and store operations to noncached memory mapped I/O devices. It executes the eieio instruction on PowerPC processors.
OSTestAndClear |
Bit test and clear operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
extern Boolean OSTestAndClear( UInt32 bit, volatile UInt8 *startAddress);
bit
The bit number in the range 0 through 7.
startAddress
The address of the byte to update atomically.
true if the bit was already clear, false otherwise.
The OSTestAndClear function clears a single bit in a byte at a specified address. It returns true if the bit was already clear, false otherwise.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
OSTestAndSet |
Bit test and set operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
This function guarantees atomicity only with main system memory. It is specifically unsuitable for use on noncacheable memory such as that in devices; this function cannot guarantee atomicity, for example, on memory mapped from a PCI device. Additionally, this function incorporates a memory barrier on systems with weakly-ordered memory architectures.
extern Boolean OSTestAndSet( UInt32 bit, volatile UInt8 *startAddress);
bit
The bit number in the range 0 through 7.
startAddress
The address of the byte to update atomically.
true if the bit was already set, false otherwise.
The OSTestAndSet function sets a single bit in a byte at a specified address. It returns true if the bit was already set, false otherwise.
Last Updated: 2010-07-29