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1990-12-11
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.HM A 1 1 1 1 1 1
.H 1 "Appendix for as1805 Frankenstein Assembler"
.H 2 "Pseudo Operations"
.H 3 "Standard Pseudo Operation Mnemonics"
.VL 40 5 1
.LI "End"
END
.LI "File Inclusion"
INCL
INCLUDE
.LI "If"
IF
.LI "Else"
ELSE
.LI "End If"
ENDI
.LI "Equate"
EQU
.LI "Set"
SET
.LI "Org"
ORG
.LI "Reserve Memory"
RESERVE
RMB
.LI "Define Byte Data"
BYTE
DB
FCB
.LI "Define Word Data"
DW
FDB
WORD
.LI "Define String Data"
FCC
STRING
.LI "Define Character Set Translation"
CHARSET
.LI "Define Character Value"
CHARDEF
CHD
.LI "Use Character Translation"
CHARUSE
.LE
.H 2 "Instructions"
.H 3 "Instruction List"
.TS H
;
l l l.
Opcode Syntax Selection Criteria
.sp
.TH
.sp
ADC
.sp
ADCI '#' expr
.sp
ADD
.sp
ADI '#' expr
.sp
AND
.sp
ANI '#' expr
.sp
B1 expr
.sp
B2 expr
.sp
B3 expr
.sp
B4 expr
.sp
BCI expr TS1805
.sp
BDF expr
.sp
BGE expr
.sp
BL expr
.sp
BM expr
.sp
BN1 expr
.sp
BN2 expr
.sp
BN3 expr
.sp
BN4 expr
.sp
BNF expr
.sp
BNQ expr
.sp
BNZ expr
.sp
BPZ expr
.sp
BQ expr
.sp
BR expr
.sp
BXI expr TS1805
.sp
BZ expr
.sp
CID TS1805
.sp
CIE TS1805
.sp
DACI '#' expr TS1805
.sp
DADC TS1805
.sp
DADD TS1805
.sp
DADI '#' expr TS1805
.sp
DBNZ expr ',' expr TS1805
.sp
DEC expr
.sp
DIS
.sp
DSAV TS1805
.sp
DSBI '#' expr TS1805
.sp
DSM TS1805
.sp
DSMB TS1805
.sp
DSMI '#' expr TS1805
.sp
DTC TS1805
.sp
ETQ TS1805
.sp
GEC TS1805
.sp
GHI expr
.sp
GLO expr
.sp
IDL
.sp
INC expr
.sp
INP expr
.sp
IRX
.sp
LBDF expr
.sp
LBNF expr
.sp
LBNQ expr
.sp
LBNZ expr
.sp
LBQ expr
.sp
LBR expr
.sp
LBZ expr
.sp
LDA expr
.sp
LDC TS1805
.sp
LDI '#' expr
.sp
LDN expr
.sp
LDX
.sp
LDXA
.sp
LSDF
.sp
LSIE
.sp
LSKP
.sp
LSNF
.sp
LSNQ
.sp
LSNZ
.sp
LSQ
.sp
LSZ
.sp
MARK
.sp
NBR expr
.sp
NLBR expr
.sp
NOP
.sp
OR
.sp
ORI '#' expr
.sp
OUT expr
.sp
PHI expr
.sp
PLO expr
.sp
REQ
.sp
RET
.sp
RLDI expr ',' '#' expr TS1805
.sp
RLXA expr TS1805
.sp
RNX expr TS1805
.sp
RSHL
.sp
RSHR
.sp
RSXD expr TS1805
.sp
SAV
.sp
SCAL expr ',' expr TS1805
.sp
SCM1 TS1805
.sp
SCM2 TS1805
.sp
SD
.sp
SDB
.sp
SDBI '#' expr
.sp
SDI '#' expr
.sp
SEP expr
.sp
SEQ
.sp
SEX expr
.sp
SHL
.sp
SHLC
.sp
SHR
.sp
SHRC
.sp
SKP
.sp
SM
.sp
SMB
.sp
SMBI '#' expr
.sp
SMI '#' expr
.sp
SPM1 TS1805
.sp
SPM2 TS1805
.sp
SRET expr TS1805
.sp
STM TS1805
.sp
STPC TS1805
.sp
STR expr
.sp
STXD
.sp
XID TS1805
.sp
XIE TS1805
.sp
XOR
.sp
XRI '#' expr
.TE
.H 3 "Selection Criteria Keywords"
.VL 25 5
.LI TS1805
Instruction is only valid for the 1804A/1805A/1806A instruction sets.
.LE
.H 3 "Apostrophes"
The apostrophes in the syntax field are a notation used for the
parser generator and are not put in the assembler source statement.
.H 2 "Notes"
.H 3 "Instruction Set Selection"
The default is the 1805 instruction set.
To restrict the instruction set, use the -p 1802 optional arguement on
the command line, or rename or link the program file with a name containing
the string 1802 (or just "02").
.H 3 "Register and Port expressions"
The register and port numbers are specified as expressions.
For registers, the value must be between 0 and 15 (1 and 15 for the LDN
instruction).
For input/output ports, the value must be between 1 and 7.
The value must be computable when processed in the first pass.
The SET and EQU statements can be used to setup symbols for registers and
ports.
It is recomended that a standard include file be setup to assign
a set of symbols (like R0 to R15) for registers.
.H 3 "Branch Target Expression Validity"
The "expression fails validity test" error message can occur if the
destination of a short branch is not on the same page as the the last
byte of the instruction.
The "expression exceeds available field width" can also occur for this
case.
Usually the validity message occurs when the destination is at a lower
page, and the width message occurs when the destination is at a higher page.
.H 3 "Immediate Data"
The immediate data expressions for the RLDI (as well as the arithmetic and
logic operations) are required to be on same line as the opcode.
.H 3 "Reserved Symbols"
.H 4 "Standard Reserved Symbols"
AND
DEFINED
EQ
GE
GT
HIGH
LE
LOW
LT
MOD
NE
NOT
OR
SHL
SHR
XOR
and
defined
eq
ge
gt
high
le
low
lt
mod
ne
not
or
shl
shr
xor
.TC 1 1 7