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   This file documents the use and the internals of the GNU compiler.
   Published by the Free Software Foundation 675 Massachusetts Avenue
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File: gcc.info,  Node: Convex Options,  Next: AMD29K Options,  Prev: SPARC Options,  Up: Submodel Options
Convex Options
--------------
   These `-m' options are defined for Convex:
`-mc1'
     Generate output for C1.  The code will run on any Convex machine.
     The preprocessor symbol `__convex__c1__' is defined.
`-mc2'
     Generate output for C2.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C2.  The preprocessor symbol `__convex_c2__' is defined.
`-mc32'
     Generate output for C32xx.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C32.  The preprocessor symbol `__convex_c32__' is defined.
`-mc34'
     Generate output for C34xx.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C34.  The preprocessor symbol `__convex_c34__' is defined.
`-mc38'
     Generate output for C38xx.  Uses instructions not available on C1.
     Scheduling and other optimizations are chosen for max performance
     on C38.  The preprocessor symbol `__convex_c38__' is defined.
`-margcount'
     Generate code which puts an argument count in the word preceding
     each argument list.  This is compatible with regular CC, and a few
     programs may need the argument count word.  GDB and other
     source-level debuggers do not need it; this info is in the symbol
     table.
`-mnoargcount'
     Omit the argument count word.  This is the default.
`-mvolatile-cache'
     Allow volatile references to be cached.  This is the default.
`-mvolatile-nocache'
     Volatile references bypass the data cache, going all the way to
     memory.  This is only needed for multi-processor code that does
     not use standard synchronization instructions.  Making
     non-volatile references to volatile locations will not necessarily
     work.
`-mlong32'
     Type long is 32 bits, the same as type int.  This is the default.
`-mlong64'
     Type long is 64 bits, the same as type long long.  This option is
     useless, because no library support exists for it.
File: gcc.info,  Node: AMD29K Options,  Next: ARM Options,  Prev: Convex Options,  Up: Submodel Options
AMD29K Options
--------------
   These `-m' options are defined for the AMD Am29000:
`-mdw'
     Generate code that assumes the `DW' bit is set, i.e., that byte and
     halfword operations are directly supported by the hardware.  This
     is the default.
`-mndw'
     Generate code that assumes the `DW' bit is not set.
`-mbw'
     Generate code that assumes the system supports byte and halfword
     write operations.  This is the default.
`-mnbw'
     Generate code that assumes the systems does not support byte and
     halfword write operations.  `-mnbw' implies `-mndw'.
`-msmall'
     Use a small memory model that assumes that all function addresses
     are either within a single 256 KB segment or at an absolute
     address of less than 256k.  This allows the `call' instruction to
     be used instead of a `const', `consth', `calli' sequence.
`-mnormal'
     Use the normal memory model: Generate `call' instructions only when
     calling functions in the same file and `calli' instructions
     otherwise.  This works if each file occupies less than 256 KB but
     allows the entire executable to be larger than 256 KB.  This is
     the default.
`-mlarge'
     Always use `calli' instructions.  Specify this option if you expect
     a single file to compile into more than 256 KB of code.
`-m29050'
     Generate code for the Am29050.
`-m29000'
     Generate code for the Am29000.  This is the default.
`-mkernel-registers'
     Generate references to registers `gr64-gr95' instead of to
     registers `gr96-gr127'.  This option can be used when compiling
     kernel code that wants a set of global registers disjoint from
     that used by user-mode code.
     Note that when this option is used, register names in `-f' flags
     must use the normal, user-mode, names.
`-muser-registers'
     Use the normal set of global registers, `gr96-gr127'.  This is the
     default.
`-mstack-check'
`-mno-stack-check'
     Insert (or do not insert) a call to `__msp_check' after each stack
     adjustment.  This is often used for kernel code.
`-mstorem-bug'
`-mno-storem-bug'
     `-mstorem-bug' handles 29k processors which cannot handle the
     separation of a mtsrim insn and a storem instruction (most 29000
     chips to date, but not the 29050).
`-mno-reuse-arg-regs'
`-mreuse-arg-regs'
     `-mno-reuse-arg-regs' tells the compiler to only use incoming
     argument registers for copying out arguments.  This helps detect
     calling a function with fewer arguments than it was declared with.
`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GNU CC.
     Normally the facilities of the machine's usual C compiler are
     used, but this can't be done directly in cross-compilation.  You
     must make your own arrangements to provide suitable library
     functions for cross-compilation.
File: gcc.info,  Node: ARM Options,  Next: M88K Options,  Prev: AMD29K Options,  Up: Submodel Options
ARM Options
-----------
   These `-m' options are defined for Advanced RISC Machines (ARM)
architectures:
`-m2'
`-m3'
     These options are identical.  Generate code for the ARM2 and ARM3
     processors.  This option is the default.  You should also use this
     option to generate code for ARM6 processors that are running with a
     26-bit program counter.
`-m6'
     Generate code for the ARM6 processor when running with a 32-bit
     program counter.
`-mapcs'
     Generate a stack frame that is compliant with the ARM Proceedure
     Call Standard for all functions, even if this is not strictly
     necessary for correct execution of the code.
`-mbsd'
     This option only applies to RISC iX.  Emulate the native BSD-mode
     compiler.  This is the default if `-ansi' is not specified.
`-mxopen'
     This option only applies to RISC iX.  Emulate the native
     X/Open-mode compiler.
`-mno-symrename'
     This option only applies to RISC iX.  Do not run the assembler
     post-processor, `symrename', after code has been assembled.
     Normally it is necessary to modify some of the standard symbols in
     preparation for linking with the RISC iX C library; this option
     suppresses this pass.  The post-processor is never run when the
     compiler is built for cross-compilation.
File: gcc.info,  Node: M88K Options,  Next: RS/6000 and PowerPC Options,  Prev: ARM Options,  Up: Submodel Options
M88K Options
------------
   These `-m' options are defined for Motorola 88k architectures:
`-m88000'
     Generate code that works well on both the m88100 and the m88110.
`-m88100'
     Generate code that works best for the m88100, but that also runs
     on the m88110.
`-m88110'
     Generate code that works best for the m88110, and may not run on
     the m88100.
`-mbig-pic'
     Obsolete option to be removed from the next revision.  Use `-fPIC'.
`-midentify-revision'
     Include an `ident' directive in the assembler output recording the
     source file name, compiler name and version, timestamp, and
     compilation flags used.
`-mno-underscores'
     In assembler output, emit symbol names without adding an underscore
     character at the beginning of each name.  The default is to use an
     underscore as prefix on each name.
`-mocs-debug-info'
`-mno-ocs-debug-info'
     Include (or omit) additional debugging information (about
     registers used in each stack frame) as specified in the 88open
     Object Compatibility Standard, "OCS".  This extra information
     allows debugging of code that has had the frame pointer
     eliminated.  The default for DG/UX, SVr4, and Delta 88 SVr3.2 is
     to include this information; other 88k configurations omit this
     information by default.
`-mocs-frame-position'
     When emitting COFF debugging information for automatic variables
     and parameters stored on the stack, use the offset from the
     canonical frame address, which is the stack pointer (register 31)
     on entry to the function.  The DG/UX, SVr4, Delta88 SVr3.2, and
     BCS configurations use `-mocs-frame-position'; other 88k
     configurations have the default `-mno-ocs-frame-position'.
`-mno-ocs-frame-position'
     When emitting COFF debugging information for automatic variables
     and parameters stored on the stack, use the offset from the frame
     pointer register (register 30).  When this option is in effect,
     the frame pointer is not eliminated when debugging information is
     selected by the -g switch.
`-moptimize-arg-area'
`-mno-optimize-arg-area'
     Control how function arguments are stored in stack frames.
     `-moptimize-arg-area' saves space by optimizing them, but this
     conflicts with the 88open specifications.  The opposite
     alternative, `-mno-optimize-arg-area', agrees with 88open
     standards.  By default GNU CC does not optimize the argument area.
`-mshort-data-NUM'
     Generate smaller data references by making them relative to `r0',
     which allows loading a value using a single instruction (rather
     than the usual two).  You control which data references are
     affected by specifying NUM with this option.  For example, if you
     specify `-mshort-data-512', then the data references affected are
     those involving displacements of less than 512 bytes.
     `-mshort-data-NUM' is not effective for NUM greater than 64k.
`-mserialize-volatile'
`-mno-serialize-volatile'
     Do, or don't, generate code to guarantee sequential consistency of
     volatile memory references.  By default, consistency is guaranteed.
     The order of memory references made by the MC88110 processor does
     not always match the order of the instructions requesting those
     references.  In particular, a load instruction may execute before
     a preceding store instruction.  Such reordering violates
     sequential consistency of volatile memory references, when there
     are multiple processors.   When consistency must be guaranteed,
     GNU C generates special instructions, as needed, to force
     execution in the proper order.
     The MC88100 processor does not reorder memory references and so
     always provides sequential consistency.  However, by default, GNU
     C generates the special instructions to guarantee consistency even
     when you use `-m88100', so that the code may be run on an MC88110
     processor.  If you intend to run your code only on the MC88100
     processor, you may use `-mno-serialize-volatile'.
     The extra code generated to guarantee consistency may affect the
     performance of your application.  If you know that you can safely
     forgo this guarantee, you may use `-mno-serialize-volatile'.
`-msvr4'
`-msvr3'
     Turn on (`-msvr4') or off (`-msvr3') compiler extensions related
     to System V release 4 (SVr4).  This controls the following:
       1. Which variant of the assembler syntax to emit.
       2. `-msvr4' makes the C preprocessor recognize `#pragma weak'
          that is used on System V release 4.
       3. `-msvr4' makes GNU CC issue additional declaration directives
          used in SVr4.
     `-msvr4' is the default for the m88k-motorola-sysv4 and
     m88k-dg-dgux m88k configurations. `-msvr3' is the default for all
     other m88k configurations.
`-mversion-03.00'
     This option is obsolete, and is ignored.
`-mno-check-zero-division'
`-mcheck-zero-division'
     Do, or don't, generate code to guarantee that integer division by
     zero will be detected.  By default, detection is guaranteed.
     Some models of the MC88100 processor fail to trap upon integer
     division by zero under certain conditions.  By default, when
     compiling code that might be run on such a processor, GNU C
     generates code that explicitly checks for zero-valued divisors and
     traps with exception number 503 when one is detected.  Use of
     mno-check-zero-division suppresses such checking for code
     generated to run on an MC88100 processor.
     GNU C assumes that the MC88110 processor correctly detects all
     instances of integer division by zero.  When `-m88110' is
     specified, both `-mcheck-zero-division' and
     `-mno-check-zero-division' are ignored, and no explicit checks for
     zero-valued divisors are generated.
`-muse-div-instruction'
     Use the div instruction for signed integer division on the MC88100
     processor.  By default, the div instruction is not used.
     On the MC88100 processor the signed integer division instruction
     div) traps to the operating system on a negative operand.  The
     operating system transparently completes the operation, but at a
     large cost in execution time.  By default, when compiling code
     that might be run on an MC88100 processor, GNU C emulates signed
     integer division using the unsigned integer division instruction
     divu), thereby avoiding the large penalty of a trap to the
     operating system.  Such emulation has its own, smaller, execution
     cost in both time and space.  To the extent that your code's
     important signed integer division operations are performed on two
     nonnegative operands, it may be desirable to use the div
     instruction directly.
     On the MC88110 processor the div instruction (also known as the
     divs instruction) processes negative operands without trapping to
     the operating system.  When `-m88110' is specified,
     `-muse-div-instruction' is ignored, and the div instruction is used
     for signed integer division.
     Note that the result of dividing INT_MIN by -1 is undefined.  In
     particular, the behavior of such a division with and without
     `-muse-div-instruction'  may differ.
`-mtrap-large-shift'
`-mhandle-large-shift'
     Include code to detect bit-shifts of more than 31 bits;
     respectively, trap such shifts or emit code to handle them
     properly.  By default GNU CC makes no special provision for large
     bit shifts.
`-mwarn-passed-structs'
     Warn when a function passes a struct as an argument or result.
     Structure-passing conventions have changed during the evolution of
     the C language, and are often the source of portability problems.
     By default, GNU CC issues no such warning.
File: gcc.info,  Node: RS/6000 and PowerPC Options,  Next: RT Options,  Prev: M88K Options,  Up: Submodel Options
IBM RS/6000 and PowerPC Options
-------------------------------
   These `-m' options are defined for the IBM RS/6000 and PowerPC:
`-mpower'
`-mno-power'
`-mpower2'
`-mno-power2'
`-mpowerpc'
`-mno-powerpc'
`-mpowerpc-gpopt'
`-mno-powerpc-gpopt'
`-mpowerpc-gfxopt'
`-mno-powerpc-gfxopt'
     GNU CC supports two related instruction set architectures for the
     RS/6000 and PowerPC.  The "POWER" instruction set are those
     instructions supported by the `rios' chip set used in the original
     RS/6000 systems and the "PowerPC" instruction set is the
     architecture of the Motorola MPC6xx microprocessors.  The PowerPC
     architecture defines 64-bit instructions, but they are not
     supported by any current processors.
     Neither architecture is a subset of the other.  However there is a
     large common subset of instructions supported by both.  An MQ
     register is included in processors supporting the POWER
     architecture.
     You use these options to specify which instructions are available
     on the processor you are using.  The default value of these
     options is determined when configuring GNU CC.  Specifying the
     `-mcpu=CPU_TYPE' overrides the specification of these options.  We
     recommend you use that option rather than these.
     The `-mpower' option allows GNU CC to generate instructions that
     are found only in the POWER architecture and to use the MQ
     register.  Specifying `-mpower2' implies `-power' and also allows
     GNU CC to generate instructions that are present in the POWER2
     architecture but not the original POWER architecture.
     The `-mpowerpc' option allows GNU CC to generate instructions that
     are found only in the 32-bit subset of the PowerPC architecture.
     Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows
     GNU CC to use the optional PowerPC architecture instructions in the
     General Purpose group, including floating-point square root.
     Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows
     GNU CC to use the optional PowerPC architecture instructions in
     the Graphics group, including floating-point select.
     If you specify both `-mno-power' and `-mno-powerpc', GNU CC will
     use only the instructions in the common subset of both
     architectures plus some special AIX common-mode calls, and will
     not use the MQ register.  Specifying both `-mpower' and `-mpowerpc'
     permits GNU CC to use any instruction from either architecture and
     to allow use of the MQ register; specify this for the Motorola
     MPC601.
`-mnew-mnemonics'
`-mold-mnemonics'
     Select which mnemonics to use in the generated assembler code.
     `-mnew-mnemonics' requests output that uses the assembler mnemonics
     defined for the PowerPC architecture, while `-mold-mnemonics'
     requests the assembler mnemonics defined for the POWER
     architecture.  Instructions defined in only one architecture have
     only one mnemonic; GNU CC uses that mnemonic irrespective of which
     of thse options is specified.
     PowerPC assemblers support both the old and new mnemonics, as will
     later POWER assemblers.  Current POWER assemblers only support the
     old mnemonics.  Specify `-mnew-mnemonics' if you have an assembler
     that supports them, otherwise specify `-mold-mnemonics'.
     The default value of these options depends on how GNU CC was
     configured.  Specifing `-mcpu=CPU_TYPE' sometimes overrides the
     value of these option.  Unless you are building a cross-compiler,
     you should normally not specify either `-mnew-mnemonics' or
     `-mold-mnemonics', but should instead accept the default.
`-mcpu=CPU_TYPE'
     Set architecture type, register usage, choice of mnemonics, and
     instruction scheduling parameters for machine type CPU_TYPE.  By
     default, CPU_TYPE is the target system defined when GNU CC was
     configured.  Supported values for CPU_TYPE are `rios1', `rios2',
     `rsc', `601', `603', `604', `power', `powerpc', and `common'.
     `-mcpu=power' and `-mcpu=powerpc' specify generic POWER and pure
     PowerPC (i.e., not MPC601) architecture machine types, with an
     appropriate, generic processor model assumed for scheduling
     purposes.
     Specifying `-mcpu=rios1', `-mcpu=rios2', `-mcpu=rsc', or
     `-mcpu=power' enables the `-mpower' option and disables the
     `-mpowerpc' option; `-mcpu=601' enables both the `-mpower' and
     `-mpowerpc' options; `-mcpu=603', `-mcpu=604', and `-mcpu=powerpc'
     enable the `-mpowerpc' option and disable the `-mpower' option;
     `-mcpu=common' disables both the `-mpower' and `-mpowerpc' options.
     To generate code that will operate on all members of the RS/6000
     and PowerPC families, specify `-mcpu=common'.  In that case, GNU CC
     will use only the instructions in the common subset of both
     architectures plus some special AIX common-mode calls, and will
     not use the MQ register.  GNU CC assumes a generic processor model
     for scheduling purposes.
     Specifying `-mcpu=rios1', `-mcpu=rios2', `-mcpu=rsc', or
     `-mcpu=power' also disables the `new-mnemonics' option.
     Specifying `-mcpu=601', `-mcpu=603', `-mcpu=604', or
     `-mcpu=powerpc' also enables the `new-mnemonics' option.
`-mfull-toc'
`-mno-fp-in-toc'
`-mno-sum-in-toc'
`-mminimal-toc'
     Modify generation of the TOC (Table Of Contents), which is created
     for every executable file.  The `-mfull-toc' option is selected by
     default.  In that case, GNU CC will allocate at least one TOC
     entry for each unique non-automatic variable reference in your
     program.  GNU CC will also place floating-point constants in the
     TOC.  However, only 16,384 entries are available in the TOC.
     If you receive a linker error message that saying you have
     overflowed the available TOC space, you can reduce the amount of
     TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc'
     options.  `-mno-fp-in-toc' prevents GNU CC from putting
     floating-point constants in the TOC and `-mno-sum-in-toc' forces
     GNU CC to generate code to calculate the sum of an address and a
     constant at run-time instead of putting that sum into the TOC.
     You may specify one or both of these options.  Each causes GNU CC
     to produce very slightly slower and larger code at the expense of
     conserving TOC space.
     If you still run out of space in the TOC even when you specify
     both of these options, specify `-mminimal-toc' instead.  This
     option causes GNU CC to make only one TOC entry for every file.
     When you specify this option, GNU CC will produce code that is
     slower and larger but which uses extremely little TOC space.  You
     may wish to use this option only on files that contain less
     frequently executed code.
File: gcc.info,  Node: RT Options,  Next: MIPS Options,  Prev: RS/6000 and PowerPC Options,  Up: Submodel Options
IBM RT Options
--------------
   These `-m' options are defined for the IBM RT PC:
`-min-line-mul'
     Use an in-line code sequence for integer multiplies.  This is the
     default.
`-mcall-lib-mul'
     Call `lmul$$' for integer multiples.
`-mfull-fp-blocks'
     Generate full-size floating point data blocks, including the
     minimum amount of scratch space recommended by IBM.  This is the
     default.
`-mminimum-fp-blocks'
     Do not include extra scratch space in floating point data blocks.
     This results in smaller code, but slower execution, since scratch
     space must be allocated dynamically.
`-mfp-arg-in-fpregs'
     Use a calling sequence incompatible with the IBM calling
     convention in which floating point arguments are passed in
     floating point registers.  Note that `varargs.h' and `stdargs.h'
     will not work with floating point operands if this option is
     specified.
`-mfp-arg-in-gregs'
     Use the normal calling convention for floating point arguments.
     This is the default.
`-mhc-struct-return'
     Return structures of more than one word in memory, rather than in a
     register.  This provides compatibility with the MetaWare HighC (hc)
     compiler.  Use the option `-fpcc-struct-return' for compatibility
     with the Portable C Compiler (pcc).
`-mnohc-struct-return'
     Return some structures of more than one word in registers, when
     convenient.  This is the default.  For compatibility with the
     IBM-supplied compilers, use the option `-fpcc-struct-return' or the
     option `-mhc-struct-return'.
File: gcc.info,  Node: MIPS Options,  Next: i386 Options,  Prev: RT Options,  Up: Submodel Options
MIPS Options
------------
   These `-m' options are defined for the MIPS family of computers:
`-mcpu=CPU TYPE'
     Assume the defaults for the machine type CPU TYPE when scheduling
     instructions.  The choices for CPU TYPE are `r2000', `r3000',
     `r4000', `r4400', `r4600', and `r6000'.  While picking a specific
     CPU TYPE will schedule things appropriately for that particular
     chip, the compiler will not generate any code that does not meet
     level 1 of the MIPS ISA (instruction set architecture) without the
     `-mips2' or `-mips3' switches being used.
`-mips1'
     Issue instructions from level 1 of the MIPS ISA.  This is the
     default.  `r3000' is the default CPU TYPE at this ISA level.
`-mips2'
     Issue instructions from level 2 of the MIPS ISA (branch likely,
     square root instructions).  `r6000' is the default CPU TYPE at this
     ISA level.
`-mips3'
     Issue instructions from level 3 of the MIPS ISA (64 bit
     instructions).  `r4000' is the default CPU TYPE at this ISA level.
     This option does not change the sizes of any of the C data types.
`-mfp32'
     Assume that 32 32-bit floating point registers are available.
     This is the default.
`-mfp64'
     Assume that 32 64-bit floating point registers are available.
     This is the default when the `-mips3' option is used.
`-mgp32'
     Assume that 32 32-bit general purpose registers are available.
     This is the default.
`-mgp64'
     Assume that 32 64-bit general purpose registers are available.
     This is the default when the `-mips3' option is used.
`-mint64'
     Types long, int, and pointer are 64 bits.  This works only if
     `-mips3' is also specified.
`-mlong64'
     Types long and pointer are 64 bits, and type int is 32 bits.  This
     works only if `-mips3' is also specified.
`-mmips-as'
     Generate code for the MIPS assembler, and invoke `mips-tfile' to
     add normal debug information.  This is the default for all
     platforms except for the OSF/1 reference platform, using the
     OSF/rose object format.  If the either of the `-gstabs' or
     `-gstabs+' switches are used, the `mips-tfile' program will
     encapsulate the stabs within MIPS ECOFF.
`-mgas'
     Generate code for the GNU assembler.  This is the default on the
     OSF/1 reference platform, using the OSF/rose object format.
`-mrnames'
`-mno-rnames'
     The `-mrnames' switch says to output code using the MIPS software
     names for the registers, instead of the hardware names (ie, A0
     instead of $4).  The only known assembler that supports this option
     is the Algorithmics assembler.
`-mgpopt'
`-mno-gpopt'
     The `-mgpopt' switch says to write all of the data declarations
     before the instructions in the text section, this allows the MIPS
     assembler to generate one word memory references instead of using
     two words for short global or static data items.  This is on by
     default if optimization is selected.
`-mstats'
`-mno-stats'
     For each non-inline function processed, the `-mstats' switch
     causes the compiler to emit one line to the standard error file to
     print statistics about the program (number of registers saved,
     stack size, etc.).
`-mmemcpy'
`-mno-memcpy'
     The `-mmemcpy' switch makes all block moves call the appropriate
     string function (`memcpy' or `bcopy') instead of possibly
     generating inline code.
`-mmips-tfile'
`-mno-mips-tfile'
     The `-mno-mips-tfile' switch causes the compiler not postprocess
     the object file with the `mips-tfile' program, after the MIPS
     assembler has generated it to add debug support.  If `mips-tfile'
     is not run, then no local variables will be available to the
     debugger.  In addition, `stage2' and `stage3' objects will have
     the temporary file names passed to the assembler embedded in the
     object file, which means the objects will not compare the same.
     The `-mno-mips-tfile' switch should only be used when there are
     bugs in the `mips-tfile' program that prevents compilation.
`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GNU CC.
     Normally the facilities of the machine's usual C compiler are
     used, but this can't be done directly in cross-compilation.  You
     must make your own arrangements to provide suitable library
     functions for cross-compilation.
`-mhard-float'
     Generate output containing floating point instructions.  This is
     the default if you use the unmodified sources.
`-mabicalls'
`-mno-abicalls'
     Emit (or do not emit) the pseudo operations `.abicalls',
     `.cpload', and `.cprestore' that some System V.4 ports use for
     position independent code.
`-mlong-calls'
`-mno-long-calls'
     Do all calls with the `JALR' instruction, which requires loading
     up a function's address into a register before the call.  You need
     to use this switch, if you call outside of the current 512
     megabyte segment to functions that are not through pointers.
`-mhalf-pic'
`-mno-half-pic'
     Put pointers to extern references into the data section and load
     them up, rather than put the references in the text section.
`-membedded-pic'
`-mno-embedded-pic'
     Generate PIC code suitable for some embedded systems.  All calls
     are made using PC relative address, and all data is addressed
     using the $gp register.  This requires GNU as and GNU ld which do
     most of the work.
`-membedded-data'
`-mno-embedded-data'
     Allocate variables to the read-only data section first if
     possible, then next in the small data section if possible,
     otherwise in data.  This gives slightly slower code than the
     default, but reduces the amount of RAM required when executing,
     and thus may be preferred for some embedded systems.
`-G NUM'
     Put global and static items less than or equal to NUM bytes into
     the small data or bss sections instead of the normal data or bss
     section.  This allows the assembler to emit one word memory
     reference instructions based on the global pointer (GP or $28),
     instead of the normal two words used.  By default, NUM is 8 when
     the MIPS assembler is used, and 0 when the GNU assembler is used.
     The `-G NUM' switch is also passed to the assembler and linker.
     All modules should be compiled with the same `-G NUM' value.
`-nocpp'
     Tell the MIPS assembler to not run it's preprocessor over user
     assembler files (with a `.s' suffix) when assembling them.
   These options are defined by the macro `TARGET_SWITCHES' in the
machine description.  The default for the options is also defined by
that macro, which enables you to change the defaults.
File: gcc.info,  Node: i386 Options,  Next: HPPA Options,  Prev: MIPS Options,  Up: Submodel Options
Intel 386 Options
-----------------
   These `-m' options are defined for the i386 family of computers:
`-m486'
`-mno-486'
     Control whether or not code is optimized for a 486 instead of an
     386.  Code generated for an 486 will run on a 386 and vice versa.
`-mieee-fp'
`-m-no-ieee-fp'
     Control whether or not the compiler uses IEEE floating point
     comparisons.  These handle correctly the case where the result of a
     comparison is unordered.
`-msoft-float'
     Generate output containing library calls for floating point.
     *Warning:* the requisite libraries are not part of GNU CC.
     Normally the facilities of the machine's usual C compiler are
     used, but this can't be done directly in cross-compilation.  You
     must make your own arrangements to provide suitable library
     functions for cross-compilation.
     On machines where a function returns floating point results in the
     80387 register stack, some floating point opcodes may be emitted
     even if `-msoft-float' is used.
`-mno-fp-ret-in-387'
     Do not use the FPU registers for return values of functions.
     The usual calling convention has functions return values of types
     `float' and `double' in an FPU register, even if there is no FPU.
     The idea is that the operating system should emulate an FPU.
     The option `-mno-fp-ret-in-387' causes such values to be returned
     in ordinary CPU registers instead.
`-mno-fancy-math-387'
     Some 387 emulators do not support the `sin', `cos' and `sqrt'
     instructions for the 387.  Specify this option to avoid generating
     those instructions. This option is the default on FreeBSD.  As of
     revision 2.6.1, these instructions are not generated unless you
     also use the `-ffast-math' switch.
`-msvr3-shlib'
`-mno-svr3-shlib'
     Control whether GNU CC places uninitialized locals into `bss' or
     `data'.  `-msvr3-shlib' places these locals into `bss'.  These
     options are meaningful only on System V Release 3.
`-mno-wide-multiply'
`-mwide-multiply'
     Control whether GNU CC uses the `mul' and `imul' that produce 64
     bit results in `eax:edx' from 32 bit operands to do `long long'
     multiplies and 32-bit division by constants.
`-mreg-alloc=REGS'
     Control the default allocation order of integer registers.  The
     string REGS is a series of letters specifing a register.  The
     supported letters are: `a' allocate EAX; `b' allocate EBX; `c'
     allocate ECX; `d' allocate EDX; `S' allocate ESI; `D' allocate
     EDI; `B' allocate EBP.
File: gcc.info,  Node: HPPA Options,  Next: Intel 960 Options,  Prev: i386 Options,  Up: Submodel Options
HPPA Options
------------
   These `-m' options are defined for the HPPA family of computers:
`-mpa-risc-1-0'
     Generate code for a PA 1.0 processor.
`-mpa-risc-1-1'
     Generate code for a PA 1.1 processor.
`-mjump-in-delay'
     Fill delay slots of function calls with unconditional jump
     instructions by modifying the return pointer for the function call
     to be the target of the conditional jump.
`-mlong-calls'
     Generate code which allows calls to functions greater than 256k
     away from the caller when the caller and callee are in the same
     source file.  Do not turn this option on unless code refuses to
     link with "branch out of range errors" from the linker.
`-mdisable-fpregs'
     Prevent floating point registers from being used in any manner.
     This is necessary for compiling kernels which perform lazy context
     switching of floating point registers.  If you use this option and
     attempt to perform floating point operations, the compiler will
     abort.
`-mdisable-indexing'
     Prevent the compiler from using indexing address modes.  This
     avoids some rather obscure problems when compiling MIG generated
     code under MACH.
`-mportable-runtime'
     Use the portable calling conventions proposed by HP for ELF
     systems.  Note this option also enables `-mlong-calls'.
`-mgas'
     Enable the use of assembler directives only GAS understands.
File: gcc.info,  Node: Intel 960 Options,  Next: DEC Alpha Options,  Prev: HPPA Options,  Up: Submodel Options
Intel 960 Options
-----------------
   These `-m' options are defined for the Intel 960 implementations:
`-mCPU TYPE'
     Assume the defaults for the machine type CPU TYPE for some of the
     other options, including instruction scheduling, floating point
     support, and addressing modes.  The choices for CPU TYPE are `ka',
     `kb', `mc', `ca', `cf', `sa', and `sb'.  The default is `kb'.
`-mnumerics'
`-msoft-float'
     The `-mnumerics' option indicates that the processor does support
     floating-point instructions.  The `-msoft-float' option indicates
     that floating-point support should not be assumed.
`-mleaf-procedures'
`-mno-leaf-procedures'
     Do (or do not) attempt to alter leaf procedures to be callable
     with the `bal' instruction as well as `call'.  This will result in
     more efficient code for explicit calls when the `bal' instruction
     can be substituted by the assembler or linker, but less efficient
     code in other cases, such as calls via function pointers, or using
     a linker that doesn't support this optimization.
`-mtail-call'
`-mno-tail-call'
     Do (or do not) make additional attempts (beyond those of the
     machine-independent portions of the compiler) to optimize
     tail-recursive calls into branches.  You may not want to do this
     because the detection of cases where this is not valid is not
     totally complete.  The default is `-mno-tail-call'.
`-mcomplex-addr'
`-mno-complex-addr'
     Assume (or do not assume) that the use of a complex addressing
     mode is a win on this implementation of the i960.  Complex
     addressing modes may not be worthwhile on the K-series, but they
     definitely are on the C-series.  The default is currently
     `-mcomplex-addr' for all processors except the CB and CC.
`-mcode-align'
`-mno-code-align'
     Align code to 8-byte boundaries for faster fetching (or don't
     bother).  Currently turned on by default for C-series
     implementations only.
`-mic-compat'
`-mic2.0-compat'
`-mic3.0-compat'
     Enable compatibility with iC960 v2.0 or v3.0.
`-masm-compat'
`-mintel-asm'
     Enable compatibility with the iC960 assembler.
`-mstrict-align'
`-mno-strict-align'
     Do not permit (do permit) unaligned accesses.
`-mold-align'
     Enable structure-alignment compatibility with Intel's gcc release
     version 1.3 (based on gcc 1.37).  Currently this is buggy in that
     `#pragma align 1' is always assumed as well, and cannot be turned
     off.
File: gcc.info,  Node: DEC Alpha Options,  Next: Clipper Options,  Prev: Intel 960 Options,  Up: Submodel Options
DEC Alpha Options
-----------------
   These `-m' options are defined for the DEC Alpha implementations:
`-mno-soft-float'
`-msoft-float'
     Use (do not use) the hardware floating-point instructions for
     floating-point operations.  When `-msoft-float' is specified,
     functions in `libgcc1.c' will be used to perform floating-point
     operations.  Unless they are replaced by routines that emulate the
     floating-point operations, or compiled in such a way as to call
     such emulations routines, these routines will issue floating-point
     operations.   If you are compiling for an Alpha without
     floating-point operations, you must ensure that the library is
     built so as not to call them.
     Note that Alpha implementations without floating-point operations
     are required to have floating-point registers.
`-mfp-reg'
`-mno-fp-regs'
     Generate code that uses (does not use) the floating-point register
     set.  `-mno-fp-regs' implies `-msoft-float'.  If the floating-point
     register set is not used, floating point operands are passed in
     integer registers as if they were integers and floating-point
     results are passed in $0 instead of $f0.  This is a non-standard
     calling sequence, so any function with a floating-point argument
     or return value called by code compiled with `-mno-fp-regs' must
     also be compiled with that option.
     A typical use of this option is building a kernel that does not
     use, and hence need not save and restore, any floating-point
     registers.
File: gcc.info,  Node: Clipper Options,  Next: H8/300 Options,  Prev: DEC Alpha Options,  Up: Submodel Options
Clipper Options
---------------
   These `-m' options are defined for the Clipper implementations:
`-mc300'
     Produce code for a C300 Clipper processor. This is the default.
`-mc400'
     Produce code for a C400 Clipper processor i.e. use floting point
     registers f8..f15.
File: gcc.info,  Node: H8/300 Options,  Next: System V Options,  Prev: Clipper Options,  Up: Submodel Options
H8/300 Options
--------------
   These `-m' options are defined for the H8/300 implementations:
`-mrelax'
     Shorten some address references at link time, when possible; uses
     the linker option `-relax'.  *Note `ld' and the H8/300:
     (ld.info)H8/300, for a fuller description.
`-mh'
     Generate code for the H8/300H.
File: gcc.info,  Node: System V Options,  Prev: H8/300 Options,  Up: Submodel Options
Options for System V
--------------------
   These additional options are available on System V Release 4 for
compatibility with other compilers on those systems:
`-Qy'
     Identify the versions of each tool used by the compiler, in a
     `.ident' assembler directive in the output.
`-Qn'
     Refrain from adding `.ident' directives to the output file (this is
     the default).
`-YP,DIRS'
     Search the directories DIRS, and no others, for libraries
     specified with `-l'.
`-Ym,DIR'
     Look in the directory DIR to find the M4 preprocessor.  The
     assembler uses this option.
File: gcc.info,  Node: Code Gen Options,  Next: Environment Variables,  Prev: Submodel Options,  Up: Invoking GCC
Options for Code Generation Conventions
=======================================
   These machine-independent options control the interface conventions
used in code generation.
   Most of them have both positive and negative forms; the negative form
of `-ffoo' would be `-fno-foo'.  In the table below, only one of the
forms is listed--the one which is not the default.  You can figure out
the other form by either removing `no-' or adding it.
`-fpcc-struct-return'
     Return "short" `struct' and `union' values in memory like longer
     ones, rather than in registers.  This convention is less
     efficient, but it has the advantage of allowing intercallability
     between GNU CC-compiled files and files compiled with other
     compilers.
     The precise convention for returning structures in memory depends
     on the target configuration macros.
     Short structures and unions are those whose size and alignment
     match that of some integer type.
`-freg-struct-return'
     Use the convention that `struct' and `union' values are returned
     in registers when possible.  This is more efficient for small
     structures than `-fpcc-struct-return'.
     If you specify neither `-fpcc-struct-return' nor its contrary
     `-freg-struct-return', GNU CC defaults to whichever convention is
     standard for the target.  If there is no standard convention, GNU
     CC defaults to `-fpcc-struct-return', except on targets where GNU
     CC is the principal compiler.  In those cases, we can choose the
     standard, and we chose the more efficient register return
     alternative.
`-fshort-enums'
     Allocate to an `enum' type only as many bytes as it needs for the
     declared range of possible values.  Specifically, the `enum' type
     will be equivalent to the smallest integer type which has enough
     room.
`-fshort-double'
     Use the same size for `double' as for `float'.
`-fshared-data'
     Requests that the data and non-`const' variables of this
     compilation be shared data rather than private data.  The
     distinction makes sense only on certain operating systems, where
     shared data is shared between processes running the same program,
     while private data exists in one copy per process.
`-fno-common'
     Allocate even uninitialized global variables in the bss section of
     the object file, rather than generating them as common blocks.
     This has the effect that if the same variable is declared (without
     `extern') in two different compilations, you will get an error
     when you link them.  The only reason this might be useful is if
     you wish to verify that the program will work on other systems
     which always work this way.
`-fno-ident'
     Ignore the `#ident' directive.
`-fno-gnu-linker'
     Do not output global initializations (such as C++ constructors and
     destructors) in the form used by the GNU linker (on systems where
     the GNU linker is the standard method of handling them).  Use this
     option when you want to use a non-GNU linker, which also requires
     using the `collect2' program to make sure the system linker
     includes constructors and destructors.  (`collect2' is included in
     the GNU CC distribution.)  For systems which *must* use
     `collect2', the compiler driver `gcc' is configured to do this
     automatically.
`-finhibit-size-directive'
     Don't output a `.size' assembler directive, or anything else that
     would cause trouble if the function is split in the middle, and the
     two halves are placed at locations far apart in memory.  This
     option is used when compiling `crtstuff.c'; you should not need to
     use it for anything else.
`-fverbose-asm'
     Put extra commentary information in the generated assembly code to
     make it more readable.  This option is generally only of use to
     those who actually need to read the generated assembly code
     (perhaps while debugging the compiler itself).
`-fvolatile'
     Consider all memory references through pointers to be volatile.
`-fvolatile-global'
     Consider all memory references to extern and global data items to
     be volatile.
`-fpic'
     Generate position-independent code (PIC) suitable for use in a
     shared library, if supported for the target machine.  Such code
     accesses all constant addresses through a global offset table
     (GOT).  If the GOT size for the linked executable exceeds a
     machine-specific maximum size, you get an error message from the
     linker indicating that `-fpic' does not work; in that case,
     recompile with `-fPIC' instead.  (These maximums are 16k on the
     m88k, 8k on the Sparc, and 32k on the m68k and RS/6000.  The 386
     has no such limit.)
     Position-independent code requires special support, and therefore
     works only on certain machines.  For the 386, GNU CC supports PIC
     for System V but not for the Sun 386i.  Code generated for the IBM
     RS/6000 is always position-independent.
     The GNU assembler does not fully support PIC.  Currently, you must
     use some other assembler in order for PIC to work.  We would
     welcome volunteers to upgrade GAS to handle this; the first part
     of the job is to figure out what the assembler must do differently.
`-fPIC'
     If supported for the target machine, emit position-independent
     code, suitable for dynamic linking and avoiding any limit on the
     size of the global offset table.  This option makes a difference
     on the m68k, m88k and the Sparc.
     Position-independent code requires special support, and therefore
     works only on certain machines.
`-ffixed-REG'
     Treat the register named REG as a fixed register; generated code
     should never refer to it (except perhaps as a stack pointer, frame
     pointer or in some other fixed role).
     REG must be the name of a register.  The register names accepted
     are machine-specific and are defined in the `REGISTER_NAMES' macro
     in the machine description macro file.
     This flag does not have a negative form, because it specifies a
     three-way choice.
`-fcall-used-REG'
     Treat the register named REG as an allocatable register that is
     clobbered by function calls.  It may be allocated for temporaries
     or variables that do not live across a call.  Functions compiled
     this way will not save and restore the register REG.
     Use of this flag for a register that has a fixed pervasive role in
     the machine's execution model, such as the stack pointer or frame
     pointer, will produce disastrous results.
     This flag does not have a negative form, because it specifies a
     three-way choice.
`-fcall-saved-REG'
     Treat the register named REG as an allocatable register saved by
     functions.  It may be allocated even for temporaries or variables
     that live across a call.  Functions compiled this way will save
     and restore the register REG if they use it.
     Use of this flag for a register that has a fixed pervasive role in
     the machine's execution model, such as the stack pointer or frame
     pointer, will produce disastrous results.
     A different sort of disaster will result from the use of this flag
     for a register in which function values may be returned.
     This flag does not have a negative form, because it specifies a
     three-way choice.
`+e0'
`+e1'
     Control whether virtual function definitions in classes are used to
     generate code, or only to define interfaces for their callers.
     (C++ only).
     These options are provided for compatibility with `cfront' 1.x
     usage; the recommended alternative GNU C++ usage is in flux.
     *Note Declarations and Definitions in One Header: C++ Interface.
     With `+e0', virtual function definitions in classes are declared
     `extern'; the declaration is used only as an interface
     specification, not to generate code for the virtual functions (in
     this compilation).
     With `+e1', G++ actually generates the code implementing virtual
     functions defined in the code, and makes them publicly visible.