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INT 01 - CPU-generated - SINGLE STEP
Desc:   generated after each instruction if TF (trap flag) is set; TF is
          cleared on invoking the single-step interrupt handler
Notes:  interrupts are prioritized such that external interrupts are invoked
          after the INT 01 pushes CS:IP/FLAGS and clears TF, but before the
          first instruction of the handler executes
        used by debuggers for single-instruction execution tracing, such as
          MSDOS DEBUG's T command

See Also: 03
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