Smart battery charger chip presented at ESSCIRC Conference

SGS-THOMSON Microelectronics presented the first device from a new series of 'Super Smart Power' integrated circuits at the European Solid-State Circuits Conference (ESSCIRC) in Lille, France, last week.

A major advance in smart power IC technology, the L6901 Smart Battery Charger is the first commercial smart power chip to integrate an on-board micro and program memory. Included on this 60V chip are an ST6 8-bit microcomputer core, a high-current dc-dc converter, an 8-bit analog-to-digital converter and other circuits needed for battery management.

With suitable software the L6901 charges rapidly and safely the nickel cadmium (NiCd) and nickel metal hydride (NiMH) batteries used widely in popular products such as cellular phones, laptop computers and camcorders.

Software controlled charging makes it possible to extract the best possible performance from these batteries by managing optimally the charging cycle. While in theory fast charging is simply a matter of pumping current as fast as possible, in practice it is essential to avoid overcharging or the battery can be damaged. Thanks to accurate current control, temperature monitoring and voltage sensing, the L6901 can implement optimal charging algorithms. Moreover a single chip can store software to charge different battery types.

The L6901's PWM current controller section includes a 0.15W (typical) vertical DMOS power transistor capable of delivering very high peak currents with no heatsink or power package (a standard SO-28 package is used). The main loop contains both a current loop, used to regulate precisely the battery current, and a voltage loop which prevents over-voltage damage.

An internal phase-locked loop derives the switching clock from a 4MHz crystal; a software controlled pre-scaler selects different switching frequencies from 80-170kHz so that magnetic component size can be optimized and radiation minimized.

Designed for initial evaluation and prototyping work, the L6901 provides 2kbyte of One-Time-Programmable (OTP) EPROM for the program memory. Commercial samples of the device will be available towards the end of 1995. A version with 4kbyte ROM memory is also planned.

BCD3 Technology The L6901 exploits an advanced 1.2 micron mixed bipolar-CMOS-DMOS (BCD) process that allows the integration of high complexity CMOS cells on a 60V power IC.

This technology is the third generation of a process called Multipower-BCD, invented by SGS in the mid 1980s, which combined power DMOS and junction-isolation IC technology to create a versatile power technology that combined the density of CMOS, the precision of bipolar and the efficiency of power DMOS. The original 4 micron process was shrunk to 2.5 micron in 1990 then to 1.2 micron in 1993. Additionally, the process has also acquired the capability of integrating non-volatile memory.

The third generation process is a 1.2 micron twin-well CMOS technology with double polysilicon level and triple metal gate. EPROM And EEPROM memory cells have one polysilicon level. Vertical DMOS transistors with a breakdown voltage of 60V have an ON resistance of 0.3W/mm²; 20V lateral DMOS transistors have an ON resistance of 0.1W/mm².

Because of its great flexibility and high density, BCD3 technology is ideal for those applications where a complete system or subsystem must be integrated on one chip, either because space is limited or to reduce interconnections.

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