High performance 486DX ASIC core

SGS-THOMSON Microelectronics has announced the availability of the world's first true 486 core - a fully static ST486DX ASIC core that can be used in conjunction with a high performance semicustom standard cell technology and a comprehensive library of functions to build powerful embedded systems. Targetted at emerging applicatons such as hand-held computers and multimedia terminals, the ST486DX ASIC core is the only embedded microprocessor core to offer full x86 functionality along with DOS and Windows compatibility.

Manufactured in a high speed 0.35 micron, five-layer metal, low voltage HCMOS process that can support chip sizes of over two million equivalent usable gates, the ST486DX core is based on the design used for the clock-tripled ST486DX4 microprocessor and is therefore capable of operating at one, two or three times the external bus speed, up to a maximum of 120MHz. The CPU core is based on a five-stage pipeline optimized for fastest instruction execution; key features include hardware interlocks to permit instruction overlapping, a hardware multiplier and single-cycle execution of many of the most frequently used instructions.

To fully exploit the high internal clock speeds, the core includes eight write buffers and an on-chip cache that can be configured to run either in the traditional write-through mode or in the higher performance write-back mode that minimises bus bottlenecks by eliminating unnecessary write cycles. The on-chip cache is an 8kbyte instruction/data cache implemented using a four-way set-associative architecture and a Least Recently Used (LRU) replacement algorithm. The CPU can access data and instructions held in the cache in a single internal clock cycle for both read and write operations.

The ST486DX core includes sophisticated power management features that provide substantially longer battery life compared to systems built with non-static 486 processors. These include a Suspend mode in which typical current consumption is cut by two orders of magnitude, with no loss of internal data even when the clock is completely stopped. In addition, the integral Floating Point execution Unit (FPU) is automatically powered down when not in use, reducing the chip's overall power consumption still further.

The ST486DX core is supported by a full set of macrocells and macrofunctions, module generators and embedded functions. The cell library is optimised for use with synthesis and HDL-based design techniques, while the macrofunctions include all of the key blocks such as IDE, DRAM and PCI controllers, interval timers and MIDI ports required to build PC and multimedia subsystems. Module generators are available for ROM, single-port RAM and dual-port RAM, while the available embedded functions include mixed mode cells for graphics and data conversion, DSP functions, 100Mbps serial transputer links, Viterbi and Reed-Solomon cores for HDTV and satellite transmission applications and MPEG2 decoders for set top box and cable applications.

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