List of selected IEEE journal publications by
Dr V. Milutinovic and his associates
The list includes only the papers after 1.1.1990.
NOTE
Papers from other international journals are NOT listed.
Listed papers are spanning the areas:
from advanced processor design and data communications/networking
to cache consistency and distributed shared memory
RESPONSE
These papers have generated the following citations:
over 50 SCI hard citations (excluding self-citations of 1st and 2nd
level)
over 100 USA textbook citations (including thesis-work of MSC and PHD
level)
over 1000 IEE inspec citations
- V. Milutinovic, "Tutorial on Microprogramming and Firmware Engineering,"
IEEE Computer Society Press, Los Alamitos, California, 1990.
- B. Perunicic, S. Lakhani, V. Milutinovic, "Stochastic Modeling
and Analysis of Propagation Delays in GaAs Adders," IEEE Transactions
on Computers, Vol. 40, No. 1, January 1991, pp. 31-45.
- V. Milutinovic, D. Fura, W. Helbig, "Pipeline Design Trade-offs
in 32-bit Gallium Arsenide Microprocessor," IEEE Transactions on Computers,
Vol. 40, No. 11, November 1991, pp. 1214-1224.
- V. Milutinovic, L. Hoevel, "Terminology Risks with the RISC Concept
in the Risky RISC Arena," IEEE Computer, Vol. 25, No. 1, January 1992
(Open Channel).
- M. Tomasevic, V. Milutinovic, "Tutorial on the Cache Coherency
Problem in Shared-Memory Multiprocessors: Hardware Solutions," IEEE
Computer Society Press, Los Alamitos, California, 1993.
- M. Tomasevic, V. Milutinovic, "A Survey of Hardware Solutions
for Maintenance of Cache Consistency in Shared Memory Multiprocessor Systems,"
IEEE MICRO (Part #1), October 1994.
- M. Tomasevic, V. Milutinovic, "A Survey of Hardware Solutions
for Maintenance of Cache Consistency in Shared Memory Multiprocessor Systems,"
IEEE MICRO (Part #2), December 1994.
- V. Milutinovic, Z. Petkovic, "Processor Design Using Silicon Compilation:
Ten Lessons Learned from a RISC Design," IEEE Computer, Vol. 28, No.
3, March 1995 (Open Channel).
- S. Savic, M. Tomasevic, V. Milutinovic,
"Improved RMS for the PC Environment,"
Microprocessor Systems, Vol. 19. No. 10, September 1995, pp. 609-619.
A follow up paper will be published in an IEEE journal.
- I. Ekmecic, I. Tartalja, V. Milutinovic, "A Taxonomy of Heterogeneous
Computing," IEEE Computer, Vol. 28, No. 12, December 1995 (Hot Topics).
- I. Tartalja, V. Milutinovic, "Tutorial on the Cache Coherency
Problem in Shared-Memory Multiprocesors: Software Solutions," IEEE
Computer Society Press, Los Alamitos, California, 1996.
- M. Tomasevic, V. Milutinovic, "The World Invalidate Protocol,"
Microprocessor Systems, January 1996. A follow up paper will be published
in an IEEE journal.
- A. Grujic, M. Tomasevic, V. Milutinovic, "A Simulation Study of
Hardware DSM Approaches," IEEE Parallel and Distributed Technology,
Spring 1996.
- D. Milutinovic, V. Milutinovic, "Mapping of Interconnection Networks
for Parallel Processing onto the Sea-of-Gates VLSI," IEEE Computer,
Vol. 29, No. 6, June 1996
- J. Protic, M. Tomasevic, V. Milutinovic, "A Survey of Distributed
Shared Memory: Concepts and Systems," IEEE Parallel and Distributed
Technology, Fall 1996.
- I. Tartalja, V. Milutinovic, "A Survey of Software Solutions for
Cache Consistency Maintenance in Shared Memory Multiprocessors," IEEE
Software, Fall 1996.
- V. Milutinovic, "Surviving the Design of a 200MHz RISC Microprocessor:
Lessons Learned," IEEE Computer Society Press, Los Alamitos, California,
1996.
- J. Protic, M. Tomasevic, V. Milutinovic, "Tutorial on DSM: Concepts
and Systems," IEEE Computer Society Press, 1996.
- I. Ekmecic, I. Tartalja, V. Milutinovic, "A Survey of Heterogeneous
Computing: Concepts and Systems," Proceedings of the IEEE, 1996.
- D. Milicev, Z. Petkovic, D. Raskovic, D. Jelic, D. Jelisavcic, D. Stevanovic,
V. Milutinovic, "Modeling of Modern 32-bit and 64 bit Microprocessors,"
IEEE Transactions on Education, 1996.
- V. Milutinovic, "A Research Methodology in the Field of Computer
Engineering for VLSI," IEEE Transactions on Education, 1997 (submitted).
Conference version available from the Proceedings of the IEEE MIEL-95,Nis,
Serbia, Yugoslavia, September 1995.
-
V. Milutinovic, M. Tomasevic, B. Markovic, M. Tremblay, "The Split
Temporal/Spatial Cache Memory for Next Generation SuperMicroprocessors,"
IEEE COMPUTER, 1997 (submitted). Conference version available from the
Proceedings of the IEEE MELECON-96,
Bari, Italy, May 1996.