Parallel Hardware and Programming Models

Parallel Hardware and Programming Models

Silicon Graphics makes a variety of multiprocessor systems, including

The CHALLENGE/Onyx systems (and their POWER versions) are symmetric multiprocessor (SMP) computers. In these systems at least 2, and as many as 36, identical microprocessors access a single, common memory and a common set of peripherals through a high-speed bus.
The POWER CHALLENGEarray(TM) comprises 2 or more POWER CHALLENGE(TM) systems connected by a high-speed local HIPPI network. Each node in the array is an SMP with 2 to 36 CPUs. Nodes do not share a common memory; communication between programs in different nodes passes through sockets. However, the entire array can be administered and programmed as a single entity.

Most programs that run on these systems execute as if they were in a uniprocessor, employing the facilities of a single CPU. The IRIX operating system applies CPUs to different programs in order to maximize system throughput.

However, it is possible to write a program so that it makes use of more than one CPU at a time. The software interface you use for this is the parallel programming model. Each model is designed around a different set of assumptions about the hardware, and in particular about the memory system available.

Parallel Programs on Uniprocessors
Memory Systems
Types of Parallel Models