On the Indigo2, the hardware implementation of a locked cycle is limited. Indigo2 allows an EISA card to issue a locked cycle, but only for the duration of two contiguous read/write operations. Access to this class of cycles is provided on the CPU side, much like the read/modify/write cycle on a VME bus, through the pio_rmw* kernel functions. See "Writing a Kernel-level EISA Device Driver."
In general, LOCK* is not considered to be a supported feature of the Silicon Graphics EISA implementation.