Int 06  - CPU-generated (80286+) - Invalid Opcode                          [C]

Desc:  this interrupt is generated when the CPU attempts to execute an
     invalid opcode (most protected-mode instructions are considered
     invalid in real mode) or a BOUND, LDS, LES, or LIDT instruction
     which specifies a register rather than a memory address

Notes: return address points to beginning of invalid instruction
   with proper programming, this interrupt may be used to emulate
     instructions which do not exist; many 386 BIOSes emulate the 80286
     undocumented LOADALL instruction which was removed from the 80386+
   generated by the 80386+ when the LOCK prefix is used with instructions
     other than BTS, BTR, BTC, XCHG, XADD (486), CMPXCHG (486), INC, DEC,
     NOT, NEG, ADD, ADC, SUB, SBB, AND, OR, or XOR, or any instruction
     not accessing memory.

See Also: INT 0C"CPU",INT 0D"CPU"