Page Fault handling Information

The Translation Lookaside Buffer (TLB) is a hardware cache for physical addresses of the most recently used virtual addresses. When a virtual address is translated the 386 first looks in the TLB to see if the information it needs is available. If not, it has to make a couple of memory references to get at the page directory and then the page table before it can actually get at the page. Three physical memory references for address translation for every logical memory reference would kill the system, hence the TLB. The TLB is flushed if CR3 loaded or by task switch that changes CR0. It is explicitly flushed in Linux by calling <#2183#> invalidate()<#2183#> which just reloads CR3.