Developer Documentation
   

Microprocessor and Cache

The microprocessor communicates with the rest of the system by way of a 100-MHz, 64-bit 60x bus to the Uni-N IC. The microprocessor has a separate backside bus to its second-level cache.

G3 Microprocessor

Backside Cache


© 2000 Apple Computer, Inc. – (Last Updated 01 Aug 00)