6 Stage Pipeline
Multiprocessor support via bus snooping.
4GB Direct Addressing Range
Known Versions
25Mhz (PGA)
33Mhz (PGA)
25Mhz (PLCC)
33Mhz (PLCC)
40Mhz in PGA and PLCC may exist.
Registers
8 Data Registers (D0-D7) - 32bit
8 Address Registers (A0-A7) - 32bit
NB. A7 is also USP (User Stack Pointer)
PC (Program Counter)
CCR (Condition Code Register)
Supervisor Mode Registers
ISP (Interrupt Stack Pointer) - 32bit
MSP (Master Stack Pointer) - 32bit
SR (Status Register) - 16bit
VBR (Vector Base Register) - 32bit
SFC (Source Function Code) - 32bit
DFC (Destination Function Code) - 32bit
CACR (Cache Control Register) - 32bit
URP (User Root Pointer)
SRP (Supervisor Root Pointer)
TC (Translation Control Register)
DTT0 (Data Transparent Translation Register 0)
DTT1 (Data Transparent Translation Register 1)
ITT0 (Instruction Transparent Translation Register 0)
ITT1 (Instruction Transparent Translation Register 1)
MMUSR (MMU Status Register)
For a complete user manual on this processor free of charge order M68040UM/AD from Motorola's web site. Motorola
As far as I know this particular model of the 68000 series has not been used in
any Amigas, clones or accelerator boards but is definately compatible. However there are confirmed reports of hardware hackers getting it to work with the CS MkI