16.3 Virtual Address Translation
The processor's current ASID is stored in the low 8 bits of the EntryHi register. These bits are also used to load the ASID field of an entry during TLB refill.
The ASID field of each TLB entry is compared to the EntryHi register; if the ASIDs are equal or if the entry is global (see below), this TLB entry may be used to translate virtual addresses. The ASID comparison is performed only when a new value is loaded into the EntryHi register; the one-bit result of the match is stored in a static Enable latch. (This bit is set whenever a new entry is loaded.)