4. Cache Organization and Coherency
The secondary cache is two-way set associative (that is, two cache blocks are assigned to each set, as shown in Figure 4-6) with an LRU replacement algorithm.*1
The secondary cache uses a write back protocol, which means a cache store writes data into the cache instead of writing it directly to memory. Some time later this data is independently written to memory.
The secondary cache is indexed with a physical address and tagged with a physical address.
Figure 4-6 Organization of Secondary Cache
Each secondary cache block is in one of the following four states:
Figure 4-7 Secondary Cache State Diagram
A secondary cache block can be changed from one state to another as a result of any of the following events:
These events are illustrated in Figure 4-7, which shows the secondary cache state diagram.
Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96
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