6. System Interface Operations
SysCyc* input to the processor allows an external agent to define a virtual system clock, and yet supply a SysClk within the acceptable operating range. The assertion of SysCyc* in a particular SysClk cycle creates a virtual system clock pulse four SysClk cycles later. SysCyc* may be asserted aperiodically.
In a normal system environment, the SysCyc* input should be permanently asserted.
Figure 6-29 depicts the use of SysCyc* to create a virtual SysClk of one-third the normal SysClk frequency.

Figure 6-29 Hardware Emulation Protocol