8. Initialization
SysADChk[7:0] bus does not have to contain correct ECC during mode bit initialization. During the reset sequence, the mode bits obtained from SysAD[24:0] are written into bits 24:0 of the CP0 Config register.
The mode bits are described in Table 8-1.
Table 8-1 Mode Bits

Table 8-1 (cont.) Mode Bits

Table 8-1 (cont.) Mode Bits

Bits 28:25 of Table 8-1; see page 155 of Errata.