14.10 Status Register (12)

Coprocessor Accessibility


Three Status register CU bits control coprocessor accessibility: CU0, CU1, and CU2 enable coprocessors 0, 1, and 2, respectively. If a coprocessor is unusable, any instruction that accesses it generates an exception.

The following describes the coprocessor implementations and operations on the R10000:




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


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