6. System Interface Operations

6.23 Support for Uncached Attribute


The processor
supports a 2-bit user-defined Uncached Attribute, which is driven on SysAD[59:58] during the address cycle of the following:

For unmapped accesses, the uncached attribute is sourced from VA[58:57].

For mapped accesses, the uncached attribute is sourced from the TLB Uncached Attribute field. The TLB Uncached Attribute field may be initialized in 64-bit mode using bits 63:62 of the CP0 EntryLo0 and EntryLo1 registers.




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


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