17.3 TLB Refill Vector Selection
The Cold Reset exception is taken for a power-on or "cold" reset; it occurs when the SysGnt* signal is asserted while the SysReset* signal is also asserted.*1 This exception is not maskable.
Processing
The CPU provides a special interrupt vector for this exception:
The contents of all registers in the CPU are undefined when this exception occurs, except for the following register fields:
The Cold Reset exception is serviced by:
The Cold Reset vector resides in unmapped and uncached CPU address space, so the hardware need not initialize the TLB or the cache to process this exception. It also means the processor can fetch and execute instructions while the caches and virtual memory are in an undefined state.
Servicing