
10. CACHE Instructions

10.21 Index Store Data (D)
Index Store Data (D) stores a word of data and its byte parity into the data cache from the CP0 TagLo and ECC registers. The address where this word will be written is defined by VA[13:2] of the CACHE instruction. The way is defined by VA[0]. The data word comes from CP0 TagLo. The parity bits come from CP0 ECC[3:0]. The data cache tag array including the LRU bit is left unchanged.

Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96



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