The following terms are defined in this Glossary:
- superscalar processor
- pipeline
- pipeline latency
- pipeline repeat rate
- out-of-order execution
- dynamic scheduling
- instruction fetch, decode, issue, execution, completion, and graduation
- active list
- free list and busy registers
- register renaming and unnaming
- nonblocking loads and stores
- speculative branching
- logical and physical registers
- register files
- ANDES architecture
Chapter Contents
- A.1 - Superscalar Processor
-
- A.2 - Pipeline
-
- A.3 - Pipeline Latency
-
- A.4 - Pipeline Repeat Rate
-
- A.5 - Out-of-Order Execution
-
- A.6 - Dynamic Scheduling
-
- A.7 - Instruction Fetch, Decode, Issue, Execution, Completion, and Graduation
-
- A.8 - Active List
-
- A.9 - Free List and Busy Registers
-
- A.10 - Register Renaming
-
- A.11 - Nonblocking Loads and Stores
-
- A.12 - Speculative Branching
-
- A.13 - Logical and Physical Registers
-
- A.14 - Register Files
-
- A.15 - ANDES Architecture
-