14.22 CacheErr Register (27)
Figure 14-27 CacheErr Register Format for System Interface Errors
EW: set when CacheErr register is already holding the values of a previous error
EE: data error on a CleanExclusive or DirtyExclusive
D: uncorrectable system block data response error (way1 || way0)
SA: uncorrectable system address bus error
SC: uncorrectable system command bus error
SR: uncorrectable system response bus error
SIdx: secondary cache physical block index