
1.8 R10000-Specific CPU Instructions

PREF
In the R1000 processor, the Prefetch instruction, PREF, attempts to fetch data into the secondary and primary data caches. The action taken by a Prefetch instruction is controlled by the instruction hint field, as decoded in Table 1-1.
Table 1-1 PREF Instruction Hint Field

For a "store" Prefetch, an Exclusive copy of the cache block must be obtained, in order that it may be written.

Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96



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