15.4 Floating-Point Control Registers

Floating-Point Implementation and Revision Register


The following fields are defined for control register 0 in Coprocessor 1, the FP Implementation and Revision register, as shown in Figure 15-6:



Figure 15-6 FP Implementation and Revision Register Format




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


Generated with CERN WebMaker