12.1 DC Electrical Specification
Tables 12-2 and 12-3 describe the DC characteristics of the I/O signals for the HSTL and CMOS/TLL configurations.
Table 12-3 DC Characteristics for CMOS/TTL Configuration
NOTE: As the JEDEC Standard 8-x evolves, the HSTL specifications will also change, and the processor will remain compliant with these standards.
Table 12-2 DC Characteristics for HSTL Configuration