From: IN%"famidev@busop.cit.wayne.edu" 4-JUN-1993 01:58:14.76 To: IN%"famidev@busop.cit.wayne.edu" "Super Famicom Development Group" CC: Subj: pinout Return-path: Received: from foghorn.pass.wayne.edu by Jetson.UH.EDU (PMDF V4.2-11 #3125) id <01GYYP0WIERK8Y703W@Jetson.UH.EDU>; Fri, 4 Jun 1993 01:58:08 CDT Received: from busop.cit.wayne.edu ([141.217.75.40]) by foghorn.pass.wayne.edu (4.1/SMI-4.1) id AA06375; Fri, 4 Jun 93 02:58:50 EDT Received: from WSU_BUSOP/MERCURYQUE by busop.cit.wayne.edu (Mercury 1.0); Fri, 4 Jun 93 2:53:18 EST Date: Thu, 03 Jun 1993 23:55:52 -0700 (MST) From: vapor@indirect.com (Scott) Subject: pinout Sender: Listserv@busop.cit.wayne.edu To: Super Famicom Development Group Reply-to: famidev@busop.cit.wayne.edu Message-id: <21A05E3E86@busop.cit.wayne.edu> X-Mailer: Mercury MTA v1.0. Content-transfer-encoding: 7BIT Here is a version of the SNES cart edge pinout. I have posted this before, but apparently no one cared at the time. The only extra pin that StarFox uses is pin 1, the 21Mhz signal clocks the SuperFX chip. The CPU is also clocked from a divided down version of Pin 1. /RomEnable is asserted when the address is $8000-FFFF 1 21 Mhz clock 32 ? 2 ? 33 ? 3 ? 34 ? 4 ? 35 ? 5 Gnd 36 Gnd 6 A11 37 A12 7 A10 38 A13 8 A9 39 A14 9 A8 40 A15 10 A7 41 A16 11 A6 42 A17 12 A5 43 A18 13 A4 44 A19 14 A3 45 A20 15 A2 46 A21 16 A1 47 A22 17 A0 48 A23 18 /IRQ 49 /RomEnable 19 D0 50 D4 20 D1 51 D5 21 D2 52 D6 22 D3 53 D7 23 /Read 54 /Write 24 Security 55 Security 25 Security 56 Security chip clock 26 Reset 57 ? 27 Vcc 58 Vcc 28 ? 59 ? 29 ? 60 ? 30 ? 61 ? 31 L chan sound 62 R chan sound