Preface››Fifteen years after the introduction of the Atari 8-bit computer,›virtually the entire base of machines is still using the same CPU,›and thus has the same basic processing power as when the machine was›first shipped. Not that we need to be like other platforms -- which›seem to get CPU upgrades before you've had enough time to pay off›the credit card bill on the last system -- but we have missed out on›a great amount of satisfaction that comes when you find out that you›can do tasks faster, easier, and better than before. Or when you find›that the machine is now capable of feats that it previously could not›achieve.››When I met the 65816 processor for the first time, I was immediately›captivated by the range of enhancements that it provided. It was a›feeling surpassed only by the still cherished memory of my first›successful Assembly language program. Some of these enhancements are›brilliant, and are implemented in very clever ways. For the designers›to have achieved this much, and yet remain completely compatible with›the 6502 at the same time, is truly a work of art. It is a processor›that plain and simply _belongs_ inside the Atari computer; for the Atari›is unquestionably in my mind the best 8-bit computer that has ever been›created, or will ever be created. It is itself a work of art, that more›than anything else, is responsible for the attachment I have to computers,›and to programming in particular. There is no other machine more deserving,›or more able to utilize the extra power of the 65816. As an Atari enthusiast›since 1979, it gives me great pleasure to be a part of this new upgrade for›the machine.››John Harris›Ahwahnee, California›››Programming notes for the 65816.››The 65816 is a wonderful improvement over the 6502, containing 78 new›opcodes, 9 new addressing modes, block memory moves, 16-bit registers,›relocatable stack and zero-page, and a 16 megabyte linear address space.›This is intended to be an introduction to the many new features and›techniques provided by the 65816 processor.› ›- Native Mode -››The 816 powers-up in a state known as "6502 emulation mode". This is its›default state, where it remains virtually 100% compatible with the 6502.›Most of the 816's enhancements are still available in emulation mode,›including 24-bit addressing, and the new opcodes and addressing modes.›The primary missing ingredient is 16-bit registers. These are not available›until the processor is switched into a different state, known as›"native mode". This mode switching was necessary so that enhancements›could be provided for the CPU, while still maintaining a way to provide›complete 6502 compatibility. As such, there are a number of operational›differences when the 816 is in native mode, and these will be noted in the›upcoming sections.››Switching between native and emulation modes is accomplished with a new›instruction, called XCE, for eXchange Carry and Emulation bits. The›emulation bit is like a shadow of the carry flag, and so to change modes,›you set the carry for emulation mode, or clear the carry for native mode,›and then do an XCE. The previous state of the emulation flag will be in›the carry after the exchange has been made.››; Change to Native Mode›CLC›XCE››; Change to Emulation Mode›SEC›XCE››Running the 816 in native mode requires changes to the interrupt processing›system in the OS. A new OS is being worked on, but until this is available,›the Atari will crash if you attempt to enter native mode without completely›disabling interrupts. You will find that there is still a considerable›amount of power available even in emulation mode, and you still have the›option of entering native mode with all interrupts disabled.››The wait for an 816-aware version of the OS won't be too much longer, and›in the meantime, you can create a macro which enters native mode and disables›interrupts at the same time. Later on, when the OS supports native mode›with the interrupts still active, you can just remove the interrupt disable›from the macro, and reassemble your code. Here's an example of the native›and emulation mode macros supplied with the MAE assembler as part of the›MACROS include file.››!!!NAT .MD ;Macro definition for NATive›STZ $D40E›SEI›CLC›XCE›.ME››!!!EMU .MD ;Macro definition for EMUlation›SEC›XCE›LDA #$C0 ;Change this to #$40 if you aren't using DLIs›STA $D40E›CLI›.ME››- B accumulator -››The 816 has a second "hidden" accumulator known as the B accumulator.›Though there are no operations that work directly with it, there is an›instruction called XBA to exchange the A and B accumulators. Thus, B makes›a great temporary holding spot. The B accumulator is actually the upper›8 bits of a 16-bit wide accumulator. When A and B are used together as a›16-bit register, it is referred to as the C accumulator. The B accumulator›and XBA instruction are accessible in emulation mode. Only the 16-bit wide›C accumulator requires the native mode before it can be accessed. Later on,›we will learn how to configure the CPU for 16-bit register use, but it can›also be useful to load 16 bit values into both accumulators while still in›8-bit register mode. These three instructions perform this operation.››LDA #>address ;The high byte of the address is loaded first,›XBA ; then swapped into the upper accumulator,›LDA #
value›XBA››The A+B accumulator is also a great place for passing a 16-bit value to a›subroutine. ››- Changing Register Sizes -››Register size is controlled by two new bits in the native mode processor›status register. The new "M" bit controls the size of the accumulator and›all memory accesses, and the "X" bit controls the size of the X and Y index›registers. The native mode status register looks like this:››bit 7 6 5 4 3 2 1 0› N V M X D I Z C› | |› | Index register size› |› Accumulator and memory size››These bits are set to 1 when the register size is 8 bits. To enable 16-bit›registers, set the desired bit to 0. It is possible to have one bit set to›1, and the other bit set to 0. When transferring between registers of›unequal size, a general rule is that the size of the destination register›controls the width of the data moved. The following table will summarize›this.›› A=8-bit,X=16-bit A=16-bit,X=8-bit› ---------------- ----------------›TAX - Moves A and B into X Moves 8-bit A into X››TXA - Moves lower 8 bits of X into A. Moves 8 bit X into A,› B remains unchanged. and 0 into B.››Two new instructions are provided for setting and resetting bits in the›status register. Use the instruction SEP to set processor status bits.›The operand should be an immediate quantity, containing binary 1's for each›of the bits you wish to set. Consider this like an ORA instruction into the›status register. Use the instruction REP to reset or clear processor status›bits. The operand should be an immediate quantity, containing binary 1's›for each of the bits you wish to clear.››REP #$30 ;Set to all 16-bit registers›REP #$20 ;Set 16-bit accumulator and memory›REP #$10 ;Set 16-bit index registers›SEP #$30 ;Set to all 8-bit registers›SEP #$20 ;Set 8-bit accumulator and memory›SEP #$10 ;Set 8-bit index registers››Note that the SEP and REP instructions can set or reset any of the status›register bits, so their use is not restricted to only changing register›sizes. Other uses could include:››SEP #$09 ;Setting or resetting multiple bits at a time.›SEP #$40 ;Set the V flag.›SEP #$80 ;Setting or clearing N or Z flags...›REP #$02 ;...without changing register values.››There are