Date: January 25, 1988
Number: #208

Title:    AMI 5 MB "ELEPHANT BOARD" ADD-ON MEMORY BOARD
               NOVELL NSD TEST REPORT

This is a report of the testing performed under the direction of the
Advanced Technical Services group of NSD of the American Micronics Inc.
(AMI) 5 MB "Elephant Board" memory board.  The memory board that we tested
was assembly 1008, revision E.  Boards prior to this revision may or may not
be  compatible with Novell file servers.  When ordering the AMI 5 MB
Elephant  Board, it may be necessary to specify revision E or later.

The base address of the AMI 5 MB memory board is set by inserting the proper
PALs in locations U122 and U123 on the memory board.  In addition, the
appropriate jumpers must be installed on the memory board.  Several
different PALs are provided and the PAL/jumper combinations can be used to
set the base address to several different values including the following:

        1408K     =    1 Meg + 384K   (286A first memory board)
        2432K     =    2 Meg + 384K   (286B first memory board)

Additional PALs are available that allows the memory board's base
address to be set at the following:

        6528K     =    6 Meg + 384K   (286A second memory board)
        7552K     =    7 Meg + 384K   (286B second memory board)

The clock speed at which the memory board runs is determined by the clock
speed of the CPU on the motherboard of the system that the board is
installed in.  However, the number of wait states that the memory board
generates is independent of the number of wait states that the rest of the
system is operating at and is determined by a jumper on the memory board.
It should also be noted that the 286B server will only operate at 8 MHz,  0
wait states and 6 MHz, 1 wait state.  Even though the server will only
operate at these two speed/wait state combinations, a memory board running
in the server can be set to operate at 0 or 1 wait state at either CPU clock
speed and will operate as such each time it is accessed.

The memory board was tested in both 286A and 286B file servers at the
following speed and wait state combinations: 8/0, 8/1, 6/0, 6/1.  In  both
servers, the number of wait states that the memory board runs at is
determined by jumper W8 on the memory board and not by the server's
motherboard.

The board performed satisfactorily under both DOS and NetWare in both
servers at both 6 and 8 MHz running at 1 wait state.  It also performed
satisfactorily at 6 MHz, 0 wait states in the 286B server.  However, the
board would not even allow the servers to pass the POST self tests when run
at 8 MHz, 0 wait states in the 286A or 286B and 6 MHz, 0 wait states in the
286A.   Following is a summary of the test conditions and procedures used in
evaluating the AMI 5 MB memory board.

Four basic tests were performed on the memory board in each of the
different configurations of server, speed, and number of wait states.
First, an extended memory test program was loaded and run under DOS.
Second, the memory was allocated as virtual disk space under DOS and then a
batch program was run for at least an hour that continuously copied and
verified  large files from one virtual disk area to another.  Third, the
file server was booted under NetWare SFT Level 2 version 2.0a and disk
intensive applications  were run on at least two workstations to exercise
the portions of memory that  are allocated to cache.  The application
programs utilized were PERFORM2.EXE  set up to do 1000 sequential writes and
ULTITEST.  Fourth, the speed of the  board (numberof wait states) was
verified by direct observation of the I/O  bus with a Tektronix 465
oscilloscope while performing memory read and writes.

The PALs and jumpers on the memory board were set as follows
during the tests:

                              NO. OF WAIT
                     CPU      STATES ON
          SYSTEM    SPEED     MEMORY BOARD        SWITCH SETTINGS

          286A      6 MHz     0 Wait States       Memory board fails to
                                                  operate at 0 ws when set
                                                  for 0 wait states in a 286A
                                                  running at 6 MHz.

          286A      6 MHz     1 Wait State        Use PALs 6.2A & 6.2B
                                                  Install Jumpers at
                                                  W1, W3, W5 only.

          286A      8 MHz     0 Wait States       Memory board fails to
                                                  operate at 0 ws when set
                                                  for 0 wait states in a 286A
                                                  running at 8 MHz.


          286A      8 MHz     1 Wait State        Use PALs 6.2A & 6.2B
                                                  Install Jumpers at
                                                  W1, W3, W5 only.

          286B      6 MHz     0 Wait States       Use PALs 6.3A & 6.3B
                                                  Install Jumpers at
                                                  W1, W3, W5, W6, W7,
                                                  W8 only.

          286B      6 MHz     1 Wait State        Use PALs 6.3A & 6.3B
                                                  Install Jumpers at
                                                  W1, W3, W5, W6, W7
                                                  only.
                              NO. OF WAIT
                     CPU      STATES ON
          SYSTEM    SPEED     MEMORY BOARD        SWITCH SETTINGS

          286B      8 MHz     0 Wait States       Memory board fails to
                                                  operate 0 ws when set for 0
                                                  wait states in a 286B
                                                  running at 8 MHz.

          286B      8 MHz     1 Wait State        Use PALs 6.3A & 6.3B
                                                  Install Jumpers at
                                                  W1, W3, W5, W6, W7
                                                  only.

The operation of the AMI 5 MB Elephant board was verified with the
oscilloscope and the only discrepency found was while operating the board at
8 MHz, 1 wait state in 286B server.  The memory board was actually found to
be running at 2 wait states instead of one.

It is recommended that the following PALs and jumper settings be used for
setting the AMI 5 MB memory boards for use as first add-in memory boards in
Novell file servers:

                              NO. OF WAIT
                     CPU      STATES ON
          SYSTEM    SPEED     MEMORY BOARD        SWITCH SETTINGS

          286A      6 or      1 Wait State        Use PALs 6.2A & 6.2B
                    8 MHz                         Install Jumpers at
                                                  W1, W3, W5 only.

          286B      6 or      1 Wait State        Use PALs 6.3A & 6.3B
                    8 MHz                         Install Jumpers at
                                                  W1, W3, W5, W6, W7
                                                  only.