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Each word of the result is obtained by multiplying the smaller elements in the corresponding positions of arg1 by those in arg2, adding the resulting products, then adding the corresponding word of arg3. The sum is performed with 32-bit modular addition.
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arg1 |
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vector unsigned long |
vector unsigned char |
vector unsigned char |
vector unsigned long |
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vector unsigned long |
vector unsigned short |
vector unsigned short |
vector unsigned long |
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vector signed long |
vector signed char |
vector unsigned char |
vector signed long |
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vector signed long |
vector signed short |
vector signed short |
vector signed long |
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