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vladitx
Inscrit le: 19 D�c 2007 Messages: 22
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Post� le: Mer 16 Jan 2008, 16:01 Sujet du message: |
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JPL a �crit: | The WP circuitry is activate by voltage of phase 1, for this reason Phases must be off when you write... and of course you can't write and move together. That's impossible, and I don't speak about the difficult to do a tracking of datas if it was possible. |
Yes, in normal drive you have to turn off stepper phase1 coil before writing, and this makes certain quarter tracks unwrittable, as well as the write during head movement, but .... that's on the stock drive only. For production of copy-protected diskettes this constraint is easily removed.
@JPL, what do you have in mind with "the LSS is a little upset when it believes the disk is protected"?
@Toinet: thanks in advance, that will be nice practical example. |
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JPL Site Admin
Inscrit le: 12 Mar 2007 Messages: 160 Localisation: Issy les Moulineaux / PARIS
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Post� le: Dim 20 Jan 2008, 19:32 Sujet du message: |
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vladitx a �crit: | JPL a �crit: | The WP circuitry is activate by voltage of phase 1, for this reason Phases must be off when you write... and of course you can't write and move together. That's impossible, and I don't speak about the difficult to do a tracking of datas if it was possible. |
Yes, in normal drive you have to turn off stepper phase1 coil before writing, and this makes certain quarter tracks unwrittable, as well as the write during head movement, but .... that's on the stock drive only. For production of copy-protected diskettes this constraint is easily removed.
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Yes you're absolutly right, you can write anything with an other system but the problem is that you must be able to read with a standard disk II..
vladitx a �crit: |
@JPL, what do you have in mind with "the LSS is a little upset when it believes the disk is protected"? |
the phase 1 send a signal for WP but it's on the same circuit as
the write signal... and of course the head can't write correctly and for the
reading it's same the pulse can't be received correctly. |
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vladitx
Inscrit le: 19 D�c 2007 Messages: 22
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Post� le: Mar 29 Jan 2008, 2:39 Sujet du message: |
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JPL a �crit: | the phase 1 send a signal for WP but it's on the same circuit as
the write signal... and of course the head can't write correctly and for the
reading it's same the pulse can't be received correctly. |
WP circuitry (phase1=off + notch present) on the analog board inhibits the drivers for erase and r/w coils, but a single resolder hack will fix the dependency on phase1=off for writing on quarter tracks. Other than that, I don't see any problems.
As to LSS (the controller FSM), it's connection with WP is only shifting the bit right in one of the modes. |
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JPL Site Admin
Inscrit le: 12 Mar 2007 Messages: 160 Localisation: Issy les Moulineaux / PARIS
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Post� le: Mar 29 Jan 2008, 14:06 Sujet du message: |
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Yes absolutly but you must never forgot that the protection must work on a standard drive ... without hack system ![Confused](images/smiles/icon_confused.gif) |
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