This is a list of configurations that has received testing with one or more of the changes introduced in the current version XFree86 3.2. The amount of testing is very small for some of the configurations, and the summaries may be incomplete. If you can contribute, please do so. For the latest information check the latest version of this document on www.xfree86.org.
BitBLT operation should be fixed. MMIO does not work.
MMIO operation is supported.
8bpp, 16pp and 24bpp work OK. 16bpp no longer has "static" problems. MMIO operation is supported.
32bpp probably doesn't work. 8bpp and 16bpp should work without any FIFO-related problems, and without requiring "fifo_conservative".
Works OK at 8bpp, 16bpp, 24bpp and 32bpp.
Apparently broken in this release. On 800x600 displays, the recommended dot clock is 40 MHz for TFT and 33.7 MHz for a DSTN panel, with corresponding horizontal syncs of 33.7 kHz for TFT and 38.6 kHz for DSTN.
Some configurations for which no up-to-date testing data is available:
It would be nice to know whether these chips needs the same treatment at 16bpp as the CL-GD5434 with 1MB memory does. This also applies to the CL-GD754x series.
In particular the FIFO settings for this configuration are uncertain.
Support for these chips was reported broken in 3.1.2G, although the 7548 was reported to work in some cases.
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