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A programmable pixel shader is made up of a set of instructions that operate on pixel data. Registers transfer data in and out of the arithmetic logic unit (ALU). Additional control can be applied to modify the instruction, the results, or what data gets written out.
StaticFlowControlDepth represents the nesting depth of dynamic flow control instructions: if, if_comp, if_pred, break, and break_comp. The value is equal to the nesting depth of the if_comp block. The range of values for this cap is 0 to 24. If this cap is zero, the device does not support dynamic flow control instructions.
The number of temporary registers supported by the device. The range is from 12 to 32.
StaticFlowControlDepth represents the nesting depth of two types of static flow control instructions: loop/rep and call/callnz. The range of values for this cap is 1 to 4. loop/rep instructions can be nested up to StaticFlowControlDepth deep. Independently, call/callnz instructions can be nested up to StaticFlowControlDepth deep.
The number of instruction slots can range from 96 to a maximum of 512, and is specified by the MaxPixelShaderInstructionSlots. The total number of instructions that can run is defined by MaxPixelShaderInstructionsExecuted. This can be larger than the number of instruction slots due to looping and subroutine calls.
If D3DPS20CAPS_ARBITRARYSWIZZLE is set, arbitrary swizzle is supported. See Source Register Swizzling.
If D3DPS20CAPS_GRADIENTINSTRUCTIONS is set, gradient instructions are supported. See dsx, dsy, and texldd.
If D3DPS20CAPS_PREDICATION is set, instruction predication is supported. See Predicate Register.
If D3DPS20CAPS_NODEPENDENTREADLIMIT is set, there are no dependent read limits.
If D3DPS20CAPS_NOTEXINSTRUCTIONLIMIT is set, there is no limit on texture instructions.
The number of texture samplers available is 16.