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A programmable pixel shader is made up of a set of instructions that operate on pixel data. Registers transfer data in and out of the arithmetic logic unit (ALU). Additional control can be applied to modify the instruction, the results, or what data gets written out.
Add a face register. Add a position register. Color registers (v#) are now fully floating point and the texture coordinate registers (t#) have been consolidated. Input declarations take the usage names, and multiple usages are permitted for components of a given register.
The device supports dynamic flow control (if bool, break, and break_comp). The depth of nesting ranges from 0 to 24.
The number of temporary registers supported is 32.
The call/callnz/call_pred can be nested to a maximum depth of 4. Independently, loop/rep instructions can be nested to a maximum depth of 4.
Arbitrary swizzle is supported. See Source Register Swizzling.
Gradient instructions are supported. See dsx, dsy, and texldd.
Instruction predication is supported. See Predicate Register.
There are no dependent read limits.
There is no limit on texture instructions.
Each pixel shader is allowed anywhere from 512 up to the number of slots in MaxPixelShader30InstructionSlots (not more than 32768). The number of instructions run can be much higher because of the looping support. The in MaxPShaderInstructionsExecuted should be at least 2^16.
The number of texture samplers available is 16.
If pixel s 3_0 is supported, the following caps are supported in hardware (at a minimum):
Cap | Capability |
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MaxTextureWidth, MaxTextureHeight | 4K each |
MaxTextureRepeat | 8K |
MaxAnisotropy | 16 |
PixelShaderVersion | 3_0 |
MaxPixelShader30InstructionSlots | 512 |
The following primitive caps are set: |
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The following raster caps are set: |
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Full support for depth bias including: |
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Full set of comparisons for depth and alpha test including: |
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Source blending modes | All blending modes are supported as a source (except SrcBlendCaps, SrcBlendCaps, and SrcBlendCaps). |
The following texture caps are supported: |
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The following are supported on texture filter caps, volume texture filter caps and cube texture filter caps: |
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The following texture address modes are supported at vertex and pixel stages: |
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All the pixel shader caps are supported. |
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All the stencil operations are supported. | |
Two sided stencil is supported | D3DSTENCILCAPS_TWOSIDED |
Device support point size per vertex | FVFCaps |
Non-power of 2 texture support. | Either full support or conditional non-pow-2 support. Device should not have the square texture only limitation: TextureCaps. |
If the device supports multiple rendertargets, the following caps are supported: |
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If vs_3_0 is supported | MaxUserClipPlanes is 6 |